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Floating-Point Support

Floating-Point Support#

TF-M adds several configuration flags to control Floating point (FP) 1High-Performance Hardware Support for Floating-Point Operations support in TF-M Secure Processing Environment (SPE) and Non Secure Processing Environment (NSPE).

Please refer to Arm AN521 or AN552 platform as a reference implementation when you enable FP support on your platforms.

Note

Alternatively, if you intend to use FP in your own NSPE application but the TF-M SPE services that you enable do not require FP, you can set the CMake configuration CONFIG_TFM_ENABLE_CP10CP11 to ON and ignore any configurations described below.

7Musca-S1 Test Chip Board

Note

FPU test issue has not been fixed yet on Musca-S1 7Musca-S1 Test Chip Board. When running FPU tests on Musca-S1, secure thread fails to trigger secure interrupt. FPU test is disabled by default on Musca-S1 until the issue is fixed.

8GCC Issue on ‘-mcpu=cortex-m55’ conflicts with ‘-march=armv8.1-m.main’ Warning

Note

GNU Arm Embedded Toolchain 10.3-2021.10 may have issue that reports '-mcpu=cortex-m55' conflicts with '-march=armv8.1-m.main' warning 8GCC Issue on ‘-mcpu=cortex-m55’ conflicts with ‘-march=armv8.1-m.main’ Warning. This issue has been fixed in the later version.

FP ABI type for SPE and NSPE#

FP design in Armv8.0-M 9Armv8-M Architecture Reference Manual architecture requires consistent FP ABI types between SPE and NSPE. Furthermore, both sides shall set up CPACR individually when FPU is used. Otherwise, No Coprocessor (NOCP) usage fault will be asserted during FP context switch between security states.

Secure and non-secure libraries are compiled with COMPILER_CP_FLAG and linked with LINKER_CP_OPTION for different FP ABI types. All those libraries shall be built with COMPLIER_CP_FLAG.

If FP ABI types mismatch error is generated during build, pleae check whether the library is compiled with COMPILER_CP_FLAG. Example:

target_compile_options(lib
    PRIVATE
        ${COMPILER_CP_FLAG}
)

CMake configurations for FP support#

The following CMake configurations configure COMPILER_CP_FLAG in TF-M SPE.

  • CONFIG_TFM_ENABLE_FP is used to enable/disable FPU usage.

    CONFIG_TFM_ENABLE_FP

    FP support

    off (default)

    FP disabled

    on

    FP enabled

Note

CONFIG_TFM_FLOAT_ABI depends on CONFIG_TFM_ENABLE_FP. If CONFIG_TFM_ENABLE_FP is set ``CONFIG_TFM_FLOAT_ABI is automatically set to hard.

Note

If you build TF-M SPE with CONFIG_TFM_ENABLE_FP=on and provide your own NSPE application, your own NSPE must take care of enabling floating point coprocessors CP10 and CP11 on the NS side to avoid aforementioned NOCP usage fault.

  • CONFIG_TFM_LAZY_STACKING is used to enable/disable lazy stacking feature. This feature is only valid for FP hardware ABI type. NSPE is not allowed to enable/disable this feature. Let SPE decide the secure/non-secure shared setting of lazy stacking to avoid the possible side-path brought by flexibility.

    CONFIG_TFM_LAZY_STACKING

    Description

    0FF

    Disable lazy stacking

    ON (default)

    Enable lazy stacking

  • CONFIG_TFM_FP_ARCH specifies which FP architecture is available on the target, valid for FP hardware ABI type.

    FP architecture is processor dependent. For GNUARM compiler, example value are: auto, fpv5-d16, fpv5-sp-d16, etc. For armclang, example value are: none, softvfp, fpv5-d16, fpv5-sp-d16, etc.

    This parameter shall be specified by platform in preload.cmake. Please check compiler reference manual and processor hardware manual for more details to set correct FPU configuration for platform.

  • CONFIG_TFM_FP_ARCH_ASM specifies the target FPU architecture name shared by Arm Compiler armasm and armlink. It is only used in the --fpu= argument by Arm Compiler and shall be aligned with CONFIG_TFM_FP_ARCH.

    FP architecture is processor dependent. For armasm and armlink, example value are: SoftVFP, FPv5_D16, etc.

    This parameter shall be specified by platform in preload.cmake. Please check compiler reference manual and processor hardware manual for more details to set correct FPU configuration for platform.

Reference#

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