New features#
Version 26.03
Updated web documentation format and style
DDR tool
Introduced i.MX 952 DDR tool support
Added support for all available USB devices in Serial Downloader mode
Improved UART configuration handling in the DDR tool
Added board support for: i.MX8M‑ Plus FRDM, i.MX 93W EVK, i.MX 943 A1 EVK
Added i.MX 95 LPDDR5 support for 4500 MT/s
Updated i.MX 95 LPDDR4x auto pre‑charge configuration for 15×15 packages
Data‑rate availability is now filtered based on the selected part number for i.MX 91
Expose in UI Apply Derated Timing option for i.MX 93
Resolved WRC test hang for memory sizes larger than 2 GB on i.MX 95
Updated DQ bus mapping to correctly handle byte swapping within a channel for the i.MX 9 series
SerDes tool
Added i.MX 95 FRDM support
System Manager
Memory sector information for resources with memory configuration is added to the Resources overview.
Support for memory sectors splitting.
Memory configuration input for resources using MBC/MRC is improved.
Support for macOS (aarch64 and x86_64) is added.
Clocks
Hierarchy for local configuration element settings is supported.
TEE
Multicore Interrupt Handling for Single Security Domain is supported.
Option to filter only user-defined memory regions is added.
Interrupts are now separated into groups based on the core.
Version 25.12
DDR tool
Support for detecting multiple boards connected to the host system is added.
Automatic detection and selection of newly connected COM ports is implemented.
A Connection Test option to validate connectivity before running tests on the target is introduced.
i.MX 93 EVK LP4 configuration is added.
Training execution-time information for i.MX 95 and i.MX 943 is included in logs.
Bus signal naming in the UI to align with i.MX pin naming conventions is consolidated.
CA bus values for i.MX943 with LPDDR4 are updated.
5600 MT/s for i.MX 95 and i.MX 943 with LPDDR5 is enabled.
LP4/4x settings for DDR_SDRAM_ZQ_CNTL for i.MX 95 and i.MX 943 are updated.
Dual-rank configurations for i.MX 91 and i.MX 93 are updated.
LP4/4x configuration to support non-binary densities for i.MX 95 and i.MX 943 is updated.
Support for non-binary aligned LP4 density for i.MX 91 is added.
FRDM board support (LPDDR4X 15x15 at 4000 MT/s) for i.MX 95 is added.
Timing file discrepancies for i.MX 8MN with DDR3L are fixed.
Issue where changing PHY log level did not update the generated code is fixed.
DRAM density calculation for i.MX 95 and i.MX 943 with LP4/4x is corrected.
Incorrect calculation of number of banks for i.MX 8M with DDR3L is fixed.
CS1_BNDs calculation for i.MX 91 is corrected.
SerDes tool
i.MX 943 RFP support is added.
System Manager
The ability to export user configuration in the CFG format is added.
Information about atomic resources to the Details view is added.
Generation and configuration of the config_fusa.h file is supported.
Resource and template assignment is improved.
Grayed-out resource assignments for unavailable configuration parameters in the Resources view are implemented.
Validation of configuration and user input is improved.
Problem decorators to the System and Boot view are added.
Design of the Boot and Details view is improved.
Version 25.09
The Release Notes format is updated from plain text to markdown.
The newly generated configuration includes the default NXP copyright notice and is licensed under the BSD-3-Clause license.
DDR tool
ODT and Driver Strength Updates for LP4/LP5 on i.MX 943 and i.MX 95
Improved DRAM Configuration for MX9x devices
Multicore support enabled for DDR tests on i.MX 943 and i.MX 95
Linux support for the DDR tool
Vref DQ Setting now available in the GUI
Board-agnostic SM Support for i.MX 943 and i.MX 95
DDR part number entry is now supported in the GUI
Enhanced logging from the target application
Stresstest repetition option enabled
Updated ODT shmoo scenario values on i.MX 943 and i.MX 95
Support for SNPS FW and PHY Init 2024.09 SP2 on i.MX 943 and i.MX 95
AHAB image update to align with BSP for CES parts on i.MX 943 and i.MX 95
New configuration support for 15x15 on iMX 943
Improved bus configuration for single-channel setups
LP4/LP5 CS signal configuration now exposed in the GUI for i.MX 943 and i.MX 95
Clocks
Supported input frequency setting
System Manager
Initial version of the tool
Version 25.06
DDR
Support for i.MX 91 is added.
Synchronized with BSP Q2 release
Support for the i.MX 91 FRDM board is added.
Support for the i.MX 93 FRDM board is added.
Spectrum support for i.MX 95 and i.MX 943 is spread.
The Address mirroring option in the UI for all mscale devices with DDR3L and DDR4 is exposed.
DDR3L support for i.MX 8M and i.MX 8MM is added.
Linux support for code generation (beta) is added.
SerDes tool
i.MX 943 support (Beta) is added.
Clocks
Support for read-only element settings is added.
Filtering all settings of Initialization modules in the Details view is supported.
Peripherals
A wizard to export the Registers view data in the CSV format is supported.
Performance of the tool is improved.
An ability to export/import Expansion Boards and Expansion Headers is added.
Version 25.03
Output Paths Overrides for toolchain project is fixed.
“Filter source files” search bar with case-sensitive checkbox is removed.
TEE
Sort for Peripheral Configurations table is added.
Version 24.12
DDR tool
Support for the custom System Manager image import is added.
i.MX 95 advanced tests are enabled: Vref for DQ and Vref for CA optimization
SerDes tool
Additional parameters for TX configuration on GUI (swing, margin, equalization) for i.MX 95 are added.
PCIe Gen1/Gen2/Gen3 switch on pattern generation.
Clocks
Modular clocks initialization is supported.
Initialization mode is visible in the Clocks diagram and Details view.
A new Modular Initialization view for configuration of the initialization mode and core selection of the module is created.
TEE
Configuration and overview of areas with the same address and different address space is supported.
Code generation can be toggled for global options groups.
The process for releasing ELE crypto before setting up TRDC is supported.
Pins
A miscellaneous tab for various Pins configuration options is added.
Filtering for routing dialogs is added.
Version 16.1
DDR tool
i.MX 91 support is added.
Fixes for LX2
SerDes tool
Board configuration options are added.
IO Expander configuration options are added.
Clocks
Disabling enabled clock outputs that have settings with shared bit-fields after reopening the configuration is fixed.
Clock slices with multiple outputs are supported.
TEE
An incorrect number of the MPU region attributes shown for the configuration of RT1180 is fixed.
An incorrect domain visibility and tab names when DAC is disabled on RT1180 is fixed.
Version 16
The product is based on Eclipse 2023-12
The initial set of the selected processor and peripheral components data is no longer delivered within the installer. The data is downloaded automatically after the processor selection or can be imported manually from the data archive file.
Framework
Enable the Peripherals tool in the Config Tools for i.MX
Enable the Clocks tool in the Config Tools for i.MX
A new command-line argument (- UpdateCode) has been added. It performs the same action as the Update Code button in the user interface. It must be used with -HeadlessTool.
DDR tool
CA bus driver strength and ODT configuration for the mScale processors are added.
[MX 93/MX 91] The UART configuration from UI is added.
MX 91 DDR tool update for Config tools
MX 93 PF 09 DDR tool support is added.
SerDes tool
MX 95 SerDes tool support is enabled.
TEE tool
The query for pins labels and routed signals is updated to work on the new NPI.
Global tool options now support enum, boolean, and string with the ability to define the regex validator.
Access templates are now greyed out when the global ones are used.
The legacy source names option is disabled when ROM output is selected.
MPU tabs are now sorted by top domain index and then alphabetically.
The correct representation of TRDC domains is implemented by removing mix domains.
Peripheral areas are now correctly stored within the correct tab.
The side-channel attack warning is added to the RAM security settings.
The Trigger tab for configuration of the ITRC register RW fields is added.
Pins tool
Simultaneous routing detection (routing of one signal may result in multiple signals being routed based on the same register settings) is added. In that case, such signals are offered to be added into the configuration.
Support of internal pins that are not available in the package is added.
Version 16.1
Clocks
Disabling enabled clock outputs that have settings with shared bit-fields after reopening the configuration is fixed.
Clock slices with multiple outputs are supported.
TEE
An incorrect number of the MPU region attributes shown for the configuration of RT1180 is fixed.
An incorrect domain visibility and tab names when DAC is disabled on RT1180 is fixed.
Version 16
The product is based on Eclipse 2023-12
The initial set of the selected processor and peripheral components data is no longer delivered within the installer. The data is downloaded automatically after the processor selection or can be imported manually from the data archive file.
Framework
Enable the Peripherals tool in the Config Tools for i.MX
Enable the Clocks tool in the Config Tools for i.MX
A new command-line argument (- UpdateCode) has been added. It performs the same action as the Update Code button in the user interface. It must be used with -HeadlessTool.
DDR tool
CA bus driver strength and ODT configuration for the mScale processors are added.
[MX 93/MX 91] The UART configuration from UI is added.
MX 91 DDR tool update for Config tools
MX 93 PF 09 DDR tool support is added.
SerDes tool
MX 95 SerDes tool support is enabled.
TEE tool
The query for pins labels and routed signals is updated to work on the new NPI.
Global tool options now support enum, boolean, and string with the ability to define the regex validator.
Access templates are now greyed out when the global ones are used.
The legacy source names option is disabled when ROM output is selected.
MPU tabs are now sorted by top domain index and then alphabetically.
The correct representation of TRDC domains is implemented by removing mix domains.
Peripheral areas are now correctly stored within the correct tab.
The side-channel attack warning is added to the RAM security settings.
The Trigger tab for configuration of the ITRC register RW fields is added.
Pins tool
Simultaneous routing detection (routing of one signal may result in multiple signals being routed based on the same register settings) is added. In that case, such signals are offered to be added into the configuration.
Support of internal pins that are not available in the package is added.
Version 15.1
On MacOS aarch64, the missing Overview is fixed.
TEE
Pin tables now only contain items for specific configuration (mask/security/interrupts).
Version 15.0
The product is based on Eclipse 2023-06
TEE
Setting a security level for a special 3-state model is improved.
Pins
Validation to ensure that elements can be configured by the selected core is added.
Rows are sorted in the Peripheral Signals routing dialog.
A connected pins column in External User Signals always shows the pin’s full name.
The missing scroll bar in the External User Signals view is fixed.
Clocks
Support for multicore code generation is added.
Global configuration elements now support a tree structure and can be categorized.
Fractional PLL now supports a custom range and negative numerator.
Scrolling in the clock diagram by pressing the mouse wheel (drag and drop) is supported.
DCD
The issue with the code generation that stopped working after the drag and drop of a group is fixed.
Version 14.0
The product is based on Eclipse 2022-12
Open JDK 17 is updated.
Batch processing on the command line is supported.
A quick fix for errors allows setting the “Called by the default initialization function” flag when it would fix an error.
Search functionality to Code Preview is added.
TEE
Export TEE registers via wizard or command line is available.
Boot ROM hiding feature is supported.
Tier mode for TRDC is supported.
Domain ambivalence for RDC masters is added.
Master-specific memory alias
Validation for A28 bit of MPU region address is added.
Memory map filters are aligned with Arm terminology.
Status bar is united with other tools.
Pins
Labels defined for Expansion header pins can be set as identifiers of the routed pin.
Expansion headers can be locked for editing.
Expansion headers and boards are added to the HTML and CSV reports.
Pins filtering is added into the expansion header pin routing dialogs.
Columns from Routing Details can be added to the External User Signals view.
New External User Signals can be created for all routed pins that are missing in the signals table.
Clocks
Support for the same frequency settings from a different source for internal clocks is added.
Version 13.1
DDR tool
i.MX 93 support for A0 preproduction launch; sync with SW BSP release
Pins tool
Incomplete routing of deinit functions is fixed.
Version 13
Disable view content for specific NPI is supported.
Product outgoing license is changed to LA_OPT_NXP_Software_License.
DDR tool
Support for i.MX 93
Support for fw2022.01
Support for LPDDR4x
CA bus signals margin for LPDDR4 and LPDDR4x
VrefCA optimizer
Pins tool
A customized function name for the deinitialization function is supported.
Customization of the de-deinitialization function name is supported.
Allow usage of the expansion board file referencing single-row Arduino header with Freedom and LPC headers that are compatible.
Pins messages are driven by functional properties and pin mode.
Show external signal tab by default
Zephyr Pins configuration in Config Tools
TEE
Support for i.MX RT1180 and i.MX 93 processor families is added.
Optional hardened code generation for the device is added (enabled by SDK).
SAU, MPU, and Access Templates tabs have been moved to the top-level tab strip and are now MCU-wide.
XRDC memory regions now allow overlaps.
EAL configuration implemented for XRDC MRC is implemented.
“This domain only” filter option is added for the Memory Attribution Map view; it is always on for the Access Overview view.
Version 12.1
Pins tool
The Deinit function now also sets the routing and direction to its default state. It also attempts to route the original peripheral signal to its default pin.
Version 12.0
The product is based on Eclipse 2021-12
Enabled EcmaScript 6 script engine
Supported Override outpath of files generated by tools
Introduced TEE tool
TEE tool
The i.MX 8ULP applications processor family is now supported:
Implemented basic XRDC configuration (MRC, MSC, and PAC)
Additionally implemented Process Identifier, TSM, and SP4SM configuration
Hybrid templates updated for XRDCs MRC that can be edited by the user and selected by code region
Fixes for the KW45 family:
Fixed the bug where the LK1 bit in TRDC_CR is not set when all the GVLD bits are set
Fixed the bug where setting a lock in Access Templates does not work
Fixed the bug where setting the ID bypass of a master does not set the bit in its MDA register in the Registers view
Fixes for the LPC55S and RT5xxS/6xxS families:
Fixed the bug where the NSC region is not shown correctly
Other minor improvements and fixes
Pins tool
Support for LX2162A
Added the command to create a function with default routing of pins and signals
Created the External User Signals view
DDR tool
Support for LX2162A
Inline ECC for i.MX 8MP
Quick ECC test for i.MX 8MP
VrefDQ for 1D optimization for DDR4 and LPDDR4
CA bus signals margin for LPDDR4
High-level root cause advisor
PBL tool
Support for LX2162A
SerDes tool
Support for LX2162A and LA12xx
Apply the SerDes protocol to the PBL tool
Read MDIO registers for LX2160A and LX2162A
Version 11.0
The product is based on Eclipse 2021-06
Updated Open JDK 11
Remove Nashorn engine warning from logs
Pins tool
Support for LX2160A
Added the Full pins initialization option in the Functional group properties
Added the Deinitialization function option in the Functional group properties
The Pins view and routing dialogs are now using labels in the format “Peripheral: signal, channel”
DDR tool
Support for iMX8M-nano UL support with DDR3
Support for LX2160A
Cell color code
Report to summarize the DDR configuration (mex file plus ds file)
PBL tool
The preboot loader (PBL) tool is added in Config tools for i.MX
Support for LX2160A
SerDes tool
The SerDes tool is added in Config tools for i.MX
Support for LX2160A
Version 10.0
The product is based on Eclipse 2020-12
Moved from Open JDK 8 to Open JDK 11
Pins tool
Added support of expansion board adapters - expansion boards that contain additional expansion headers
A numbered suffix is added to function names and prefixes by default for expansion board functions
The processor reset dialog offers 2 choices where available
DDR tool
The proper disclaimer was added when the DDR tool is used for the first time
Simplifying DDR configuration UI by using the tokenized RPA tool
Import the output of the RPA tool bypasses UI configuration
Switch between Configuration options
Board data bus configuration for LPDDR4
UART selection
IOMUX config (under Advanced mode)
PMIC config (under Advanced mode)
Custom configuration (under Advanced mode)
Dynamic DDR controller and DDR PHY code generation on host
Multiple frequency setpoints support
DQ ODT and DS configuration (under Advanced mode)
New validation categories (Inspection, Optimization, vTSA, Stressing)
DQ ODT and driver strength test
Apply the ODT configuration from the ODT map
Version 9.0
The product is based on Eclipse 2020-06
Moved from Oracle Java 8 to Open JDK 8
Pins tool
Added Expansion board support
Improved presentation and usage of internal signals
Renamed the Routed Pins view to Routing Details
Renamed the column “Route to” to “Routed pin/signal” in the Routing Details view
Added the column “Arrow” to the Routing Details view (includes generated pins reports)
Added pin coordinates to the “Routed pin/signal” column in the Routing Details view (includes generated pins reports)
Added filter for Pins or Signal in the Routing Details view
Ability to locate/highlight pin(s) in the Pins View table from other views (Routing Details, Package,…)
DDR tool
Support for i.MX 8M, i.MX 8MM, i.MX 8MN, and i.MX 8MP
PHY initialization using dynamic library
Support for multiple PHY firmware versions including fw2020.06
Diagnostic fw2020.06
DDR PHY support for DDR3 (untested), DDR4, and LPDDR4
Allows users to import the DDR controller and PHY configuration from the RPA tool
Full PHY configuration from GUI
Basic/Advanced user mode
DDR controller Registers View support
Auto-detect of available COM ports
USB target connection
Basic validation tests support (Write-Read-Compare, Walking Ones, Walking Zeros)
Stress tests support
vTSA (Virtual Timing Signal Analysis) support- RX data eye, TX data eye
Export test results in the JPEG format
Code generation in U-Boot style
Command line possibility
Version 8.0
Pins tool: Added muxing alt function details in the HTML report.
DDR tool
Blind support for DDR3
Added support for i.MX 8M and i.MX 8MN
Support for multiple PHY firmware versions
Improved import from the RPA tool
Add Basic/Advanced user mode
Code generation in U-Boot style
Version 7.0.1
Mac OS X 10.15 operating system support added.
Version 7.0
Product renamed to Config Tools for i.MX
The Memory tool is added, it supports DDR configuration and validation
Added the “Help | Kit/Board Information” option that displays information about currently used kit or board.
Clickable Part number, Board, and Kit name are supported. It displays information about the currently used processor, board, and kit.
Data Manager supports clearing locally cached processors, boards, kit, and components content.
Configuration Preferences supports custom copyright in generated sources.
Preferences - Added Dark theme support.
Pins tool: Added automatic routing feature that can be used for conflict resolution in the current functional group.
Version 6.0
Only 64-bit operating systems are supported.
‘Update Code’ is now possible without an assigned toolchain project.
Added the “Help | Processor Information” menu option that displays information about the currently used processor.
Highlight changes implemented in generated code in the Code preview view.
Version 5.0
The New Configuration Wizard allows specifying the default core for multicore processors.
Data Manager allows an overview of downloaded data, their versions, tool support information, update outdated, or manually download new data.
Copy/Paste of pin(s) supported in the Routed Pins view.
Added in-tool tutorials - Eclipse Cheat Sheets integration.
Version 4.1
Undo/Redo supported.
The product is based on Eclipse Oxygen release 3.
Unified import wizard. A single import source is implemented. It allows importing all supported types of C files.
Version 4.0
Added an ability to import a configuration from the existing MEX file (for selected tools).
Added a common Functions group toolbar across all tools.
Added an option not to generate YAML.
Pins tool: Multiselect in the Routed pins view is now supported.
Syntax coloring is supported in the Sources view.
Export sources wizard is simplified.
Several bugs are fixed and general performance is improved.
A quick start guide is added.
Version 3.0
Newly views are dock-able. The Views menu is added.
The sources view now displays which core a generated file belongs to (for multicore processors).
The Problems view is improved.
The Pins view package now supports PoP (package on package) and a generic package.
Export sources improved, multicore support added: Generated C code now is split into individual folders by core, using a common “pin_mux.c/.h” name.
Several bugs are fixed
Version 2.0
Labels and Identifiers are now supported in the Pins tool.
Boards and Kits are now supported.
The import of legacy PE projects is supported.
Several bugs are fixed.
Version 1.0
Initial version.