KW43B43ZC7#

AOI: Crossbar AND/OR/INVERT Driver#

void AOI_Init(AOI_Type *base)

Initializes an AOI instance for operation.

This function un-gates the AOI clock.

Parameters:

base – AOI peripheral address.

void AOI_Deinit(AOI_Type *base)

Deinitializes an AOI instance for operation.

This function shutdowns AOI module.

Parameters:

base – AOI peripheral address.

void AOI_GetEventLogicConfig(AOI_Type *base, aoi_event_t event, aoi_event_config_t *config)

Gets the Boolean evaluation associated.

This function returns the Boolean evaluation associated.

Example:

aoi_event_config_t demoEventLogicStruct;

AOI_GetEventLogicConfig(AOI, kAOI_Event0, &demoEventLogicStruct);

Parameters:

base – AOI peripheral address.
event – Index of the event which will be set of type aoi_event_t.
config – Selected input configuration .

void AOI_SetEventLogicConfig(AOI_Type *base, aoi_event_t event, const aoi_event_config_t *eventConfig)

Configures an AOI event.

This function configures an AOI event according to the aoiEventConfig structure. This function configures all inputs (A, B, C, and D) of all product terms (0, 1, 2, and 3) of a desired event.

Example:

aoi_event_config_t demoEventLogicStruct;

demoEventLogicStruct.PT0AC = kAOI_InvInputSignal;
demoEventLogicStruct.PT0BC = kAOI_InputSignal;
demoEventLogicStruct.PT0CC = kAOI_LogicOne;
demoEventLogicStruct.PT0DC = kAOI_LogicOne;

demoEventLogicStruct.PT1AC = kAOI_LogicZero;
demoEventLogicStruct.PT1BC = kAOI_LogicOne;
demoEventLogicStruct.PT1CC = kAOI_LogicOne;
demoEventLogicStruct.PT1DC = kAOI_LogicOne;

demoEventLogicStruct.PT2AC = kAOI_LogicZero;
demoEventLogicStruct.PT2BC = kAOI_LogicOne;
demoEventLogicStruct.PT2CC = kAOI_LogicOne;
demoEventLogicStruct.PT2DC = kAOI_LogicOne;

demoEventLogicStruct.PT3AC = kAOI_LogicZero;
demoEventLogicStruct.PT3BC = kAOI_LogicOne;
demoEventLogicStruct.PT3CC = kAOI_LogicOne;
demoEventLogicStruct.PT3DC = kAOI_LogicOne;

AOI_SetEventLogicConfig(AOI, kAOI_Event0, demoEventLogicStruct);

Parameters:

base – AOI peripheral address.
event – Event which will be configured of type aoi_event_t.
eventConfig – Pointer to type aoi_event_config_t structure. The user is responsible for filling out the members of this structure and passing the pointer to this function.

FSL_AOI_DRIVER_VERSION: Version 2.0.2.

enum _aoi_input_config

AOI input configurations.

The selection item represents the Boolean evaluations.

Values:

enumerator kAOI_LogicZero: Forces the input to logical zero.

enumerator kAOI_InputSignal: Passes the input signal.

enumerator kAOI_InvInputSignal: Inverts the input signal.

enumerator kAOI_LogicOne: Forces the input to logical one.

enum _aoi_event

AOI event indexes, where an event is the collection of the four product terms (0, 1, 2, and 3) and the four signal inputs (A, B, C, and D).

Values:

enumerator kAOI_Event0: Event 0 index

enumerator kAOI_Event1: Event 1 index

enumerator kAOI_Event2: Event 2 index

enumerator kAOI_Event3: Event 3 index

typedef enum _aoi_input_config aoi_input_config_t

AOI input configurations.

The selection item represents the Boolean evaluations.

typedef enum _aoi_event aoi_event_t: AOI event indexes, where an event is the collection of the four product terms (0, 1, 2, and 3) and the four signal inputs (A, B, C, and D).

typedef struct _aoi_event_config aoi_event_config_t

AOI event configuration structure.

Defines structure _aoi_event_config and use the AOI_SetEventLogicConfig() function to make whole event configuration.

AOI: AOI peripheral address

struct _aoi_event_config

#include <fsl_aoi.h>

AOI event configuration structure.

Defines structure _aoi_event_config and use the AOI_SetEventLogicConfig() function to make whole event configuration.

Public Members

aoi_input_config_t PT0AC: Product term 0 input A

aoi_input_config_t PT0BC: Product term 0 input B

aoi_input_config_t PT0CC: Product term 0 input C

aoi_input_config_t PT0DC: Product term 0 input D

aoi_input_config_t PT1AC: Product term 1 input A

aoi_input_config_t PT1BC: Product term 1 input B

aoi_input_config_t PT1CC: Product term 1 input C

aoi_input_config_t PT1DC: Product term 1 input D

aoi_input_config_t PT2AC: Product term 2 input A

aoi_input_config_t PT2BC: Product term 2 input B

aoi_input_config_t PT2CC: Product term 2 input C

aoi_input_config_t PT2DC: Product term 2 input D

aoi_input_config_t PT3AC: Product term 3 input A

aoi_input_config_t PT3BC: Product term 3 input B

aoi_input_config_t PT3CC: Product term 3 input C

aoi_input_config_t PT3DC: Product term 3 input D

CCM32K: 32kHz Clock Control Module#

void CCM32K_Enable32kFro(CCM32K_Type *base, bool enable)

Enable/Disable 32kHz free-running oscillator.

Note

There is a start up time before clocks are output from the FRO.

Note

To enable FRO32k and set it as 32kHz clock source please follow steps:

CCM32K_Enable32kFro(base, true);        //Enable FRO analog oscillator.
CCM32K_DisableCLKOutToPeripherals(base, mask); //Disable clock out.
CCM32K_SelectClockSource(base, kCCM32K_ClockSourceSelectFro32k); //Select FRO32k as clock source.
while(CCM32K_GetStatus(base) != kCCM32K_32kFroActiveStatusFlag); //Check FOR32k is active and in used.
CCM32K_EnableCLKOutToPeripherals(base, mask); //Enable clock out if needed.

Parameters:

base – CCM32K peripheral base address.
enable – Boolean value to enable or disable the 32kHz free-running oscillator. true — Enable 32kHz free-running oscillator. false — Disable 32kHz free-running oscillator.

static inline void CCM32K_Lock32kFroWriteAccess(CCM32K_Type *base)

Lock all further write accesses to the FRO32K_CTRL register until a POR occurs.

Parameters:

base – CCM32K peripheral base address.

static inline uint16_t CCM32K_Get32kFroTrimValue(CCM32K_Type *base)

Get frequency trim value of 32kHz free-running oscillator.

Parameters:

base – CCM32K peripheral base address.

Returns:

The current trim value.

void CCM32K_Set32kFroTrimValue(CCM32K_Type *base, uint16_t trimValue)

Set the frequency trim value of 32kHz free-running oscillator by software.

Note

The frequency is decreased monotonically when the trimValue is changed progressively from 0x0U to 0x7FFU.

Note

If the FRO32 is enabled before invoking this function, then in this function the FRO32 will be disabled, after updating trim value the FRO32 will be re-enabled.

Parameters:

base – CCM32K peripheral base address.
trimValue – The frequency trim value.

static inline void CCM32K_Disable32kFroIFRLoad(CCM32K_Type *base, bool disable)

Disable/Enable the function of setting 32kHz free-running oscillator trim value when IFR value gets loaded in the SOC.

Parameters:

base – CCM32K peripheral base address.
disable – Boolean value to disable or enable IFR loading function. true — Disable IFR loading function. false — Enable IFR loading function.

static inline void CCM32K_Lock32kFroTrimWriteAccess(CCM32K_Type *base)

Lock all further write accesses to the FRO32K_TRIM register until a POR occurs.

Parameters:

base – CCM32K peripheral base address.

void CCM32K_Set32kOscConfig(CCM32K_Type *base, ccm32k_osc_mode_t mode, const ccm32k_osc_config_t *config)

Config 32k Crystal Oscillator.

Note

When the mode selected as kCCM32K_Disable32kHzCrystalOsc or kCCM32K_Bypass32kHzCrystalOsc the parameter config is useless, so it can be set as “NULL”.

Note

To enable OSC32K and select it as clock source of 32kHz please follow steps:

CCM32K_Set32kOscConfig(base, kCCM32K_Enable32kHzCrystalOsc, config); //Enable OSC32k and set config.
while((CCM32K_GetStatus(base) & kCCM32K_32kOscReadyStatusFlag) == 0UL); //Check if OSC32K is stable.
CCM32K_DisableCLKOutToPeripherals(base, mask); //Disable clock out.
CCM32K_SelectClockSource(base, kCCM32K_ClockSourceSelectOsc32k); //Select OSC32k as clock source.
while((CCM32K_GetStatus(base) & kCCM32K_32kOscActiveStatusFlag) == 0UL); //Check if OSC32K is used as clock source.
CCM32K_EnableCLKOutToPeripherals(base, mask); //Enable clock out.

Parameters:

base – CCM32K peripheral base address.
mode – The mode of 32k crystal oscillator.
config – The pointer to the structure ccm32k_osc_config_t.

static inline void CCM32K_Lock32kOscWriteAccess(CCM32K_Type *base)

Lock all further write accesses to the OSC32K_CTRL register until a POR occurs.

Parameters:

base – CCM32K peripheral base address.

void CCM32K_EnableClockMonitor(CCM32K_Type *base, bool enable)

Enable/disable clock monitor.

Parameters:

base – CCM32K peripheral base address.
enable – Used to enable/disable clock monitor.
- turn Enable clock monitor.
- false Disable clock monitor.

static inline void CCM32K_SetClockMonitorFreqTrimValue(CCM32K_Type *base, ccm32k_clock_monitor_freq_trim_value_t trimValue)

Set clock monitor frequency trim value.

Parameters:

base – CCM32K peripheral base address.
trimValue – Clock minitor frequency trim value, please refer to ccm32k_clock_monitor_freq_trim_value_t.

static inline void CCM32K_SetClockMonitorDivideTrimValue(CCM32K_Type *base, ccm32k_clock_monitor_divide_trim_value_t trimValue)

Set clock monitor divide trim value.

Parameters:

base – CCM32K peripheral base address.
trimValue – Clock minitor divide trim value, please refer to ccm32k_clock_monitor_divide_trim_value_t.

void CCM32K_SetClockMonitorConfig(CCM32K_Type *base, const ccm32k_clock_monitor_config_t *config)

Config clock monitor one time, including frequency trim value, divide trim value.

Parameters:

base – CCM32K peripheral base address.
config – Pointer to ccm32k_clock_monitor_config_t structure.

static inline void CCM32K_LockClockMonitorWriteAccess(CCM32K_Type *base)

Lock all further write accesses to the CLKMON_CTRL register until a POR occurs.

Parameters:

base – CCM32K peripheral base address.

static inline void CCM32K_EnableCLKOutToPeripherals(CCM32K_Type *base, uint8_t peripheralMask)

Enable 32kHz clock output to selected peripherals.

Parameters:

base – CCM32K peripheral base address.
peripheralMask – The mask of peripherals to enable 32kHz clock output, should be the OR’ed value of ccm32k_clock_output_peripheral_t.

static inline void CCM32K_DisableCLKOutToPeripherals(CCM32K_Type *base, uint8_t peripheralMask)

Disable 32kHz clock output to selected peripherals.

Parameters:

base – CCM32K peripheral base address.
peripheralMask – The mask of peripherals to disable 32kHz clock output, should be the OR’ed value of ccm32k_clock_output_peripheral_t.

static inline void CCM32K_SelectClockSource(CCM32K_Type *base, ccm32k_clock_source_select_t clockSource)

Select CCM32K module’s clock source which will be provide to the device.

Parameters:

base – CCM32K peripheral base address.
clockSource – Used to select clock source, please refer to ccm32k_clock_source_select_t for details.

static inline void CCM32K_LockClockGateWriteAccess(CCM32K_Type *base)

Lock all further write access to the CGC32K register until a POR occurs.

Parameters:

base – CCM32K peripheral base address.

static inline uint32_t CCM32K_GetStatusFlag(CCM32K_Type *base)

Get the status flag.

Parameters:

base – CCM32K peripheral base address.

Returns:

The status flag of the current node. The enumerator of status flags have been provided, please see the Enumerations title for details.

ccm32k_state_t CCM32K_GetCurrentState(CCM32K_Type *base)

Get current state.

Parameters:

base – CCM32K peripheral base address.

Returns:

The CCM32K’s current state, please refer to ccm32k_state_t for details.

ccm32k_clock_source_t CCM32K_GetClockSource(CCM32K_Type *base)

Return current clock source.

Parameters:

base – CCM32K peripheral base address.

Return values:

kCCM32K_ClockSourceNone – The none clock source is selected.
kCCM32K_ClockSource32kFro – 32kHz free-running oscillator is selected as clock source.
kCCM32K_ClockSource32kOsc – 32kHz crystal oscillator is selected as clock source..

FSL_CCM32K_DRIVER_VERSION: CCM32K driver version 2.2.1.

enum _ccm32k_osc_xtal_cap

The enumerator of internal capacitance of OSC’s XTAL pin.

Values:

enumerator kCCM32K_OscXtal0pFCap: The internal capacitance for XTAL pin is 0pF.

enumerator kCCM32K_OscXtal2pFCap: The internal capacitance for XTAL pin is 2pF.

enumerator kCCM32K_OscXtal4pFCap: The internal capacitance for XTAL pin is 4pF.

enumerator kCCM32K_OscXtal6pFCap: The internal capacitance for XTAL pin is 6pF.

enumerator kCCM32K_OscXtal8pFCap: The internal capacitance for XTAL pin is 8pF.

enumerator kCCM32K_OscXtal10pFCap: The internal capacitance for XTAL pin is 10pF.

enumerator kCCM32K_OscXtal12pFCap: The internal capacitance for XTAL pin is 12pF.

enumerator kCCM32K_OscXtal14pFCap: The internal capacitance for XTAL pin is 14pF.

enumerator kCCM32K_OscXtal16pFCap: The internal capacitance for XTAL pin is 16pF.

enumerator kCCM32K_OscXtal18pFCap: The internal capacitance for XTAL pin is 18pF.

enumerator kCCM32K_OscXtal20pFCap: The internal capacitance for XTAL pin is 20pF.

enumerator kCCM32K_OscXtal22pFCap: The internal capacitance for XTAL pin is 22pF.

enumerator kCCM32K_OscXtal24pFCap: The internal capacitance for XTAL pin is 24pF.

enumerator kCCM32K_OscXtal26pFCap: The internal capacitance for XTAL pin is 26pF.

enumerator kCCM32K_OscXtal28pFCap: The internal capacitance for XTAL pin is 28pF.

enumerator kCCM32K_OscXtal30pFCap: The internal capacitance for XTAL pin is 30pF.

enum _ccm32k_osc_extal_cap

The enumerator of internal capacitance of OSC’s EXTAL pin.

Values:

enumerator kCCM32K_OscExtal0pFCap: The internal capacitance for EXTAL pin is 0pF.

enumerator kCCM32K_OscExtal2pFCap: The internal capacitance for EXTAL pin is 2pF.

enumerator kCCM32K_OscExtal4pFCap: The internal capacitance for EXTAL pin is 4pF.

enumerator kCCM32K_OscExtal6pFCap: The internal capacitance for EXTAL pin is 6pF.

enumerator kCCM32K_OscExtal8pFCap: The internal capacitance for EXTAL pin is 8pF.

enumerator kCCM32K_OscExtal10pFCap: The internal capacitance for EXTAL pin is 10pF.

enumerator kCCM32K_OscExtal12pFCap: The internal capacitance for EXTAL pin is 12pF.

enumerator kCCM32K_OscExtal14pFCap: The internal capacitance for EXTAL pin is 14pF.

enumerator kCCM32K_OscExtal16pFCap: The internal capacitance for EXTAL pin is 16pF.

enumerator kCCM32K_OscExtal18pFCap: The internal capacitance for EXTAL pin is 18pF.

enumerator kCCM32K_OscExtal20pFCap: The internal capacitance for EXTAL pin is 20pF.

enumerator kCCM32K_OscExtal22pFCap: The internal capacitance for EXTAL pin is 22pF.

enumerator kCCM32K_OscExtal24pFCap: The internal capacitance for EXTAL pin is 24pF.

enumerator kCCM32K_OscExtal26pFCap: The internal capacitance for EXTAL pin is 26pF.

enumerator kCCM32K_OscExtal28pFCap: The internal capacitance for EXTAL pin is 28pF.

enumerator kCCM32K_OscExtal30pFCap: The internal capacitance for EXTAL pin is 30pF.

enum _ccm32k_osc_fine_adjustment_value

The enumerator of osc amplifier gain fine adjustment. Changes the oscillator amplitude by modifying the automatic gain control (AGC).

Values:

enumerator kCCM32K_OscFineAdjustmentRange0

enum _ccm32k_osc_coarse_adjustment_value

The enumerator of osc amplifier coarse fine adjustment. Tunes the internal transconductance (gm) by increasing the current.

Values:

enumerator kCCM32K_OscCoarseAdjustmentRange0

enumerator kCCM32K_OscCoarseAdjustmentRange1

enumerator kCCM32K_OscCoarseAdjustmentRange2

enumerator kCCM32K_OscCoarseAdjustmentRange3

enum _ccm32k_osc_mode

The enumerator of 32kHz oscillator.

Values:

enumerator kCCM32K_Disable32kHzCrystalOsc: Disable 32kHz Crystal Oscillator.

enumerator kCCM32K_Enable32kHzCrystalOsc: Enable 32kHz Crystal Oscillator.

enumerator kCCM32K_Bypass32kHzCrystalOsc: Bypass 32kHz Crystal Oscillator, use the 32kHz Oscillator or external 32kHz clock.

The enumerator of CCM32K status flag.

Values:

enumerator kCCM32K_32kOscReadyStatusFlag: Indicates the 32kHz crystal oscillator is stable.

enumerator kCCM32K_32kOscActiveStatusFlag: Indicates the 32kHz crystal oscillator is active and in use.

enumerator kCCM32K_32kFroActiveStatusFlag: Indicates the 32kHz free running oscillator is active and in use.

enumerator kCCM32K_ClockDetectStatusFlag: Indicates the clock monitor has detected an error.

enum _ccm32k_state

The enumerator of module state.

Values:

enumerator kCCM32K_Both32kFro32kOscDisabled: Indicates both 32kHz free running oscillator and 32kHz crystal oscillator are disabled.

enumerator kCCM32K_Only32kFroEnabled: Indicates only 32kHz free running oscillator is enabled.

enumerator kCCM32K_Only32kOscEnabled: Indicates only 32kHz crystal oscillator is enabled.

enumerator kCCM32K_Both32kFro32kOscEnabled: Indicates both 32kHz free running oscillator and 32kHz crystal oscillator are enabled.

enum _ccm32k_clock_source

The enumerator of clock source.

Values:

enumerator kCCM32K_ClockSourceNone: None clock source.

enumerator kCCM32K_ClockSource32kFro: 32kHz free running oscillator is the clock source.

enumerator kCCM32K_ClockSource32kOsc: 32kHz crystal oscillator is the clock source.

enum _ccm32k_clock_monitor_freq_trim_value

Clock monitor frequency trim values.

Values:

enumerator kCCM32K_ClockMonitor2CycleAssert: Clock monitor asserts 2 cycle after expected edge (assert after 10 cycles with no edge).

enumerator kCCM32K_ClockMonitor4CycleAssert: Clock monitor asserts 4 cycle after expected edge (assert after 12 cycles with no edge).

enumerator kCCM32K_ClockMonitor6CycleAssert: Clock monitor asserts 6 cycle after expected edge (assert after 14 cycles with no edge).

enumerator kCCM32K_ClockMonitor8CycleAssert: Clock monitor asserts 8 cycle after expected edge (assert after 16 cycles with no edge).

enum _ccm32k_clock_monitor_divide_trim_value

Clock monitor divide trim values.

Values:

enumerator kCCM32K_ClockMonitor_1kHzFro32k_1kHzOsc32k: Clock monitor operates at 1 kHz for both FRO32K and OSC32K.

enumerator kCCM32K_ClockMonitor_64HzFro32k_1kHzOsc32k: Clock monitor operates at 64 Hz for FRO32K and clock monitor operates at 1 kHz for OSC32K.

enumerator kCCM32K_ClockMonitor_1KHzFro32k_64HzOsc32k: Clock monitor operates at 1K Hz for FRO32K and clock monitor operates at 64 Hz for OSC32K.

enumerator kCCM32K_ClockMonitor_64HzFro32k_64HzOsc32k: Clock monitor operates at 64 Hz for FRO32K and clock monitor operates at 64 Hz for OSC32K.

enum _ccm32k_clock_source_select

CCM32K clock source enumeration.

Values:

enumerator kCCM32K_ClockSourceSelectFro32k: FRO32K clock output is selected as clock source.

enumerator kCCM32K_ClockSourceSelectOsc32k: OSC32K clock output is selected as clock source.

enum _ccm32k_clock_output_peripheral

32kHz clock output peripheral bit map.

Values:

enumerator kCCM32K_ClockOutToRtc: 32kHz clock output to RTC.

enumerator kCCM32K_ClockOutToRfmc: 32kHz clock output to Rfmc.

enumerator kCCM32K_ClockOutToNbu: 32kHz clock output to NBU.

enumerator kCCM32K_ClockOutToWuuRmcPortD: 32kHz clock output to WUU/RMC/PORTD.

enumerator kCCM32K_ClockOutToOtherModules: 32kHz clock output to Other modules.

typedef enum _ccm32k_osc_xtal_cap ccm32k_osc_xtal_cap_t: The enumerator of internal capacitance of OSC’s XTAL pin.

typedef enum _ccm32k_osc_extal_cap ccm32k_osc_extal_cap_t: The enumerator of internal capacitance of OSC’s EXTAL pin.

typedef enum _ccm32k_osc_fine_adjustment_value ccm32k_osc_fine_adjustment_value_t: The enumerator of osc amplifier gain fine adjustment. Changes the oscillator amplitude by modifying the automatic gain control (AGC).

typedef enum _ccm32k_osc_coarse_adjustment_value ccm32k_osc_coarse_adjustment_value_t: The enumerator of osc amplifier coarse fine adjustment. Tunes the internal transconductance (gm) by increasing the current.

typedef enum _ccm32k_osc_mode ccm32k_osc_mode_t: The enumerator of 32kHz oscillator.

typedef enum _ccm32k_state ccm32k_state_t: The enumerator of module state.

typedef enum _ccm32k_clock_source ccm32k_clock_source_t: The enumerator of clock source.

typedef enum _ccm32k_clock_monitor_freq_trim_value ccm32k_clock_monitor_freq_trim_value_t: Clock monitor frequency trim values.

typedef enum _ccm32k_clock_monitor_divide_trim_value ccm32k_clock_monitor_divide_trim_value_t: Clock monitor divide trim values.

typedef struct _ccm32k_clock_monitor_config ccm32k_clock_monitor_config_t: Clock monitor configuration structure.

typedef enum _ccm32k_clock_source_select ccm32k_clock_source_select_t: CCM32K clock source enumeration.

typedef enum _ccm32k_clock_output_peripheral ccm32k_clock_output_peripheral_t: 32kHz clock output peripheral bit map.

typedef struct _ccm32k_osc_config ccm32k_osc_config_t: The structure of oscillator configuration.

CCM32K_OSC32K_CTRL_OSC_MODE_MASK

CCM32K_OSC32K_CTRL_OSC_MODE_SHIFT

CCM32K_OSC32K_CTRL_OSC_MODE(x)

struct _ccm32k_clock_monitor_config

#include <fsl_ccm32k.h>

Clock monitor configuration structure.

Public Members

bool enableClockMonitor: Used to enable/disable clock monitor.

ccm32k_clock_monitor_freq_trim_value_t freqTrimValue: Clock minitor frequency trim value.

ccm32k_clock_monitor_divide_trim_value_t divideTrimValue: Clock minitor divide trim value.

struct _ccm32k_osc_config

#include <fsl_ccm32k.h>

The structure of oscillator configuration.

Public Members

bool enableInternalCapBank: enable/disable the internal capacitance bank.

ccm32k_osc_xtal_cap_t xtalCap: The internal capacitance for the OSC XTAL pin from the capacitor bank, only useful when the internal capacitance bank is enabled.

ccm32k_osc_extal_cap_t extalCap: The internal capacitance for the OSC EXTAL pin from the capacitor bank, only useful when the internal capacitance bank is enabled.

ccm32k_osc_fine_adjustment_value_t fineAdjustment: 32kHz crystal oscillator amplifier fine adjustment value.

ccm32k_osc_coarse_adjustment_value_t coarseAdjustment: 32kHz crystal oscillator amplifier coarse adjustment value.

CDOG#

status_t CDOG_Init(CDOG_Type *base, cdog_config_t *conf)

Initialize CDOG.

This function initializes CDOG block and setting.

Parameters:

base – CDOG peripheral base address
conf – CDOG configuration structure

Returns:

Status of the init operation

void CDOG_Deinit(CDOG_Type *base)

Deinitialize CDOG.

This function deinitializes CDOG secure counter.

Parameters:

base – CDOG peripheral base address

void CDOG_GetDefaultConfig(cdog_config_t *conf)

Sets the default configuration of CDOG.

This function initialize CDOG config structure to default values.

Parameters:

conf – CDOG configuration structure

void CDOG_Stop(CDOG_Type *base, uint32_t stop)

Stops secure counter and instruction timer.

This function stops instruction timer and secure counter. This also change state od CDOG to IDLE.

Parameters:

base – CDOG peripheral base address
stop – expected value which will be compared with value of secure counter

void CDOG_Start(CDOG_Type *base, uint32_t reload, uint32_t start)

Sets secure counter and instruction timer values.

This function sets value in RELOAD and START registers for instruction timer and secure counter

Parameters:

base – CDOG peripheral base address
reload – reload value
start – start value

void CDOG_Check(CDOG_Type *base, uint32_t check)

Checks secure counter.

This function compares stop value in handler with secure counter value by writting to RELOAD refister.

Parameters:

base – CDOG peripheral base address
check – expected (stop) value

void CDOG_Set(CDOG_Type *base, uint32_t stop, uint32_t reload, uint32_t start)

Sets secure counter and instruction timer values.

This function sets value in STOP, RELOAD and START registers for instruction timer and secure counter.

Parameters:

base – CDOG peripheral base address
stop – expected value which will be compared with value of secure counter
reload – reload value for instruction timer
start – start value for secure timer

void CDOG_Add(CDOG_Type *base, uint32_t add)

Add value to secure counter.

This function add specified value to secure counter.

Parameters:

base – CDOG peripheral base address.
add – Value to be added.

void CDOG_Add1(CDOG_Type *base)

Add 1 to secure counter.

This function add 1 to secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Add16(CDOG_Type *base)

Add 16 to secure counter.

This function add 16 to secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Add256(CDOG_Type *base)

Add 256 to secure counter.

This function add 256 to secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Sub(CDOG_Type *base, uint32_t sub)

brief Substract value to secure counter

This function substract specified value to secure counter.

param base CDOG peripheral base address. param sub Value to be substracted.

void CDOG_Sub1(CDOG_Type *base)

Substract 1 from secure counter.

This function substract specified 1 from secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Sub16(CDOG_Type *base)

Substract 16 from secure counter.

This function substract specified 16 from secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Sub256(CDOG_Type *base)

Substract 256 from secure counter.

This function substract specified 256 from secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_WritePersistent(CDOG_Type *base, uint32_t value)

Set the CDOG persistent word.

Parameters:

base – CDOG peripheral base address.
value – The value to be written.

uint32_t CDOG_ReadPersistent(CDOG_Type *base)

Get the CDOG persistent word.

Parameters:

base – CDOG peripheral base address.

Returns:

The persistent word.

FSL_CDOG_DRIVER_VERSION

Defines CDOG driver version 2.1.3.

Change log:

Version 2.1.3
- Re-design multiple instance IRQs and Clocks
- Add fix for RESTART command errata
Version 2.1.2
- Support multiple IRQs
- Fix default CONTROL values
Version 2.1.1
- Remove bit CONTROL[CONTROL_CTRL]
Version 2.1.0
- Rename CWT to CDOG
Version 2.0.2
- Fix MISRA-2012 issues
Version 2.0.1
- Fix doxygen issues
Version 2.0.0
- initial version

enum __cdog_debug_Action_ctrl_enum

Values:

enumerator kCDOG_DebugHaltCtrl_Run

enumerator kCDOG_DebugHaltCtrl_Pause

enum __cdog_irq_pause_ctrl_enum

Values:

enumerator kCDOG_IrqPauseCtrl_Run

enumerator kCDOG_IrqPauseCtrl_Pause

enum __cdog_fault_ctrl_enum

Values:

enumerator kCDOG_FaultCtrl_EnableReset

enumerator kCDOG_FaultCtrl_EnableInterrupt

enumerator kCDOG_FaultCtrl_NoAction

enum __code_lock_ctrl_enum

Values:

enumerator kCDOG_LockCtrl_Lock

enumerator kCDOG_LockCtrl_Unlock

typedef uint32_t secure_counter_t

SC_ADD(add)

SC_ADD1

SC_ADD16

SC_ADD256

SC_SUB(sub)

SC_SUB1

SC_SUB16

SC_SUB256

SC_CHECK(val)

struct cdog_config_t

CE Basic Functions#

int32_t CE_ExecCmd(void)

Executes commands in the command queue.

Returns:: Command execution status.

int32_t CE_NullCmd(void)

Sends a basic command to verify that ZV2117 is operational and that the command interface is functioning properly.

This function passes through the command processing interface and returns a success status.

Returns:: Command execution status.

int32_t CE_Copy(int32_t *pDst, int32_t *pSrc, const int32_t N)

Copies data between buffers in the ZV2117 memory section.

Copies a specified number of 32-bit words from the source to the destination buffer. Both buffers must reside in the ZV2117 data memory section.

Parameters:

pDst – [out] Pointer to destination buffer
pSrc – [in] Pointer to source buffer
N – [in] Number of 32-bit words to copy

Returns:

Command execution status.

CE Command Functions#

int32_t CE_CmdInitBuffer(ce_cmdbuffer_t *psCmdBuffer, volatile uint32_t cmdbuffer[], volatile int32_t statusbuffer[], ce_cmd_mode_t cmdmode)

Initializes the CM33-ZV2117 command buffer.

This function must to be called once after power-up or reset, or when the command queue mode needs to be changed. Once configured, the command mode remains unchanged till reset or re-initialization.

Parameters:

psCmdBuffer – [out] Pointer to the command buffer structure. Must be allocated in ARM memory (not ZV2117).
cmdbuffer – [in] Command buffer. Must be 256 words in ZV2117 data memory.
statusbuffer – [in] Status buffer. Must be 134 words in ZV2117 data memory.
cmdmode – [in] Command mode. One of:
- kCE_CmdModeOneNonBlocking
- kCE_CmdModeMultipleNonBlocking
- kCE_CmdModeOneBlocking
- kCE_CmdModeMultipleBlocking

Return values:

0 – Initialization is successful.

int32_t CE_CmdReset(void)

Resets the CM33-ZV2117 command queue.

Any pending commands in the queue will be flushed.

Return values:: 0 – Reset is successful.

int32_t CE_CmdAdd(ce_cmd_t cmd, ce_cmdstruct_t *cmdargs)

Adds a command to the command queue.

Parameters:

cmd – [in] Command name. Choose from the enum description in fsl_ce_if.h. Not all of the cmd are implemented in the current release.
cmdargs – [in] Arguments structure detailing the arguments for the function/command.

Return values:

0 – Command added successfully.
-1 – Command not added (queue is full).

int32_t CE_CmdLaunch(int32_t force_launch)

Launches the ZV2117 with the current command queue.

Parameters:

force_launch – [in]
- 1: Launches the queue regardless of the command mode.
- 0: Launches only if in single-command mode. Otherwise, does nothing.

Return values:

0 – Launch is successful.

int32_t CE_CmdLaunchBlocking(void)

Launches the current command queue and waits for completion.

Return values:: 0 – Launch is successful.

int32_t CE_CmdLaunchNonBlocking(void)

Launches the current command queue and returns immediately.

ZV2117 will send an interrupt via MUA->GCR to ARM upon task completion. Alternatively, the user can poll for completion.

If using interrupt, the user must call CE_CmdReset() in the IRQ handler. IRQ::DSP_IRQn must be enabled.

The user can optionally also poll to figure out the command queue execution status.

Return values:: 0 – Launch is successful.

int32_t CE_CmdCheckStatus(void)

Checks the execution status of the current command queue. Only applicable in non-blocking mode.

Returns:

CE_STATUS_BUSY ZV2117 is still executing.
CE_STATUS_IDLE Execution completed; ZV2117 is ready for new commands.

CE_COMPUTE_TIMEOUT

Maximum loop wait time for CE computation.

When CE is computing, driver will wait for the computation to complete. This parameter defines how many loops to check completion before return timeout. If defined as 0, driver will wait forever until completion.

CE CMSIS Functions#

void ce_arm_cfft_f32(const arm_cfft_instance_f32 *S, float *p1, uint8_t ifftFlag, uint8_t bitReverseFlag, float *pOut, float *pScratch)

CMSIS-compatible FFT implementation using ZV2117 backend.

This API is designed to be compatible with the ARM CM33 FFT interface. It delegates the FFT computation to the ZV2117 CE module. Please refer to CM33 documentation for details.

Note

This API only support float32 FFTs.

struct arm_cfft_instance_f32

#include <fsl_ce_cmsis.h>

FFT/IFFT float32.

Public Members

uint16_t fftLen: Length of the FFT.

const float *pTwiddle: Points to the twiddle factor table.

const uint16_t *pBitRevTable: Points to the bit reversal table.

uint16_t bitRevLength: Length of the bit reversal table.

CE Initialization Functions#

FSL_CE_DRIVER_VERSION: CE driver version.

typedef struct _ce_copy_image ce_copy_image_t

Structure for CE copy image to destination address.

Defines source and destination address for copying image with given size.

void CE_Init(ce_copy_image_t *ceCopyImage)

Initializes the CE.

Parameters:

ceCopyImage – [in] The information about the CE image to copy.

void CE_InstallFirmware(ce_copy_image_t *ceCopyImage)

Installs CE firmware by given image info.

Parameters:

ceCopyImage – [in] The information about the CE image to copy.

void CE_InitWithoutFirmware(void)

Initializes the CE.

This function is similar to CE_Init, but it does not install the firmware, the firmware can be installed using CE_InstallFirmware.

struct _ce_copy_image

#include <fsl_ce.h>

Structure for CE copy image to destination address.

Defines source and destination address for copying image with given size.

CE Matrix Functions#

int32_t CE_MatrixAdd_Q15(int16_t *pDst, int16_t *pA, int16_t *pB, int32_t M, int32_t N)

Calculates the sum of two real 16-bit integer (Q15) matrices.

Computes C = A + B, where A, B, and C are an M × N real int16_t matrices. All matrices are assumed to have the same format and dimensions.

Parameters:

pDst – [out] Pointer to the output matrix C (size M × N).
pA – [in] Pointer to the input matrix A (size M × N).
pB – [in] Pointer to the input matrix B (size M × N).
M – [in] Number of rows of matrices A, B, and C.
N – [in] Number of columns of matrices A, B, and C.

Returns:

Command execution status.

int32_t CE_MatrixAdd_Q31(int32_t *pDst, int32_t *pA, int32_t *pB, int32_t M, int32_t N)

Calculates the sum of two real 32-bit integer (Q31) matrices.

Computes C = A + B, where A, B, and C are an M × N real int32_t matrices. All matrices are assumed to have the same format and dimensions.

Parameters:

pDst – [out] Pointer to the output matrix C (size M × N).
pA – [in] Pointer to the input matrix A (size M × N).
pB – [in] Pointer to the input matrix B (size M × N).
M – [in] Number of rows of matrices A, B, and C.
N – [in] Number of columns of matrices A, B, and C.

Returns:

Command execution status.

int32_t CE_MatrixAdd_F32(float *pDst, float *pA, float *pB, int32_t M, int32_t N)

Calculates the sum of two real 32-bit floating-point matrices.

Computes C = A + B, where A, B, and C are an M × N real float32 matrices. All matrices are assumed to have the same format and dimensions.

Parameters:

pDst – [out] Pointer to the output matrix C (size M × N).
pA – [in] Pointer to the input matrix A (size M × N).
pB – [in] Pointer to the input matrix B (size M × N).
M – [in] Number of rows of matrices A, B, and C.
N – [in] Number of columns of matrices A, B, and C.

Returns:

Command execution status.

int32_t CE_MatrixElemMul_F32(float *pDst, float *pA, float *pB, int32_t M, int32_t N)

Calculates the element-wise product of two real 32-bit floating-point matrices.

Computes C = A .× B, where A, B, and C are an M × N real float32 matrices. All matrices are assumed to have the same format and dimensions.

Parameters:

pDst – [out] Pointer to the output matrix C (size M × N).
pA – [in] Pointer to the input matrix A (size M × N).
pB – [in] Pointer to the input matrix B (size M × N).
M – [in] Number of rows of matrices A, B, and C.
N – [in] Number of columns of matrices A, B, and C.

Returns:

Command execution status.

int32_t CE_MatrixMul_F32(float *pDst, float *pA, float *pB, int32_t M, int32_t N, int32_t P)

Calculates the matrix product of two real 32-bit floating-point matrices.

Computes C = A × B, where:

A is an M × N real float32 matrix,
B is an N × P real float32 matrix,
C is the resulting M × P real float32 matrix.

All matrices are assumed to be in row-major format.

Note

Data precision and format is as defined by the argument type. Limits on max value of N:

For F32: N < 128;
For CF32: N < 64.

Parameters:

pDst – [out] Pointer to the output matrix C (size M × P)
pA – [in] Pointer to the input matrix A (size M × N).
pB – [in] Pointer to the input matrix B (size N × P).
M – [in] Number of rows of matrix A.
N – [in] Number of columns in matrix A (and rows in matrix B).
P – [in] Number of columns of matrix B.

Returns:

Command execution status.

int32_t CE_MatrixMul_CF32(float *pDst, float *pA, float *pB, int32_t M, int32_t N, int32_t P)

Calculates the matrix product of two complex 32-bit floating point matrices.

Computes C = A × B, where:

A is an M × N complex float32 matrix,
B is an N × P complex float32 matrix,
C is the resulting M × P complex float32 matrix.

All matrices are assumed to be in row-major format.

Parameters:

pDst – [out] Pointer to the output matrix C (size M × P).
pA – [in] Pointer to the input matrix A (size M × N).
pB – [in] Pointer to the input matrix B (size N × P).
M – [in] Number of rows of matrix A.
N – [in] Number of columns in matrix A (and rows in matrix B).
P – [in] Number of columns of matrix B.

Returns:

Command execution status.

int32_t CE_MatrixInvHerm_CF32(float *pAinv, float *pA, float *pScratch, int32_t M, uint8_t flag_packedInput, uint8_t flag_cholInv)

Calculates the inverse or Cholesky inverse of a complex Hermitian matrix (in float32 precision).

Computes one of the following:

Ainv = inv(A)
Ainv = inv(chol(A))

where chol(A) is the lower triangular Cholesky decomposition of matrix A.

The input matrix must be in row-major format and can be either:

A full M × M matrix, or
A packed upper triangular matrix (containing only the upper triangle).

The output matrix is written in row-major format, and only the lower triangle is stored. The total number of output elements is:

Mc = (M + 1) × M / 2

Note

The input, output and scratch buffers must be separately allocated and non-overlapping.

Parameters:

pAinv – [out] Pointer to the output matrix inverse. Mc elements are written (complex float32).
pA – [in] Pointer to the input matrix A (complex float32, size M × M).
pScratch – [in] Pointer to scratch buffer (minimum size Mc × 3 × 8 bytes).
M – [in] Number of rows/columns in matrix A.
flag_packedInput – [in] Format of input matrix:
- 0: full matrix
- 1: packed upper triangular matrix
flag_cholInv – [in] Type of inverse to compute:
- 0: inv(A)
- 1: inv(chol(A))

Returns:

Command execution status.

int32_t CE_MatrixEvdHerm_CF32(float *pLambdaOut, float *pUout, float *pUin, float *pScratch, int32_t M, float tol, int32_t max_iter, uint8_t flag_packedInput)

Calculates the Eigenvalue Decomposition (EVD) of a complex Hermitian matrix (float32 precision).

Performs EVD on an M×M complex Hermitian matrix A:

[U, T] = eig(A)

The input matrix must be in column-major format and can be either:

A full M × M matrix, or
A packed upper triangular matrix.

The decomposition uses an iterative QR algorithm to compute:

U: matrix of eigenvectors (M × M, column-major)
T: vector of eigenvalues (M × 1)

Maximum supported matrix size: M ≤ 40.

Note

If input and output buffers overlap, the output U matrix will overwrite the input matrix A.

Parameters:

pLambdaOut – [out] Pointer to the output vector of eigenvalues (size M × 1, complex float32).
pUout – [out] Pointer to the output matrix of eigenvectors (size M × M, column-major, complex float32).
pUin – [in] Pointer to the input matrix A (size M × M, column-major, complex float32).
pScratch – [in] Pointer to scratch buffer (minimum size: (M × M × 4 + 360) × 4 bytes).
M – [in] Number of rows/columns in matrix A.
tol – [in] Tolerance value for QR convergence. Smaller values yield better accuracy but require more iterations.
max_iter – [in] Maximum number of QR iterations. If exceeded, the function terminates regardless of convergence.
flag_packedInput – [in] Format of input matrix:
- 0: full matrix
- 1: packed upper triangular part only

Returns:

Command execution status. The number of QR iterations is returned in status[3] register.

int32_t CE_MatrixChol_CF32(float *pL, float *pA, float *pScratch, int32_t M, uint8_t flag_packedInput)

Calculates the Cholesky Decomposition of a complex Hermitian matrix (float32 precision).

Calculates L = chol(A), where A is a complex Hermitian M × M matrix and L is a lower triangular matrix such that A = L × L ^ H.

The input matrix must be in row-major format and can be either:

A full M × M matrix, or
A packed format containing only the upper triangular elements.

The output matrix is also in row-major format, and only the lower triangular part is written. The total number of output elements is Mc, where:

Mc = (M + 1) × M / 2

Note

The input, output and scratch buffers must be separately allocated and non-overlapping.

Parameters:

pL – [out] Pointer to the output lower triangular matrix L. Only Mc elements are written (complex-valued float32 data in row-major format).
pA – [in] Pointer to the input matrix A (full or packed format). Must be complex-valued float32 data in row-major format.
pScratch – [in] Pointer to a scratch buffer (at least Mc × 8 bytes).
M – [in] Number of rows/columns of matrix A.
flag_packedInput – [in] Format flag for input matrix:
- 0: full matrix
- 1: packed upper triangular matrix

Returns:

Command execution status.

CE Transform Functions#

int32_t CE_TransformCFFT_F16(float *pY, float *pX, float *pScratch, int32_t log2N)

Computes the FFT of complex-valued 16-bit floating point data.

Performs an N-point Fast Fourier Transform (FFT) on a complex-valued float16 input stream. The FFT size N must be a power of 2, with valid range: 16 ≤ N ≤ 16384.

Note

Data precision and format follow the argument types.
float* is used to represent float16 pointers.
The input, output and scratch buffers must be separately allocated and non-overlapping.

Parameters:

pY – [out] Pointer to the FFT output buffer (complex-valued float16 data).
pX – [in] Pointer to the FFT input buffer (complex-valued float16 data).
pScratch – [in] Pointer to a scratch buffer (at least N × 4 bytes).
log2N – [in] Base-2 logarithm of the FFT size N.

Returns:

Command execution status.

int32_t CE_TransformCFFT_F32(float *pY, float *pX, float *pScratch, int32_t log2N)

Computes the FFT of complex-valued 32-bit floating point data.

Performs an N-point Fast Fourier Transform (FFT) on a complex-valued float32 input stream. The FFT size N must be a power of 2, with valid range: 32 ≤ N ≤ 16384.

Note

The input, output and scratch buffers must be separately allocated and non-overlapping.

Parameters:

pY – [out] Pointer to the FFT output buffer (complex-valued float32).
pX – [in] Pointer to the FFT input buffer (complex-valued float32).
pScratch – [in] Pointer to a scratch buffer (at least N × 8 bytes).
log2N – [in] Base-2 logarithm of the FFT size N.

Returns:

Command execution status.

int32_t CE_TransformIFFT_F16(float *pY, float *pX, float *pScratch, int32_t log2N)

Computes the IFFT of complex-valued 16-bit floating point data.

Performs an N-point Inverse Fast Fourier Transform (IFFT) on a complex-valued float16 input stream. The IFFT size N must be a power of 2, with valid range: 16 ≤ N ≤ 16384.

Note

Data precision and format follow the argument types.
float* is used to represent float16 pointers.
The input, output and scratch buffers must be separately allocated and non-overlapping.

Parameters:

pY – [out] Pointer to the IFFT output buffer (complex-valued float16).
pX – [in] Pointer to the IFFT input buffer (complex-valued float16).
pScratch – [in] Pointer to a scratch buffer (at least N × 4 bytes).
log2N – [in] Base-2 logarithm of the IFFT size N.

Returns:

Command execution status.

int32_t CE_TransformIFFT_F32(float *pY, float *pX, float *pScratch, int32_t log2N)

Computes the IFFT of complex-valued 32-bit floating point data.

Performs an N-point Inverse Fast Fourier Transform (IFFT) on a complex-valued float32 input stream. The IFFT size N must be a power of 2, with valid range: 32 ≤ N ≤ 16384.

Note

The input, output and scratch buffers must be separately allocated and non-overlapping.

Parameters:

pY – [out] Pointer to the IFFT output buffer (complex-valued float32).
pX – [in] Pointer to the IFFT input buffer (complex-valued float32).
pScratch – [in] Pointer to a scratch buffer (at least N × 8 bytes).
log2N – [in] Base-2 logarithm of the IFFT size N.

Returns:

Command execution status.

Clock Driver#

enum _clock_name

Clock name used to get clock frequency.

These clocks source would be generated from SCG module.

Values:

enumerator kCLOCK_CoreSysClk: Cortex M33 clock.

enumerator kCLOCK_SlowClk: SLOW_CLK with DIVSLOW.

enumerator kCLOCK_PlatClk: PLAT_CLK.

enumerator kCLOCK_SysClk: SYS_CLK.

enumerator kCLOCK_BusClk: BUS_CLK with DIVBUS.

enumerator kCLOCK_ScgSysOscClk: SCG system OSC clock.

enumerator kCLOCK_ScgSircClk: SCG SIRC clock.

enumerator kCLOCK_ScgFircClk: SCG FIRC clock.

enumerator kCLOCK_RtcOscClk: RTC OSC clock.

enum _clock_ip_control

Clock source for peripherals that support various clock selections.

These options are for MRCC->XX[CC]

Values:

enumerator kCLOCK_IpClkControl_fun0: Peripheral clocks are disabled, module does not stall low power mode entry.

enumerator kCLOCK_IpClkControl_fun1: Peripheral clocks are enabled, module does not stall low power mode entry.

enumerator kCLOCK_IpClkControl_fun2: Peripheral clocks are enabled unless module is idle, low power mode entry stalls until module is idle.

enumerator kCLOCK_IpClkControl_fun3: Peripheral clocks are enabled unless in SLEEP (or lower) mode, low power mode entry stalls until module is idle. Peripheral functional clocks that remain enabled in SLEEP mode are enabled and do not stall low power mode entry unless entering DEEPSLEEP (or lower) mode.

enum _clock_ip_src

Clock source for peripherals that support various clock selections.

These options are for MRCC->XX[MUX].

Values:

enumerator kCLOCK_IpSrcFro6M: FRO 6M clock.

enumerator kCLOCK_IpSrcFro192M: FRO 192M clock.

enumerator kCLOCK_IpSrcSoscClk: OSC RF clock.

enumerator kCLOCK_IpSrc32kClk: 32k Clk clock.

enumerator kCLOCK_IpSrcFro200M: FRO_200M clock for CAN.

enumerator kCLOCK_IpSrc1M: 1MHZ is derived out of FRO6M.

enum _clock_ip_name

Clock IP name.

Values:

enumerator kCLOCK_NOGATE: No clock gate for the IP in MRCC

enumerator kCLOCK_Lpadc0: Clock adc0

enumerator kCLOCK_Aoi0: Clock aoi0

enumerator kCLOCK_Atx0: Clock atx0

enumerator kCLOCK_CLK_1M: Clock clk_1m

enumerator kCLOCK_CLK_6M: Clock clk_6m

enumerator kCLOCK_CLK_32M: Clock clk_32m

enumerator kCLOCK_Cmp0: Clock cmp0

enumerator kCLOCK_Crc0: Clock crc0

enumerator kCLOCK_Crc1: Clock crc1

enumerator kCLOCK_Data_stream_2p4: Clock data_stream_2p4

enumerator kCLOCK_Dma0: Clock dma

enumerator kCLOCK_Dsp_ramc0: Clock dsp_ramc0

enumerator kCLOCK_Edt_cc: Clock edt_cc

enumerator kCLOCK_Ewm0: Clock ewm0

enumerator kCLOCK_Ezramc_ram0: Clock ezramc_ram0

enumerator kCLOCK_Ezramc_ram1: Clock ezramc_ram1

enumerator kCLOCK_Ezramc_ram2: Clock ezramc_ram2

enumerator kCLOCK_Ezramc_ram3: Clock ezramc_ram3

enumerator kCLOCK_Can0: Clock Can0

enumerator kCLOCK_Flexpwm0: Clock flexpwm0

enumerator kCLOCK_Fmc: Clock fmc

enumerator kCLOCK_Fro200m: Clock FRO200M

enumerator kCLOCK_Fro_hf_div: Clock fro_hf_div

enumerator kCLOCK_Gdet_wrapper: Clock gdet_wrapper

enumerator kCLOCK_GpioA: Clock gpioA

enumerator kCLOCK_GpioB: Clock gpioB

enumerator kCLOCK_GpioC: Clock gpioC

enumerator kCLOCK_Intm: Clock intm

enumerator kCLOCK_Ipsync_Trng0: Clock IPSYNC_TRNG0

enumerator kCLOCK_Itrc: Clock itrc

enumerator kCLOCK_Lpi2c0: Clock lpi2c0

enumerator kCLOCK_Lpi2c1: Clock lpi2c1

enumerator kCLOCK_Lpit0: Clock lpit0

enumerator kCLOCK_Lpspi0: Clock lpspi0

enumerator kCLOCK_Lpspi1: Clock lpspi1

enumerator kCLOCK_Lpspi2: Clock lpspi2

enumerator kCLOCK_Lptmr0: Clock lptmr0

enumerator kCLOCK_Lptmr1: Clock lptmr1

enumerator kCLOCK_Lpuart0: Clock lpuart0

enumerator kCLOCK_Lpuart1: Clock lpuart1

enumerator kCLOCK_Mtr: Clock mtr

enumerator kCLOCK_Mu0: Clock mu0

enumerator kCLOCK_Mu1: Clock mu1

enumerator kCLOCK_Pkc_Ram_Ctrl: Clock pck_ram_ctrl

enumerator kCLOCK_Pkc_wrapper: Clock pkc_wrapper

enumerator kCLOCK_PortA: Clock portA

enumerator kCLOCK_PortB: Clock portB

enumerator kCLOCK_PortC: Clock portC

enumerator kCLOCK_Romcp: Clock romcp

enumerator kCLOCK_Sema: Clock Sema

enumerator kCLOCK_Sfa0: Clock sfa0

enumerator kCLOCK_Sfa1: Clock sfa1

enumerator kCLOCK_Sgi0: Clock sgi0

enumerator kCLOCK_Syspm0: Clock syspm

enumerator kCLOCK_Tcu: Clock Tcu

enumerator kCLOCK_Tpm0: Clock tpm0

enumerator kCLOCK_Tpm1: Clock tpm1

enumerator kCLOCK_Tpm2: Clock tpm2

enumerator kCLOCK_Tpm3: Clock tpm3

enumerator kCLOCK_Tpm4: Clock tpm4

enumerator kCLOCK_Trgmux0: Clock trgmux0

enumerator kCLOCK_Tstmr0: Clock tstmr0

enumerator kCLOCK_Udf0: Clock udf0

enumerator kCLOCK_Uteal1: Clock uteal_1

enumerator kCLOCK_Wdog0: Clock wdog0

enumerator kCLOCK_Wdog1: Clock wdog1

enumerator kCLOCK_Zenv_core: Clock zenv_core

enum _scg_status

SCG status return codes.

Values:

enumerator kStatus_SCG_Busy: Clock is busy.

enumerator kStatus_SCG_InvalidSrc: Invalid source.

enum _scg_sys_clk

SCG system clock type.

Values:

enumerator kSCG_SysClkSlow: System slow clock.

enumerator kSCG_SysClkBus: Bus clock.

enumerator kSCG_SysClkPlatform: Platform clock.

enumerator kSCG_SysClkCore: Core clock.

enum _scg_sys_clk_src

SCG system clock source.

Values:

enumerator kSCG_SysClkSrcSysOsc: System OSC.

enumerator kSCG_SysClkSrcSirc: Slow IRC.

enumerator kSCG_SysClkSrcFirc: Fast IRC.

enumerator kSCG_SysClkSrcRosc: RTC OSC.

enum _scg_sys_clk_div

SCG system clock divider value.

Values:

enumerator kSCG_SysClkDivBy1: Divided by 1.

enumerator kSCG_SysClkDivBy2: Divided by 2.

enumerator kSCG_SysClkDivBy3: Divided by 3.

enumerator kSCG_SysClkDivBy4: Divided by 4.

enumerator kSCG_SysClkDivBy5: Divided by 5.

enumerator kSCG_SysClkDivBy6: Divided by 6.

enumerator kSCG_SysClkDivBy7: Divided by 7.

enumerator kSCG_SysClkDivBy8: Divided by 8.

enumerator kSCG_SysClkDivBy9: Divided by 9.

enumerator kSCG_SysClkDivBy10: Divided by 10.

enumerator kSCG_SysClkDivBy11: Divided by 11.

enumerator kSCG_SysClkDivBy12: Divided by 12.

enumerator kSCG_SysClkDivBy13: Divided by 13.

enumerator kSCG_SysClkDivBy14: Divided by 14.

enumerator kSCG_SysClkDivBy15: Divided by 15.

enumerator kSCG_SysClkDivBy16: Divided by 16.

enum _clock_clkout_src

SCG clock out configuration (CLKOUTSEL).

Values:

enumerator kClockClkoutSelScgSlow: SCG Slow clock.

enumerator kClockClkoutSelSosc: System OSC.

enumerator kClockClkoutSelSirc: Slow IRC.

enumerator kClockClkoutSelFirc: Fast IRC.

enumerator kClockClkoutSelScgRtcOsc: SCG RTC OSC clock.

enum _scg_sosc_monitor_mode

SCG system OSC monitor mode.

Values:

enumerator kSCG_SysOscMonitorDisable: Monitor disabled.

enumerator kSCG_SysOscMonitorInt: Interrupt when the SOSC error is detected.

enumerator kSCG_SysOscMonitorReset: Reset when the SOSC error is detected.

SOSC enable mode.

Values:

enumerator kSCG_SoscDisable: Disable SOSC clock.

enumerator kSCG_SoscEnable: Enable SOSC clock.

enumerator kSCG_SoscEnableInSleep: Enable SOSC in sleep mode.

enum _scg_rosc_monitor_mode

SCG ROSC monitor mode.

Values:

enumerator kSCG_RoscMonitorDisable: Monitor disabled.

enumerator kSCG_RoscMonitorInt: Interrupt when the RTC OSC error is detected.

enumerator kSCG_RoscMonitorReset: Reset when the RTC OSC error is detected.

enum _scg_sirc_enable_mode

SIRC enable mode.

Values:

enumerator kSCG_SircDisableInSleep: Disable SIRC clock.

enumerator kSCG_SircEnableInSleep: Enable SIRC in sleep mode.

enum _scg_firc_trim_mode

SCG fast IRC trim mode.

Values:

enumerator kSCG_FircTrimNonUpdate: FIRC trim enable but not enable trim value update. In this mode, the trim value is fixed to the initialized value which is defined by trimCoar and trimFine in configure structure scg_firc_trim_config_t.

enumerator kSCG_FircTrimUpdate: FIRC trim enable and trim value update enable. In this mode, the trim value is auto update.

enum _scg_firc_trim_src

SCG fast IRC trim source.

Values:

enumerator kSCG_FircTrimSrcSysOsc: System OSC.

enumerator kSCG_FircTrimSrcRtcOsc: RTC OSC (32.768 kHz).

FIRC enable mode.

Values:

enumerator kSCG_FircDisable: Disable FIRC clock.

enumerator kSCG_FircEnable: Enable FIRC clock.

enumerator kSCG_FircEnableInSleep: Enable FIRC in sleep mode.

enum _scg_firc_range

SCG fast IRC clock frequency range.

Values:

enumerator kSCG_FircRange48M: Fast IRC is trimmed to 48 MHz.

enumerator kSCG_FircRange64M: Fast IRC is trimmed to 64 MHz.

enumerator kSCG_FircRange96M: Fast IRC is trimmed to 96 MHz.

enumerator kSCG_FircRange192M: Fast IRC is trimmed to 192 MHz.

enum _tstmr_clk_sel

Values:

enumerator kTSTMR_ClkSel_ClkRoot12M

enumerator kTSTMR_ClkSel_FIRCDix

enumerator kTSTMR_ClkSel_SOSC

enumerator kTSTMR_ClkSel_32kHz

enumerator kTSTMR_ClkSel_200MHz

enumerator kTSTMR_ClkSel_1MHz: TSTMR 1MHz precision.

enumerator kTSTMR_ClkSel_Null: TSTMR not counting.

enumerator kTSTMR_ClkSel_IPCClkDiv

typedef enum _clock_name clock_name_t

Clock name used to get clock frequency.

These clocks source would be generated from SCG module.

typedef enum _clock_ip_control clock_ip_control_t

Clock source for peripherals that support various clock selections.

These options are for MRCC->XX[CC]

typedef enum _clock_ip_src clock_ip_src_t

Clock source for peripherals that support various clock selections.

These options are for MRCC->XX[MUX].

typedef enum _clock_ip_name clock_ip_name_t: Clock IP name.

typedef enum _scg_sys_clk scg_sys_clk_t: SCG system clock type.

typedef enum _scg_sys_clk_src scg_sys_clk_src_t: SCG system clock source.

typedef enum _scg_sys_clk_div scg_sys_clk_div_t: SCG system clock divider value.

typedef struct _scg_sys_clk_config scg_sys_clk_config_t: SCG system clock configuration.

typedef enum _clock_clkout_src clock_clkout_src_t: SCG clock out configuration (CLKOUTSEL).

typedef enum _scg_sosc_monitor_mode scg_sosc_monitor_mode_t: SCG system OSC monitor mode.

typedef struct _scg_sosc_config scg_sosc_config_t: SCG system OSC configuration.

typedef enum _scg_rosc_monitor_mode scg_rosc_monitor_mode_t: SCG ROSC monitor mode.

typedef struct _scg_rosc_config scg_rosc_config_t: SCG ROSC configuration.

typedef enum _scg_sirc_enable_mode scg_sirc_enable_mode_t: SIRC enable mode.

typedef struct _scg_sirc_config scg_sirc_config_t: SCG slow IRC clock configuration.

typedef enum _scg_firc_trim_mode scg_firc_trim_mode_t: SCG fast IRC trim mode.

typedef enum _scg_firc_trim_src scg_firc_trim_src_t: SCG fast IRC trim source.

typedef struct _scg_firc_trim_config scg_firc_trim_config_t: SCG fast IRC clock trim configuration.

typedef enum _scg_firc_range scg_firc_range_t: SCG fast IRC clock frequency range.

typedef struct _scg_firc_config_t scg_firc_config_t: SCG fast IRC clock configuration.

typedef enum _tstmr_clk_sel tstmr_clk_sel_t

volatile uint32_t g_xtal0Freq

External XTAL0 (OSC0/SYSOSC) clock frequency.

The XTAL0/EXTAL0 (OSC0/SYSOSC) clock frequency in Hz. When the clock is set up, use the function CLOCK_SetXtal0Freq to set the value in the clock driver. For example, if XTAL0 is 8 MHz:

CLOCK_InitSysOsc(...);
CLOCK_SetXtal0Freq(8000000);

This is important for the multicore platforms where only one core needs to set up the OSC0/SYSOSC using CLOCK_InitSysOsc. All other cores need to call the CLOCK_SetXtal0Freq to get a valid clock frequency.

volatile uint32_t g_xtal32Freq

External XTAL32/EXTAL32 clock frequency.

The XTAL32/EXTAL32 clock frequency in Hz. When the clock is set up, use the function CLOCK_SetXtal32Freq to set the value in the clock driver.

This is important for the multicore platforms where only one core needs to set up the clock. All other cores need to call the CLOCK_SetXtal32Freq to get a valid clock frequency.

static inline void CLOCK_StartTstmr0(tstmr_clk_sel_t src, clock_ip_control_t cc)

Specific clock enablement for TSTMR0 : need to configure source clock.

Parameters:

src – which source clock to count tstmr_clk_sel_t.
cc – clock control clock_ip_control_t.

static inline volatile uint32_t *CLOCK_GetClockDivider(clock_ip_name_t name)

Check if the clock has a clock divider register.

Parameters:

name – Clock name

Returns:

true if clock divider exists, false otherwise

static inline void CLOCK_EnableClockLPMode(clock_ip_name_t name, clock_ip_control_t control)

Enable the clock for specific IP in low power mode.

Parameters:

name – Which clock to enable, see clock_ip_name_t.
control – Clock Config, see clock_ip_control_t.

static inline void CLOCK_EnableClock(clock_ip_name_t name)

Enable the clock for specific IP.

Parameters:

name – Which clock to enable, see clock_ip_name_t.

static inline void CLOCK_DisableClock(clock_ip_name_t name)

Disable the clock for specific IP.

Parameters:

name – Which clock to disable, see clock_ip_name_t.

static inline void CLOCK_SetIpSrc(clock_ip_name_t name, clock_ip_src_t src)

Set the clock source for specific IP module.

Set the clock source for specific IP, not all modules need to set the clock source, should only use this function for the modules need source setting.

Parameters:

name – Which peripheral to check, see clock_ip_name_t.
src – Clock source to set.

static inline void CLOCK_SetIpSrcDiv(clock_ip_name_t name, uint8_t divValue)

Set the clock source and divider for specific IP module.

Set the clock source and divider for specific IP, not all modules need to set the clock source and divider, should only use this function for the modules need source and divider setting.

Divider output clock = Divider input clock / (divValue + 1U)).

Parameters:

name – Which peripheral to check, see clock_ip_name_t.
divValue – The divider value.

uint32_t CLOCK_GetFreq(clock_name_t clockName)

Gets the clock frequency for a specific clock name.

This function checks the current clock configurations and then calculates the clock frequency for a specific clock name defined in clock_name_t.

Parameters:

clockName – Clock names defined in clock_name_t

Returns:

Clock frequency value in hertz

uint32_t CLOCK_GetCoreSysClkFreq(void)

Get the core clock or system clock frequency.

Returns:: Clock frequency in Hz.

uint32_t CLOCK_GetPlatClkFreq(void)

Get the platform clock frequency.

Returns:: Clock frequency in Hz.

uint32_t CLOCK_GetBusClkFreq(void)

Get the bus clock frequency.

Returns:: Clock frequency in Hz.

uint32_t CLOCK_GetFlashClkFreq(void)

Get the flash clock frequency.

Returns:: Clock frequency in Hz.

uint32_t CLOCK_GetIpFreq(clock_ip_name_t name)

Gets the functional clock frequency for a specific IP module.

This function gets the IP module’s functional clock frequency based on MRCC registers. It is only used for the IP modules which could select clock source by MRCC[PCS].

Parameters:

name – Which peripheral to get, see clock_ip_name_t.

Returns:

Clock frequency value in Hz

FSL_CLOCK_DRIVER_VERSION: CLOCK driver version 1.0.0.

SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY

EDMA_CLOCKS: Clock ip name array for EDMA.

SYSPM_CLOCKS: Clock ip name array for SYSPM.

SFA_CLOCKS: Clock ip name array for SFA.

CRC_CLOCKS: Clock ip name array for CRC.

TPM_CLOCKS: Clock ip name array for TPM.

LPI2C_CLOCKS: Clock ip name array for LPI2C.

LPSPI_CLOCKS: Clock ip name array for LPSPI.

LPUART_CLOCKS: Clock ip name array for LPUART.

PORT_CLOCKS: Clock ip name array for PORT.

LPADC_CLOCKS: Clock ip name array for LPADC.

LPCMP_CLOCKS: Clock ip name array for LPCMP.

GPIO_CLOCKS: Clock ip name array for GPIO.

LPIT_CLOCKS: Clock ip name array for LPIT.

RF_CLOCKS: Clock ip name array for RF.

WDOG_CLOCKS: Clock ip name array for WDOG.

FLEXCAN_CLOCKS: Clock ip name array for FLEXCAN.

TSTMR_CLOCKS: Clock ip name array for TSTMR.

EWM_CLOCKS: Clock ip name array for EWM.

SEMA42_CLOCKS: Clock ip name array for SEMA.

MU_CLOCKS: Clock gate name array for MU.

LPTMR_CLOCKS: Clock ip name array for LPTMR.

TRNG_CLOCKS: Clock ip name array for TRNG.

AOI_CLOCKS: Clock ip name array for AOI.

PWM_CLOCKS: Clock ip name array for PWM.

GDET_CLOCKS: Clock ip name array for GDET.

MAKE_MRCC_REGADDR(base, offset): “IP Connector name definition used for clock gate, clock source and clock divider setting. It is defined as the corresponding register address.

CLOCK_REG(name)

uint32_t CLOCK_GetSysClkFreq(scg_sys_clk_t type)

Gets the SCG system clock frequency.

This function gets the SCG system clock frequency. These clocks are used for core, platform, external, and bus clock domains.

Parameters:

type – Which type of clock to get, core clock or slow clock.

Returns:

Clock frequency.

static inline void CLOCK_SetRunModeSysClkConfig(const scg_sys_clk_config_t *config)

Sets the system clock configuration for RUN mode.

This function sets the system clock configuration for RUN mode.

Parameters:

config – Pointer to the configuration.

static inline void CLOCK_GetCurSysClkConfig(scg_sys_clk_config_t *config)

Gets the system clock configuration in the current power mode.

This function gets the system configuration in the current power mode.

Parameters:

config – Pointer to the configuration.

static inline void CLOCK_SetClkOutSel(clock_clkout_src_t setting)

Sets the clock out selection.

This function sets the clock out selection (CLKOUTSEL).

Parameters:

setting – The selection to set.

status_t CLOCK_InitSysOsc(const scg_sosc_config_t *config)

Initializes the SCG system OSC.

This function enables the SCG system OSC clock according to the configuration.

Note

This function can’t detect whether the system OSC has been enabled and used by an IP.

Parameters:

config – Pointer to the configuration structure.

Return values:

kStatus_Success – System OSC is initialized.
kStatus_SCG_Busy – System OSC has been enabled and is used by the system clock.
kStatus_ReadOnly – System OSC control register is locked.

status_t CLOCK_DeinitSysOsc(void)

De-initializes the SCG system OSC.

This function disables the SCG system OSC clock.

Note

This function can’t detect whether the system OSC is used by an IP.

Return values:

kStatus_Success – System OSC is deinitialized.
kStatus_SCG_Busy – System OSC is used by the system clock.
kStatus_ReadOnly – System OSC control register is locked.

uint32_t CLOCK_GetSysOscFreq(void)

Gets the SCG system OSC clock frequency (SYSOSC).

Returns:: Clock frequency; If the clock is invalid, returns 0.

static inline bool CLOCK_IsSysOscErr(void)

Checks whether the system OSC clock error occurs.

Returns:: True if the error occurs, false if not.

static inline void CLOCK_ClearSysOscErr(void): Clears the system OSC clock error.

static inline void CLOCK_SetSysOscMonitorMode(scg_sosc_monitor_mode_t mode)

Sets the system OSC monitor mode.

This function sets the system OSC monitor mode. The mode can be disabled, it can generate an interrupt when the error is disabled, or reset when the error is detected.

Parameters:

mode – Monitor mode to set.

static inline bool CLOCK_IsSysOscValid(void)

Checks whether the system OSC clock is valid.

Returns:: True if clock is valid, false if not.

static inline void CLOCK_UnlockSysOscControlStatusReg(void): Unlock the SOSCCSR control status register.

static inline void CLOCK_LockSysOscControlStatusReg(void): Lock the SOSCCSR control status register.

status_t CLOCK_InitSirc(const scg_sirc_config_t *config)

Initializes the SCG slow IRC clock.

This function enables the SCG slow IRC clock according to the configuration.

Note

This function can’t detect whether the system OSC has been enabled and used by an IP.

Parameters:

config – Pointer to the configuration structure.

Return values:

kStatus_Success – SIRC is initialized.
kStatus_SCG_Busy – SIRC has been enabled and is used by system clock.
kStatus_ReadOnly – SIRC control register is locked.

status_t CLOCK_DeinitSirc(void)

De-initializes the SCG slow IRC.

This function disables the SCG slow IRC.

Note

This function can’t detect whether the SIRC is used by an IP.

Return values:

kStatus_Success – SIRC is deinitialized.
kStatus_SCG_Busy – SIRC is used by system clock.
kStatus_ReadOnly – SIRC control register is locked.

uint32_t CLOCK_GetSircFreq(void)

Gets the SCG SIRC clock frequency.

Returns:: Clock frequency; If the clock is invalid, returns 0.

static inline bool CLOCK_IsSircValid(void)

Checks whether the SIRC clock is valid.

Returns:: True if clock is valid, false if not.

static inline void CLOCK_UnlockSircControlStatusReg(void): Unlock the SIRCCSR control status register.

static inline void CLOCK_LockSircControlStatusReg(void): Lock the SIRCCSR control status register.

status_t CLOCK_InitFirc(const scg_firc_config_t *config)

Initializes the SCG fast IRC clock.

This function enables the SCG fast IRC clock according to the configuration.

Note

This function can’t detect whether the FIRC has been enabled and used by an IP.

Parameters:

config – Pointer to the configuration structure.

Return values:

kStatus_Success – FIRC is initialized.
kStatus_SCG_Busy – FIRC has been enabled and is used by the system clock.
kStatus_ReadOnly – FIRC control register is locked.

status_t CLOCK_DeinitFirc(void)

De-initializes the SCG fast IRC.

This function disables the SCG fast IRC.

Note

This function can’t detect whether the FIRC is used by an IP.

Return values:

kStatus_Success – FIRC is deinitialized.
kStatus_SCG_Busy – FIRC is used by the system clock.
kStatus_ReadOnly – FIRC control register is locked.

uint32_t CLOCK_GetFircFreq(void)

Gets the SCG FIRC clock frequency.

Returns:: Clock frequency; If the clock is invalid, returns 0.

static inline bool CLOCK_IsFircErr(void)

Checks whether the FIRC clock error occurs.

Returns:: True if the error occurs, false if not.

static inline void CLOCK_ClearFircErr(void): Clears the FIRC clock error.

static inline bool CLOCK_IsFircValid(void)

Checks whether the FIRC clock is valid.

Returns:: True if clock is valid, false if not.

static inline void CLOCK_UnlockFircControlStatusReg(void): Unlock the FIRCCSR control status register.

static inline void CLOCK_LockFircControlStatusReg(void): Lock the FIRCCSR control status register.

status_t CLOCK_InitRosc(const scg_rosc_config_t *config)

Initializes the SCG ROSC.

This function enables the SCG ROSC clock according to the configuration.

Note

This function can’t detect whether the system OSC has been enabled and used by an IP.

Parameters:

config – Pointer to the configuration structure.

Return values:

kStatus_Success – ROSC is initialized.
kStatus_SCG_Busy – ROSC has been enabled and is used by the system clock.
kStatus_ReadOnly – ROSC control register is locked.

status_t CLOCK_DeinitRosc(void)

De-initializes the SCG ROSC.

This function disables the SCG ROSC clock.

Note

This function can’t detect whether the ROSC is used by an IP.

Return values:

kStatus_Success – System OSC is deinitialized.
kStatus_SCG_Busy – System OSC is used by the system clock.
kStatus_ReadOnly – System OSC control register is locked.

uint32_t CLOCK_GetRtcOscFreq(void)

Gets the SCG RTC OSC clock frequency.

Returns:: Clock frequency; If the clock is invalid, returns 0.

uint32_t CLOCK_Get1MClkFreq(void)

Gets the clock frequency of the clock 1MHz, 1MHZ is derived out of FRO6M.

Returns:: Clock frequency; If the clock is invalid, returns 0.

uint32_t CLOCK_GetTstmrFreq(uint32_t instance)

Gets the frequency of the TSTMR.

Parameters:

instance – TSTMR instance.

Returns:

Clock frequency of the TSTMR instance; If the instance is invalid, returns 0.

static inline bool CLOCK_IsRoscErr(void)

Checks whether the ROSC clock error occurs.

Returns:: True if the error occurs, false if not.

static inline void CLOCK_ClearRoscErr(void): Clears the ROSC clock error.

static inline void CLOCK_SetRoscMonitorMode(scg_rosc_monitor_mode_t mode)

Sets the ROSC monitor mode.

This function sets the ROSC monitor mode. The mode can be disabled, it can generate an interrupt when the error is disabled, or reset when the error is detected.

Parameters:

mode – Monitor mode to set.

static inline bool CLOCK_IsRoscValid(void)

Checks whether the ROSC clock is valid.

Returns:: True if clock is valid, false if not.

static inline void CLOCK_UnlockRoscControlStatusReg(void): Unlock the ROSCCSR control status register.

static inline void CLOCK_LockRoscControlStatusReg(void): Lock the ROSCCSR control status register.

static inline void CLOCK_SetXtal0Freq(uint32_t freq)

Sets the XTAL0 frequency based on board settings.

Parameters:

freq – The XTAL0/EXTAL0 input clock frequency in Hz.

static inline void CLOCK_SetXtal32Freq(uint32_t freq)

Sets the XTAL32 frequency based on board settings.

Parameters:

freq – The XTAL32/EXTAL32 input clock frequency in Hz.

uint32_t divSlow: Slow clock divider, see scg_sys_clk_div_t.

uint32_t divBus: Bus clock divider, see scg_sys_clk_div_t.

uint32_t __pad0__: Reserved.

uint32_t divPlat: Plat clock divider (core#1), see scg_sys_clk_div_t.

uint32_t divCore: Core clock divider (core#0), see scg_sys_clk_div_t.

uint32_t __pad1__: Reserved.

uint32_t src: System clock source, see scg_sys_clk_src_t.

uint32_t __pad2__: reserved.

uint32_t freq: System OSC frequency.

uint32_t enableMode: Enable mode, OR’ed value of _scg_sosc_enable_mode.

scg_sosc_monitor_mode_t monitorMode: Clock monitor mode selected.

scg_rosc_monitor_mode_t monitorMode: Clock monitor mode selected.

scg_sirc_enable_mode_t enableMode: Enable mode, OR’ed value of _scg_sirc_enable_mode.

scg_firc_trim_mode_t trimMode: FIRC trim mode.

scg_firc_trim_src_t trimSrc: Trim source.

uint16_t trimDiv: Divider of SOSC for FIRC.

uint8_t trimCoar: Trim coarse value; Irrelevant if trimMode is kSCG_FircTrimUpdate.

uint8_t trimFine: Trim fine value; Irrelevant if trimMode is kSCG_FircTrimUpdate.

uint32_t enableMode: Enable mode.

scg_firc_range_t range: Fast IRC frequency range.

const scg_firc_trim_config_t *trimConfig: Pointer to the FIRC trim configuration; set NULL to disable trim.

FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL

Configure whether driver controls clock.

When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could control the clock out of the driver.

Note

All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.

struct _scg_sys_clk_config: #include <fsl_clock.h>

SCG system clock configuration.

struct _scg_sosc_config: #include <fsl_clock.h>

SCG system OSC configuration.

struct _scg_rosc_config: #include <fsl_clock.h>

SCG ROSC configuration.

struct _scg_sirc_config: #include <fsl_clock.h>

SCG slow IRC clock configuration.

struct _scg_firc_trim_config: #include <fsl_clock.h>

SCG fast IRC clock trim configuration.

struct _scg_firc_config_t: #include <fsl_clock.h>

SCG fast IRC clock configuration.

CMC: Core Mode Controller Driver#

void CMC_SetClockMode(CMC_Type *base, cmc_clock_mode_t mode)

Sets clock mode.

This function configs the amount of clock gating when the core asserts Sleeping due to WFI, WFE or SLEEPONEXIT.

Parameters:

base – CMC peripheral base address.
mode – System clock mode.

static inline void CMC_LockClockModeSetting(CMC_Type *base)

Locks the clock mode setting.

After invoking this function, any clock mode setting will be blocked.

Parameters:

base – CMC peripheral base address.

static inline cmc_core_clock_gate_status_t CMC_GetCoreClockGatedStatus(CMC_Type *base)

Gets the core clock gated status.

This function get the status to indicate whether the core clock is gated. The core clock gated status can be cleared by software.

Parameters:

base – CMC peripheral base address.

Returns:

The status to indicate whether the core clock is gated.

static inline void CMC_ClearCoreClockGatedStatus(CMC_Type *base)

Clears the core clock gated status.

This function clear clock status flag by software.

Parameters:

base – CMC peripheral base address.

static inline uint8_t CMC_GetWakeupSource(CMC_Type *base)

Gets the Wakeup Source.

This function gets the Wakeup sources from the previous low power mode entry.

Parameters:

base – CMC peripheral base address.

Returns:

The Wakeup sources from the previous low power mode entry. See _cmc_wakeup_sources for details.

static inline cmc_clock_mode_t CMC_GetClockMode(CMC_Type *base)

Gets the Clock mode.

This function gets the clock mode of the previous low power mode entry.

Parameters:

base – CMC peripheral base address.

Returns:

The Low Power status.

static inline uint32_t CMC_GetSystemResetStatus(CMC_Type *base)

Gets the System reset status.

This function returns the system reset status. Those status updates on every MAIN Warm Reset to indicate the type/source of the most recent reset.

Parameters:

base – CMC peripheral base address.

Returns:

The most recent system reset status. See _cmc_system_reset_sources for details.

static inline uint32_t CMC_GetStickySystemResetStatus(CMC_Type *base)

Gets the sticky system reset status since the last WAKE Cold Reset.

This function gets all source of system reset that have generated a system reset since the last WAKE Cold Reset, and that have not been cleared by software.

Parameters:

base – CMC peripheral base address.

Returns:

System reset status that have not been cleared by software. See _cmc_system_reset_sources for details.

static inline void CMC_ClearStickySystemResetStatus(CMC_Type *base, uint32_t mask)

Clears the sticky system reset status flags.

Parameters:

base – CMC peripheral base address.
mask – Bitmap of the sticky system reset status to be cleared.

static inline uint8_t CMC_GetResetCount(CMC_Type *base)

Gets the number of reset sequences completed since the last WAKE Cold Reset.

Parameters:

base – CMC peripheral base address.

Returns:

The number of reset sequences.

static inline uint32_t CMC_GetResetInitStatusFlags(CMC_Type *base)

Gets status flags to indicate if any errors occurred during the reset initialization sequence.

Parameters:

base – CMC peripheral base address.

Returns:

Status flags that indicate errors occurred during the reset initialization sequence.

void CMC_SetPowerModeProtection(CMC_Type *base, uint32_t allowedModes)

Configures all power mode protection settings.

This function configures the power mode protection settings for supported power modes. This should be done before set the lowPower mode for each power doamin.

The allowed lowpower modes are passed as bit map. For example, to allow Sleep and DeepSleep, use CMC_SetPowerModeProtection(CMC_base, kCMC_AllowSleepMode|kCMC_AllowDeepSleepMode). To allow all low power modes, use CMC_SetPowerModeProtection(CMC_base, kCMC_AllowAllLowPowerModes).

Parameters:

base – CMC peripheral base address.
allowedModes – Bitmaps of the allowed power modes. See _cmc_power_mode_protection for details.

static inline void CMC_LockPowerModeProtectionSetting(CMC_Type *base)

Locks the power mode protection.

This function locks the power mode protection. After invoking this function, any power mode protection setting will be ignored.

Parameters:

base – CMC peripheral base address.

static inline void CMC_SetGlobalPowerMode(CMC_Type *base, cmc_low_power_mode_t lowPowerMode)

Config the same lowPower mode for all power domain.

This function configures the same low power mode for MAIN power domian and WAKE power domain.

Parameters:

base – CMC peripheral base address.
lowPowerMode – The desired lowPower mode. See cmc_low_power_mode_t for details.

static inline void CMC_SetMAINPowerMode(CMC_Type *base, cmc_low_power_mode_t lowPowerMode)

Configures entry into low power mode for the MAIN Power domain.

This function configures the low power mode for the MAIN power domian, when the core executes WFI/WFE instruction. The available lowPower modes are defined in the cmc_low_power_mode_t.

Parameters:

base – CMC peripheral base address.
lowPowerMode – The desired lowPower mode. See cmc_low_power_mode_t for details.

static inline cmc_low_power_mode_t CMC_GetMAINPowerMode(CMC_Type *base)

Gets the power mode of the MAIN Power domain.

Parameters:

base – CMC peripheral base address.

Returns:

The power mode of MAIN Power domain. See cmc_low_power_mode_t for details.

static inline void CMC_SetWAKEPowerMode(CMC_Type *base, cmc_low_power_mode_t lowPowerMode)

Configure entry into low power mode for the WAKE Power domain.

This function configures the low power mode for the WAKE power domian, when the core executes WFI/WFE instruction. The available lowPower mode are defined in the cmc_low_power_mode_t.

Note

The lowPower Mode for the WAKE domain must not be configured to a lower power mode than any other power domain.

Parameters:

base – CMC peripheral base address.
lowPowerMode – The desired lowPower mode. See cmc_low_power_mode_t for details.

static inline cmc_low_power_mode_t CMC_GetWAKEPowerMode(CMC_Type *base)

Gets the power mode of the WAKE Power domain.

Parameters:

base – CMC peripheral base address.

Returns:

The power mode of WAKE Power domain. See cmc_low_power_mode_t for details.

void CMC_ConfigResetPin(CMC_Type *base, const cmc_reset_pin_config_t *config)

Configure reset pin.

This function configures reset pin. When enabled, the low power filter is enabled in both Active and Low power modes, the reset filter is only enabled in Active mode. When both filers are enabled, they operate in series.

Parameters:

base – CMC peripheral base address.
config – Pointer to the reset pin config structure.

static inline void CMC_EnableSystemResetInterrupt(CMC_Type *base, uint32_t mask)

Enable system reset interrupts.

This function enables the system reset interrupts. The assertion of non-fatal warm reset can be delayed for 258 cycles of the 32K_CLK clock while an enabled interrupt is generated. Then Software can perform a graceful shutdown or abort the non-fatal warm reset provided the pending reset source is cleared by resetting the reset source and then clearing the pending flag.

Parameters:

base – CMC peripheral base address.
mask – System reset interrupts. See _cmc_system_reset_interrupt_enable for details.

static inline void CMC_DisableSystemResetInterrupt(CMC_Type *base, uint32_t mask)

Disable system reset interrupts.

This function disables the system reset interrupts.

Parameters:

base – CMC peripheral base address.
mask – System reset interrupts. See _cmc_system_reset_interrupt_enable for details.

static inline uint32_t CMC_GetSystemResetInterruptFlags(CMC_Type *base)

Gets System Reset interrupt flags.

This function returns the System reset interrupt flags.

Parameters:

base – CMC peripheral base address.

Returns:

System reset interrupt flags. See _cmc_system_reset_interrupt_flag for details.

static inline void CMC_ClearSystemResetInterruptFlags(CMC_Type *base, uint32_t mask)

Clears System Reset interrupt flags.

This function clears system reset interrupt flags. The pending reset source can be cleared by resetting the source of the reset and then clearing the pending flags.

Parameters:

base – CMC peripheral base address.
mask – System Reset interrupt flags. See _cmc_system_reset_interrupt_flag for details.

static inline void CMC_EnableNonMaskablePinInterrupt(CMC_Type *base, bool enable)

Enable/Disable Non maskable Pin interrupt.

Parameters:

base – CMC peripheral base address.
enable – Enable or disable Non maskable pin interrupt. true - enable Non-maskable pin interrupt. false - disable Non-maskable pin interupt.

static inline uint8_t CMC_GetISPMODEPinLogic(CMC_Type *base)

Gets the logic state of the ISPMODE_n pin.

This function returns the logic state of the ISPMODE_n pin on the last negation of RESET_b pin.

Parameters:

base – CMC peripheral base address.

Returns:

The logic state of the ISPMODE_n pin on the last negation of RESET_b pin.

static inline void CMC_ClearISPMODEPinLogic(CMC_Type *base)

Clears ISPMODE_n pin state.

Parameters:

base – CMC peripheral base address.

static inline void CMC_ForceBootConfiguration(CMC_Type *base, bool assert)

Set the logic state of the BOOT_CONFIGn pin.

This function force the logic state of the Boot_Confign pin to assert on next system reset.

Parameters:

base – CMC peripheral base address.
assert – Assert the corresponding pin or not. true - Assert corresponding pin on next system reset. false - No effect.

static inline uint32_t CMC_GetBootRomStatus(CMC_Type *base, uint8_t index)

Gets the information written by the BootROM.

Parameters:

base – CMC peripheral base address.
index – The index of BootROM status register, ranges from 0.

Returns:

The status information written by the BootROM.

static inline void CMC_WriteBootRomStatusReg(CMC_Type *base, uint8_t index, uint32_t value)

Writes value to BootROM status register, in this way, BootROM status registers are used as general purpose register.

Note

Value in BootROM status registers are reset in cold reset.

Parameters:

base – CMC peripheral base address.
index – The index of BootROM status register, ranges from 0.
value – Value to write.

void CMC_PowerOffSRAMAllMode(CMC_Type *base, uint32_t mask)

Power off the selected system SRAM always.

This function power off the selected system SRAM always. The SRAM arrays should not be accessed while they are shut down. SRAM array contents are not retained if they are powered off.

Parameters:

base – CMC peripheral base address.
mask – Bitmap of the SRAM arrays to be powered off all modes. See _cmc_system_sram_arrays for details. Check Reference Manual for the SRAM region and mask bit relationship.

static inline void CMC_PowerOnSRAMAllMode(CMC_Type *base, uint32_t mask)

Power on SRAM during all mode.

Parameters:

base – CMC peripheral base address.
mask – Bitmap of the SRAM arrays to be powered on all modes. See _cmc_system_sram_arrays for details. Check Reference Manual for the SRAM region and mask bit relationship.

void CMC_PowerOffSRAMLowPowerOnly(CMC_Type *base, uint32_t mask)

Power off the selected system SRAM during low power mode only.

This function power off the selected system SRAM only during low power mode. SRAM array contents are not retained if they are power off.

Parameters:

base – CMC peripheral base address.
mask – Bitmap of the SRAM arrays to be power off during low power mode only. See _cmc_system_sram_arrays for details. Check Reference Manual for the SRAM region and mask bit relationship.

static inline void CMC_PowerOnSRAMLowPowerOnly(CMC_Type *base, uint32_t mask)

Power on the selected system SRAM during low power mode only.

This function power on the selected system SRAM. The SRAM arrray contents are retained in low power modes.

Parameters:

base – CMC peripheral base address.
mask – Bitmap of the SRAM arrays to be power on during low power mode only. See _cmc_system_sram_arrays for details. Check Reference Manual for the SRAM region and mask bit relationship.

void CMC_ConfigFlashMode(CMC_Type *base, bool wake, bool doze, bool disable)

Configs the low power mode of the on-chip flash memory.

This function configs the low power mode of the on-chip flash memory.

Parameters:

base – CMC peripheral base address.
wake – true: Flash will exit low power state during the flash memory accesses. false: No effect.
doze – true: Flash is disabled while core is sleeping false: No effect.
disable – true: Flash memory is placed in low power state. false: No effect.

static inline void CMC_EnableDebugOperation(CMC_Type *base, bool enable)

Enables/Disables debug Operation when the core sleep.

This function configs what happens to debug when core sleeps.

Parameters:

base – CMC peripheral base address.
enable – Enable or disable Debug when Core is sleeping. true - Debug remains enabled when the core is sleeping. false - Debug is disabled when the core is sleeping.

void CMC_PreEnterLowPowerMode(void)

Prepares to enter low power modes.

This function should be called before entering low power modes.

void CMC_PostExitLowPowerMode(void)

Recovers after wake up from low power modes.

This function should be called after wake up from low power modes. This function should be used with CMC_PreEnterLowPowerMode()

void CMC_GlobalEnterLowPowerMode(CMC_Type *base, cmc_low_power_mode_t lowPowerMode)

Configs the entry into the same low power mode for each power domains.

This function provides the feature to entry into the same low power mode for each power domains. Before invoking this function, please ensure the selected power mode have been allowed.

Parameters:

base – CMC peripheral base address.
lowPowerMode – The low power mode to be entered. See cmc_low_power_mode_t for the details.

void CMC_EnterLowPowerMode(CMC_Type *base, const cmc_power_domain_config_t *config)

Configs the entry into different low power modes for each power domains.

This function provides the feature to entry into different low power modes for each power domains. Before invoking this function please ensure the selected modes are allowed.

Parameters:

base – CMC peripheral base address.
config – Pointer to the cmc_power_domain_config_t structure.

FSL_CMC_DRIVER_VERSION: CMC driver version 2.4.4.

CMC_SRAM_BUSY_TIMEOUT

Max loops to wait for CMC SRAM operation complete.

When configuring the SRAM, driver will wait for the completion of new settings. This parameter defines how many loops to check completion before return timeout. If defined as 0, driver will wait forever until completion.

enum _cmc_power_mode_protection

CMC power mode Protection enumeration.

Values:

enumerator kCMC_AllowSleepMode: Allow Sleep mode.

enumerator kCMC_AllowDeepSleepMode: Allow Deep Sleep mode.

enumerator kCMC_AllowPowerDownMode: Allow Power Down mode.

enumerator kCMC_AllowDeepPowerDownMode: Allow Deep Power Down mode.

enumerator kCMC_AllowAllLowPowerModes: Allow all low power modes.

enum _cmc_wakeup_sources

Wake up sources from the previous low power mode entry.

Values:

enumerator kCMC_WakeupFromResetInterruptOrPowerDown: Wakeup source is reset interrupt, or wake up from [Deep] Power Down.

enumerator kCMC_WakeupFromDebugRequest: Wakeup source is debug request.

enumerator kCMC_WakeupFromInterrupt: Wakeup source is interrupt.

enumerator kCMC_WakeupFromDMAWakeup: Wakeup source is DMA Wakeup.

enumerator kCMC_WakeupFromWUURequest: Wakeup source is WUU request.

enumerator kCMC_WakeupFromBusMaster: Wakeup source is Bus master.

enum _cmc_system_reset_interrupt_enable

System Reset Interrupt enable enumeration.

Values:

enumerator kCMC_PinResetInterruptEnable: Pin Reset interrupt enable.

enumerator kCMC_DAPResetInterruptEnable: DAP Reset interrupt enable.

enumerator kCMC_LowPowerAcknowledgeTimeoutResetInterruptEnable: Low Power Acknowledge Timeout Reset interrupt enable.

enumerator kCMC_SystemClockGenerationResetInterruptEnable: System Clock Generation Reset interrupt enable.

enumerator kCMC_Watchdog0ResetInterruptEnable: Watchdog 0 Reset interrupt enable.

enumerator kCMC_SoftwareResetInterruptEnable: Software Reset interrupt enable.

enumerator kCMC_LockupResetInterruptEnable: Lockup Reset interrupt enable.

enumerator kCMC_Watchdog1ResetInterruptEnable: Watchdog 1 Reset interrupt enable

enum _cmc_system_reset_interrupt_flag

CMC System Reset Interrupt Status flag.

Values:

enumerator kCMC_PinResetInterruptFlag: Pin Reset interrupt flag.

enumerator kCMC_DAPResetInterruptFlag: DAP Reset interrupt flag.

enumerator kCMC_LowPowerAcknowledgeTimeoutResetFlag: Low Power Acknowledge Timeout Reset interrupt flag.

enumerator kCMC_Watchdog0ResetInterruptFlag: Watchdog 0 Reset interrupt flag.

enumerator kCMC_SoftwareResetInterruptFlag: Software Reset interrupt flag.

enumerator kCMC_LockupResetInterruptFlag: Lock up Reset interrupt flag.

enumerator kCMC_Watchdog1ResetInterruptFlag: Watchdog 1 Reset interrupt flag.

enum _cmc_system_sram_arrays

CMC System SRAM arrays low power mode enable enumeration.

Values:

enumerator kCMC_SRAMBank0: Power off SRAM Bank0, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank1: Power off SRAM Bank1, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank2: Power off SRAM Bank2, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank3: Power off SRAM Bank3, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank4: Power off SRAM Bank4, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank5: Power off SRAM Bank5, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank6: Power off SRAM Bank6, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank7: Power off SRAM Bank7, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank8: Power off SRAM Bank8, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank9: Power off SRAM Bank9, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank10: Power off SRAM Bank10, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_AllSramArrays: Mask of all system SRAM arrays.

enum _cmc_system_reset_sources

System reset sources enumeration.

Values:

enumerator kCMC_WakeUpReset: The reset caused by a wakeup from Power Down or Deep Power Down mode.

enumerator kCMC_PORReset: The reset caused by power on reset detection logic.

enumerator kCMC_LVDReset: The reset caused by a Low Voltage Detect.

enumerator kCMC_HVDReset: The reset caused by a High voltage Detect.

enumerator kCMC_WarmReset: The last reset source is a warm reset source.

enumerator kCMC_FatalReset: The last reset source is a fatal reset source.

enumerator kCMC_PinReset: The reset caused by the RESET_b pin.

enumerator kCMC_DAPReset: The reset caused by a reset request from the Debug Access port.

enumerator kCMC_ResetTimeout: The reset caused by a timeout or other error condition in the system reset generation.

enumerator kCMC_LowPowerAcknowledgeTimeoutReset: The reset caused by a timeout in low power mode entry logic.

enumerator kCMC_SCGReset: The reset caused by a loss of clock or loss of lock event in the SCG.

enumerator kCMC_Watchdog0Reset: The reset caused by a WatchDog 0 timeout.

enumerator kCMC_SoftwareReset: The reset caused by a software reset request.

enumerator kCMC_LockUpReset: The reset caused by the ARM core indication of a LOCKUP event.

enumerator kCMC_Watchdog1Reset: The reset caused by a WatchDog 1 timeout.

enum _cmc_core_clock_gate_status

Indicate the core clock was gated.

Values:

enumerator kCMC_CoreClockNotGated: Core clock not gated.

enumerator kCMC_CoreClockGated: Core clock was gated due to low power mode entry.

enum _cmc_clock_mode

CMC clock mode enumeration.

Values:

enumerator kCMC_GateNoneClock: No clock gating.

enumerator kCMC_GateCoreClock: Gate Core clock.

enumerator kCMC_GateCorePlatformClock: Gate Core clock and platform clock.

enumerator kCMC_GateAllSystemClocks: Gate all System clocks, without getting core entering into low power mode.

enumerator kCMC_GateAllSystemClocksEnterLowPowerMode: Gate all System clocks, with core entering into low power mode.

enum _cmc_low_power_mode

CMC power mode enumeration.

Values:

enumerator kCMC_ActiveMode: Select Active mode.

enumerator kCMC_SleepMode: Select Sleep mode when a core executes WFI or WFE instruction.

enumerator kCMC_DeepSleepMode: Select Deep Sleep mode when a core executes WFI or WFE instruction.

enumerator kCMC_PowerDownMode: Select Power Down mode when a core executes WFI or WFE instruction.

enumerator kCMC_DeepPowerDown: Select Deep Power Down mode when a core executes WFI or WFE instruction.

typedef enum _cmc_core_clock_gate_status cmc_core_clock_gate_status_t: Indicate the core clock was gated.

typedef enum _cmc_clock_mode cmc_clock_mode_t: CMC clock mode enumeration.

typedef enum _cmc_low_power_mode cmc_low_power_mode_t: CMC power mode enumeration.

typedef struct _cmc_reset_pin_config cmc_reset_pin_config_t: CMC reset pin configuration.

typedef struct _cmc_power_domain_config cmc_power_domain_config_t: power mode configuration for each power domain.

CMC_BLR_LOCK_FIELD_WIDTH

CMC_BLR_LOCK_IDX_MASK(index)

CMC_BLR_LOCK_IDX_SHIFT(index)

CMC_BLR_LOCK_IDX(index, value)

struct _cmc_reset_pin_config

#include <fsl_cmc.h>

CMC reset pin configuration.

Public Members

bool lowpowerFilterEnable: Low Power Filter enable.

bool resetFilterEnable: Reset Filter enable.

uint8_t resetFilterWidth: Width of the Reset Filter.

struct _cmc_power_domain_config

#include <fsl_cmc.h>

power mode configuration for each power domain.

Public Members

cmc_clock_mode_t clock_mode: Clock mode for each power domain.

cmc_low_power_mode_t main_domain: The low power mode of the MAIN power domain.

cmc_low_power_mode_t wake_domain: The low power mode of the WAKE power domain.

CRC: Cyclic Redundancy Check Driver#

FSL_CRC_DRIVER_VERSION

CRC driver version. Version 2.1.0.

Current version: 2.1.0

Change log:

Version 2.1.0
- Choosing CRC clocks from CRC clock array according to instance instead of hardcoded value.
Version 2.0.5
- Fix CERT-C issue with boolean-to-unsigned integer conversion.
Version 2.0.4
- Release peripheral from reset if necessary in init function.
Version 2.0.3
- Fix MISRA issues
Version 2.0.2
- Fix MISRA issues
Version 2.0.1
- move DATA and DATALL macro definition from header file to source file

enum _crc_bits

CRC bit width.

Values:

enumerator kCrcBits16: Generate 16-bit CRC code

enumerator kCrcBits32: Generate 32-bit CRC code

enum _crc_result

CRC result type.

Values:

enumerator kCrcFinalChecksum: CRC data register read value is the final checksum. Reflect out and final xor protocol features are applied.

enumerator kCrcIntermediateChecksum: CRC data register read value is intermediate checksum (raw value). Reflect out and final xor protocol feature are not applied. Intermediate checksum can be used as a seed for CRC_Init() to continue adding data to this checksum.

typedef enum _crc_bits crc_bits_t: CRC bit width.

typedef enum _crc_result crc_result_t: CRC result type.

typedef struct _crc_config crc_config_t

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

void CRC_Init(CRC_Type *base, const crc_config_t *config)

Enables and configures the CRC peripheral module.

This function enables the clock gate in the SIM module for the CRC peripheral. It also configures the CRC module and starts a checksum computation by writing the seed.

Parameters:

base – CRC peripheral address.
config – CRC module configuration structure.

void CRC_Deinit(CRC_Type *base)

Disables the CRC peripheral module.

This function disables the clock gate in the SIM module for the CRC peripheral.

Parameters:

base – CRC peripheral address.

void CRC_GetDefaultConfig(crc_config_t *config)

Loads default values to the CRC protocol configuration structure.

Loads default values to the CRC protocol configuration structure. The default values are as follows.

config->polynomial = 0x1021;
config->seed = 0xFFFF;
config->reflectIn = false;
config->reflectOut = false;
config->complementChecksum = false;
config->crcBits = kCrcBits16;
config->crcResult = kCrcFinalChecksum;

Parameters:

config – CRC protocol configuration structure.

void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize)

Writes data to the CRC module.

Writes input data buffer bytes to the CRC data register. The configured type of transpose is applied.

Parameters:

base – CRC peripheral address.
data – Input data stream, MSByte in data[0].
dataSize – Size in bytes of the input data buffer.

uint32_t CRC_Get32bitResult(CRC_Type *base)

Reads the 32-bit checksum from the CRC module.

Reads the CRC data register (either an intermediate or the final checksum). The configured type of transpose and complement is applied.

Parameters:

base – CRC peripheral address.

Returns:

An intermediate or the final 32-bit checksum, after configured transpose and complement operations.

uint16_t CRC_Get16bitResult(CRC_Type *base)

Reads a 16-bit checksum from the CRC module.

Reads the CRC data register (either an intermediate or the final checksum). The configured type of transpose and complement is applied.

Parameters:

base – CRC peripheral address.

Returns:

An intermediate or the final 16-bit checksum, after configured transpose and complement operations.

CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT: Default configuration structure filled by CRC_GetDefaultConfig(). Use CRC16-CCIT-FALSE as defeault.

struct _crc_config

#include <fsl_crc.h>

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

Public Members

uint32_t polynomial: CRC Polynomial, MSBit first. Example polynomial: 0x1021 = 1_0000_0010_0001 = x^12+x^5+1

uint32_t seed: Starting checksum value

bool reflectIn: Reflect bits on input.

bool reflectOut: Reflect bits on output.

bool complementChecksum: True if the result shall be complement of the actual checksum.

crc_bits_t crcBits: Selects 16- or 32- bit CRC protocol.

crc_result_t crcResult: Selects final or intermediate checksum return from CRC_Get16bitResult() or CRC_Get32bitResult()

EDMA: Enhanced Direct Memory Access (eDMA) Controller Driver#

void EDMA_Init(DMA_Type *base, const edma_config_t *config)

Initializes the eDMA peripheral.

This function ungates the eDMA clock and configures the eDMA peripheral according to the configuration structure.

Note

This function enables the minor loop map feature.

Parameters:

base – eDMA peripheral base address.
config – A pointer to the configuration structure, see “edma_config_t”.

void EDMA_Deinit(DMA_Type *base)

Deinitializes the eDMA peripheral.

This function gates the eDMA clock.

Parameters:

base – eDMA peripheral base address.

void EDMA_InstallTCD(DMA_Type *base, uint32_t channel, edma_tcd_t *tcd)

Push content of TCD structure into hardware TCD register.

Parameters:

base – EDMA peripheral base address.
channel – EDMA channel number.
tcd – Point to TCD structure.

void EDMA_GetDefaultConfig(edma_config_t *config)

Gets the eDMA default configuration structure.

This function sets the configuration structure to default values. The default configuration is set to the following values:

config.enableMasterIdReplication = true;
config.enableHaltOnError = true;
config.enableRoundRobinArbitration = false;
config.enableDebugMode = false;
config.enableBufferedWrites = false;

Parameters:

config – A pointer to the eDMA configuration structure.

static inline void EDMA_EnableAllChannelLink(DMA_Type *base, bool enable)

Enables/disables all channel linking.

This function enables/disables all channel linking in the management page. For specific channel linking enablement & configuration, please refer to EDMA_SetChannelLink and EDMA_TcdSetChannelLink APIs.

For example, to disable all channel linking in the DMA0 management page:

EDMA_EnableAllChannelLink(DMA0, false);

Parameters:

base – eDMA peripheral base address.
enable – Switcher of the channel linking feature for all channels. “true” means to enable. “false” means not.

void EDMA_ResetChannel(DMA_Type *base, uint32_t channel)

Sets all TCD registers to default values.

This function sets TCD registers for this channel to default values.

Note

This function must not be called while the channel transfer is ongoing or it causes unpredictable results.

Note

This function enables the auto stop request feature.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

void EDMA_SetTransferConfig(DMA_Type *base, uint32_t channel, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)

Configures the eDMA transfer attribute.

This function configures the transfer attribute, including source address, destination address, transfer size, address offset, and so on. It also configures the scatter gather feature if the user supplies the TCD address. Example:

edma_transfer_config_t config;
edma_tcd_t tcd;
config.srcAddr = ..;
config.destAddr = ..;
...
EDMA_SetTransferConfig(DMA0, channel, &config, &stcd);

Note

If nextTcd is not NULL, it means scatter gather feature is enabled and DREQ bit is cleared in the previous transfer configuration, which is set in the eDMA_ResetChannel.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
config – Pointer to eDMA transfer configuration structure.
nextTcd – Point to TCD structure. It can be NULL if users do not want to enable scatter/gather feature.

void EDMA_SetMinorOffsetConfig(DMA_Type *base, uint32_t channel, const edma_minor_offset_config_t *config)

Configures the eDMA minor offset feature.

The minor offset means that the signed-extended value is added to the source address or destination address after each minor loop.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
config – A pointer to the minor offset configuration structure.

static inline void EDMA_SetChannelArbitrationGroup(DMA_Type *base, uint32_t channel, uint32_t group)

Configures the eDMA channel arbitration group.

This function configures the channel arbitration group. The arbitration group priorities are evaluated by numeric value from highest group number to lowest.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number
group – Fixed-priority arbitration group number for the channel.

static inline void EDMA_SetChannelPreemptionConfig(DMA_Type *base, uint32_t channel, const edma_channel_Preemption_config_t *config)

Configures the eDMA channel preemption feature.

This function configures the channel preemption attribute and the priority of the channel.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number
config – A pointer to the channel preemption configuration structure.

static inline uint32_t EDMA_GetChannelSystemBusInformation(DMA_Type *base, uint32_t channel)

Gets the eDMA channel identification and attribute information on the system bus interface.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

The mask of the channel system bus information. Users need to use the _edma_channel_sys_bus_info type to decode the return variables.

static inline void EDMA_EnableChannelMasterIDReplication(DMA_Type *base, uint32_t channel, bool enable)

Set channel master ID replication.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
enable – true is enable, false is disable.

static inline void EDMA_SetChannelSecurityLevel(DMA_Type *base, uint32_t channel, edma_channel_security_level_t level)

Set channel security level.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
level – security level.

static inline void EDMA_SetChannelProtectionLevel(DMA_Type *base, uint32_t channel, edma_channel_protection_level_t level)

Set channel protection level.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
level – protection level.

void EDMA_SetChannelLink(DMA_Type *base, uint32_t channel, edma_channel_link_type_t type, uint32_t linkedChannel)

Sets the channel link for the eDMA transfer.

This function configures either the minor link or the major link mode. The minor link means that the channel link is triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is exhausted.

Note

Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
type – A channel link type, which can be one of the following:
- kEDMA_LinkNone
- kEDMA_MinorLink
- kEDMA_MajorLink
linkedChannel – The linked channel number.

void EDMA_SetBandWidth(DMA_Type *base, uint32_t channel, edma_bandwidth_t bandWidth)

Sets the bandwidth for the eDMA transfer.

Because the eDMA processes the minor loop, it continuously generates read/write sequences until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of each read/write access to control the bus request bandwidth seen by the crossbar switch.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
bandWidth – A bandwidth setting, which can be one of the following:
- kEDMABandwidthStallNone
- kEDMABandwidthStall4Cycle
- kEDMABandwidthStall8Cycle

void EDMA_SetModulo(DMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo)

Sets the source modulo and the destination modulo for the eDMA transfer.

This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF) calculation is performed or the original register value. It provides the ability to implement a circular data queue easily.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
srcModulo – A source modulo value.
destModulo – A destination modulo value.

static inline void EDMA_EnableAsyncRequest(DMA_Type *base, uint32_t channel, bool enable)

Enables an async request for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
enable – The command to enable (true) or disable (false).

static inline void EDMA_EnableAutoStopRequest(DMA_Type *base, uint32_t channel, bool enable)

Enables an auto stop request for the eDMA transfer.

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
enable – The command to enable (true) or disable (false).

void EDMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask)

Enables the interrupt source for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask)

Disables the interrupt source for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of the interrupt source to be set. Use the defined edma_interrupt_enable_t type.

static inline void EDMA_SetChannelMux(DMA_Type *base, uint32_t channel, uint32_t mux)

Set channel mux source.

Note:When the peripheral is no longer needed, the mux configuration for that channel should be written to 0, thus releasing the resource.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mux – the mux source value is SOC specific, please reference the SOC for detail.

void EDMA_TcdReset(edma_tcd_t *tcd)

Sets all fields to default values for the TCD structure.

This function sets all fields for this TCD structure to default value.

Note

This function enables the auto stop request feature.

Parameters:

tcd – Pointer to the TCD structure.

void EDMA_TcdSetTransferConfig(edma_tcd_t *tcd, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)

Configures the eDMA TCD transfer attribute.

The TCD is a transfer control descriptor. The content of the TCD is the same as the hardware TCD registers. The STCD is used in the scatter-gather mode. This function configures the TCD transfer attribute, including source address, destination address, transfer size, address offset, and so on. It also configures the scatter gather feature if the user supplies the next TCD address. Example:

edma_transfer_config_t config = {
...
}
edma_tcd_t tcd __aligned(32);
edma_tcd_t nextTcd __aligned(32);
EDMA_TcdSetTransferConfig(&tcd, &config, &nextTcd);

Note

TCD address should be 32 bytes aligned or it causes an eDMA error.

Note

If the nextTcd is not NULL, the scatter gather feature is enabled and DREQ bit is cleared in the previous transfer configuration, which is set in the EDMA_TcdReset.

Parameters:

tcd – Pointer to the TCD structure.
config – Pointer to eDMA transfer configuration structure.
nextTcd – Pointer to the next TCD structure. It can be NULL if users do not want to enable scatter/gather feature.

void EDMA_TcdSetMinorOffsetConfig(edma_tcd_t *tcd, const edma_minor_offset_config_t *config)

Configures the eDMA TCD minor offset feature.

A minor offset is a signed-extended value added to the source address or a destination address after each minor loop.

Parameters:

tcd – A point to the TCD structure.
config – A pointer to the minor offset configuration structure.

void EDMA_TcdSetChannelLink(edma_tcd_t *tcd, edma_channel_link_type_t type, uint32_t linkedChannel)

Sets the channel link for the eDMA TCD.

This function configures either a minor link or a major link. The minor link means the channel link is triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is exhausted.

Note

Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.

Parameters:

tcd – Point to the TCD structure.
type – Channel link type, it can be one of:
- kEDMA_LinkNone
- kEDMA_MinorLink
- kEDMA_MajorLink
linkedChannel – The linked channel number.

static inline void EDMA_TcdSetBandWidth(edma_tcd_t *tcd, edma_bandwidth_t bandWidth)

Sets the bandwidth for the eDMA TCD.

Parameters:

tcd – A pointer to the TCD structure.
bandWidth – A bandwidth setting, which can be one of the following:
- kEDMABandwidthStallNone
- kEDMABandwidthStall4Cycle
- kEDMABandwidthStall8Cycle

void EDMA_TcdSetModulo(edma_tcd_t *tcd, edma_modulo_t srcModulo, edma_modulo_t destModulo)

Sets the source modulo and the destination modulo for the eDMA TCD.

Parameters:

tcd – A pointer to the TCD structure.
srcModulo – A source modulo value.
destModulo – A destination modulo value.

static inline void EDMA_TcdEnableAutoStopRequest(edma_tcd_t *tcd, bool enable)

Sets the auto stop request for the eDMA TCD.

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.

Parameters:

tcd – A pointer to the TCD structure.
enable – The command to enable (true) or disable (false).

void EDMA_TcdEnableInterrupts(edma_tcd_t *tcd, uint32_t mask)

Enables the interrupt source for the eDMA TCD.

Parameters:

tcd – Point to the TCD structure.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_TcdDisableInterrupts(edma_tcd_t *tcd, uint32_t mask)

Disables the interrupt source for the eDMA TCD.

Parameters:

tcd – Point to the TCD structure.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

static inline void EDMA_EnableChannelRequest(DMA_Type *base, uint32_t channel)

Enables the eDMA hardware channel request.

This function enables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

static inline void EDMA_DisableChannelRequest(DMA_Type *base, uint32_t channel)

Disables the eDMA hardware channel request.

This function disables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

static inline void EDMA_TriggerChannelStart(DMA_Type *base, uint32_t channel)

Starts the eDMA transfer by using the software trigger.

This function starts a minor loop transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

uint32_t EDMA_GetRemainingMajorLoopCount(DMA_Type *base, uint32_t channel)

Gets the Remaining major loop count from the eDMA current channel TCD.

This function checks the TCD (Task Control Descriptor) status for a specified eDMA channel and returns the number of major loop count that has not finished.

Note

1. This function can only be used to get unfinished major loop count of transfer without the next TCD, or it might be inaccuracy.

The unfinished/remaining transfer bytes cannot be obtained directly from registers while the channel is running. Because to calculate the remaining bytes, the initial NBYTES configured in DMA_TCDn_NBYTES_MLNO register is needed while the eDMA IP does not support getting it while a channel is active. In another word, the NBYTES value reading is always the actual (decrementing) NBYTES value the dma_engine is working with while a channel is running. Consequently, to get the remaining transfer bytes, a software-saved initial value of NBYTES (for example copied before enabling the channel) is needed. The formula to calculate it is shown below: RemainingBytes = RemainingMajorLoopCount * NBYTES(initially configured)

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

Major loop count which has not been transferred yet for the current TCD.

static inline uint32_t EDMA_GetErrorStatusFlags(DMA_Type *base)

Gets the eDMA channel error status flags.

Parameters:

base – eDMA peripheral base address.

Returns:

The mask of error status flags. Users need to use the _edma_error_status_flags type to decode the return variables.

uint32_t EDMA_GetChannelStatusFlags(DMA_Type *base, uint32_t channel)

Gets the eDMA channel status flags.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

The mask of channel status flags. Users need to use the _edma_channel_status_flags type to decode the return variables.

void EDMA_ClearChannelStatusFlags(DMA_Type *base, uint32_t channel, uint32_t mask)

Clears the eDMA channel status flags.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of channel status to be cleared. Users need to use the defined _edma_channel_status_flags type.

void EDMA_CreateHandle(edma_handle_t *handle, DMA_Type *base, uint32_t channel)

Creates the eDMA handle.

This function is called if using the transactional API for eDMA. This function initializes the internal state of the eDMA handle.

Parameters:

handle – eDMA handle pointer. The eDMA handle stores callback function and parameters.
base – eDMA peripheral base address.
channel – eDMA channel number.

void EDMA_InstallTCDMemory(edma_handle_t *handle, edma_tcd_t *tcdPool, uint32_t tcdSize)

Installs the TCDs memory pool into the eDMA handle.

This function is called after the EDMA_CreateHandle to use scatter/gather feature.

Parameters:

handle – eDMA handle pointer.
tcdPool – A memory pool to store TCDs. It must be 32 bytes aligned.
tcdSize – The number of TCD slots.

void EDMA_SetCallback(edma_handle_t *handle, edma_callback callback, void *userData)

Installs a callback function for the eDMA transfer.

This callback is called in the eDMA IRQ handler. Use the callback to do something after the current major loop transfer completes.

Parameters:

handle – eDMA handle pointer.
callback – eDMA callback function pointer.
userData – A parameter for the callback function.

void EDMA_PrepareTransferConfig(edma_transfer_config_t *config, void *srcAddr, uint32_t srcWidth, int16_t srcOffset, void *destAddr, uint32_t destWidth, int16_t destOffset, uint32_t bytesEachRequest, uint32_t transferBytes)

Prepares the eDMA transfer structure configurations.

This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error (SAE).

Parameters:

config – The user configuration structure of type edma_transfer_config_t.
srcAddr – eDMA transfer source address.
srcWidth – eDMA transfer source address width(bytes).
srcOffset – eDMA transfer source address offset
destAddr – eDMA transfer destination address.
destWidth – eDMA transfer destination address width(bytes).
destOffset – eDMA transfer destination address offset
bytesEachRequest – eDMA transfer bytes per channel request.
transferBytes – eDMA transfer bytes to be transferred.

void EDMA_PrepareTransfer(edma_transfer_config_t *config, void *srcAddr, uint32_t srcWidth, void *destAddr, uint32_t destWidth, uint32_t bytesEachRequest, uint32_t transferBytes, edma_transfer_type_t transferType)

Prepares the eDMA transfer structure.

This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error (SAE).

Parameters:

config – The user configuration structure of type edma_transfer_config_t.
srcAddr – eDMA transfer source address.
srcWidth – eDMA transfer source address width(bytes).
destAddr – eDMA transfer destination address.
destWidth – eDMA transfer destination address width(bytes).
bytesEachRequest – eDMA transfer bytes per channel request.
transferBytes – eDMA transfer bytes to be transferred.
transferType – eDMA transfer type.

status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t *config)

Submits the eDMA transfer request.

This function submits the eDMA transfer request according to the transfer configuration structure. If submitting the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time.

Parameters:

handle – eDMA handle pointer.
config – Pointer to eDMA transfer configuration structure.

Return values:

kStatus_EDMA_Success – It means submit transfer request succeed.
kStatus_EDMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_EDMA_Busy – It means the given channel is busy, need to submit request later.

void EDMA_StartTransfer(edma_handle_t *handle)

eDMA starts transfer.

This function enables the channel request. Users can call this function after submitting the transfer request or before submitting the transfer request.

Parameters:

handle – eDMA handle pointer.

void EDMA_StopTransfer(edma_handle_t *handle)

eDMA stops transfer.

This function disables the channel request to pause the transfer. Users can call EDMA_StartTransfer() again to resume the transfer.

Parameters:

handle – eDMA handle pointer.

void EDMA_AbortTransfer(edma_handle_t *handle)

eDMA aborts transfer.

This function disables the channel request and clear transfer status bits. Users can submit another transfer after calling this API.

Parameters:

handle – DMA handle pointer.

static inline uint32_t EDMA_GetUnusedTCDNumber(edma_handle_t *handle)

Get unused TCD slot number.

This function gets current tcd index which is run. If the TCD pool pointer is NULL, it will return 0.

Parameters:

handle – DMA handle pointer.

Returns:

The unused tcd slot number.

static inline uint32_t EDMA_GetNextTCDAddress(edma_handle_t *handle)

Get the next tcd address.

This function gets the next tcd address. If this is last TCD, return 0.

Parameters:

handle – DMA handle pointer.

Returns:

The next TCD address.

static inline edma_transfer_size_t EDMA_GetTransferSize(uint32_t width)

Get the transfer size.

This function gets the transfer size.

Parameters:

width – transfer width(bytes).

Returns:

The transfer size.

void EDMA_HandleIRQ(edma_handle_t *handle)

eDMA IRQ handler for the current major loop transfer completion.

This function clears the channel major interrupt flag and calls the callback function if it is not NULL.

Parameters:

handle – eDMA handle pointer.

FSL_EDMA_DRIVER_VERSION

eDMA driver version

Version 2.6.0.

enum _edma_transfer_size

eDMA transfer configuration

Values:

enumerator kEDMA_TransferSize1Bytes: Source/Destination data transfer size is 1 byte every time

enumerator kEDMA_TransferSize2Bytes: Source/Destination data transfer size is 2 bytes every time

enumerator kEDMA_TransferSize4Bytes: Source/Destination data transfer size is 4 bytes every time

enumerator kEDMA_TransferSize8Bytes: Source/Destination data transfer size is 8 bytes every time

enumerator kEDMA_TransferSize16Bytes: Source/Destination data transfer size is 16 bytes every time

enumerator kEDMA_TransferSize32Bytes: Source/Destination data transfer size is 32 bytes every time

enumerator kEDMA_TransferSize64Bytes: Source/Destination data transfer size is 64 bytes every time

enum _edma_modulo

eDMA modulo configuration

Values:

enumerator kEDMA_ModuloDisable: Disable modulo

enumerator kEDMA_Modulo2bytes: Circular buffer size is 2 bytes.

enumerator kEDMA_Modulo4bytes: Circular buffer size is 4 bytes.

enumerator kEDMA_Modulo8bytes: Circular buffer size is 8 bytes.

enumerator kEDMA_Modulo16bytes: Circular buffer size is 16 bytes.

enumerator kEDMA_Modulo32bytes: Circular buffer size is 32 bytes.

enumerator kEDMA_Modulo64bytes: Circular buffer size is 64 bytes.

enumerator kEDMA_Modulo128bytes: Circular buffer size is 128 bytes.

enumerator kEDMA_Modulo256bytes: Circular buffer size is 256 bytes.

enumerator kEDMA_Modulo512bytes: Circular buffer size is 512 bytes.

enumerator kEDMA_Modulo1Kbytes: Circular buffer size is 1 K bytes.

enumerator kEDMA_Modulo2Kbytes: Circular buffer size is 2 K bytes.

enumerator kEDMA_Modulo4Kbytes: Circular buffer size is 4 K bytes.

enumerator kEDMA_Modulo8Kbytes: Circular buffer size is 8 K bytes.

enumerator kEDMA_Modulo16Kbytes: Circular buffer size is 16 K bytes.

enumerator kEDMA_Modulo32Kbytes: Circular buffer size is 32 K bytes.

enumerator kEDMA_Modulo64Kbytes: Circular buffer size is 64 K bytes.

enumerator kEDMA_Modulo128Kbytes: Circular buffer size is 128 K bytes.

enumerator kEDMA_Modulo256Kbytes: Circular buffer size is 256 K bytes.

enumerator kEDMA_Modulo512Kbytes: Circular buffer size is 512 K bytes.

enumerator kEDMA_Modulo1Mbytes: Circular buffer size is 1 M bytes.

enumerator kEDMA_Modulo2Mbytes: Circular buffer size is 2 M bytes.

enumerator kEDMA_Modulo4Mbytes: Circular buffer size is 4 M bytes.

enumerator kEDMA_Modulo8Mbytes: Circular buffer size is 8 M bytes.

enumerator kEDMA_Modulo16Mbytes: Circular buffer size is 16 M bytes.

enumerator kEDMA_Modulo32Mbytes: Circular buffer size is 32 M bytes.

enumerator kEDMA_Modulo64Mbytes: Circular buffer size is 64 M bytes.

enumerator kEDMA_Modulo128Mbytes: Circular buffer size is 128 M bytes.

enumerator kEDMA_Modulo256Mbytes: Circular buffer size is 256 M bytes.

enumerator kEDMA_Modulo512Mbytes: Circular buffer size is 512 M bytes.

enumerator kEDMA_Modulo1Gbytes: Circular buffer size is 1 G bytes.

enumerator kEDMA_Modulo2Gbytes: Circular buffer size is 2 G bytes.

enum _edma_bandwidth

Bandwidth control.

Values:

enumerator kEDMA_BandwidthStallNone: No eDMA engine stalls.

enumerator kEDMA_BandwidthStall4Cycle: eDMA engine stalls for 4 cycles after each read/write.

enumerator kEDMA_BandwidthStall8Cycle: eDMA engine stalls for 8 cycles after each read/write.

enum _edma_channel_link_type

Channel link type.

Values:

enumerator kEDMA_LinkNone: No channel link

enumerator kEDMA_MinorLink: Channel link after each minor loop

enumerator kEDMA_MajorLink: Channel link while major loop count exhausted

enum _edma_channel_security_level

eDMA channel security level

Values:

enumerator kEDMA_ChannelSecurityLevelNonSecure: Channel executes in non-secure mode

enumerator kEDMA_ChannelSecurityLevelSecure: Channel executes in secure mode

enum _edma_channel_protection_level

eDMA channel protection level

Values:

enumerator kEDMA_ChannelProtectionLevelUser: Channel executes at user privilege level

enumerator kEDMA_ChannelProtectionLevelPrivileged: Channel executes at privileged level

eDMA channel status flags, _edma_channel_status_flags

Values:

enumerator kEDMA_DoneFlag: DONE flag, set while transfer finished, CITER value exhausted

enumerator kEDMA_ErrorFlag: eDMA error flag, an error occurred in a transfer

enumerator kEDMA_InterruptFlag: eDMA interrupt flag, set while an interrupt occurred of this channel

eDMA channel error status flags, _edma_error_status_flags

Values:

enumerator kEDMA_DestinationBusErrorFlag: Bus error on destination address

enumerator kEDMA_SourceBusErrorFlag: Bus error on the source address

enumerator kEDMA_ScatterGatherErrorFlag: Error on the Scatter/Gather address, not 32byte aligned.

enumerator kEDMA_NbytesErrorFlag: NBYTES/CITER configuration error

enumerator kEDMA_DestinationOffsetErrorFlag: Destination offset not aligned with destination size

enumerator kEDMA_DestinationAddressErrorFlag: Destination address not aligned with destination size

enumerator kEDMA_SourceOffsetErrorFlag: Source offset not aligned with source size

enumerator kEDMA_SourceAddressErrorFlag: Source address not aligned with source size

enumerator kEDMA_TransferCanceledFlag: Transfer cancelled

enumerator kEDMA_ErrorChannelFlag: Error channel number of the cancelled channel number

enumerator kEDMA_ValidFlag: No error occurred, this bit is 0. Otherwise, it is 1.

eDMA channel system bus information, _edma_channel_sys_bus_info

Values:

enumerator kEDMA_AttributeOutput: DMA’s AHB system bus attribute output value.

enumerator kEDMA_PrivilegedAccessLevel: Privileged Access Level for DMA transfers. 0b - User protection level; 1b - Privileged protection level.

enumerator kEDMA_MasterId: DMA’s master ID when channel is active and master ID replication is enabled.

enum _edma_interrupt_enable

eDMA interrupt source

Values:

enumerator kEDMA_ErrorInterruptEnable: Enable interrupt while channel error occurs.

enumerator kEDMA_MajorInterruptEnable: Enable interrupt while major count exhausted.

enumerator kEDMA_HalfInterruptEnable: Enable interrupt while major count to half value.

enum _edma_transfer_type

eDMA transfer type

Values:

enumerator kEDMA_MemoryToMemory: Transfer from memory to memory

enumerator kEDMA_PeripheralToMemory: Transfer from peripheral to memory

enumerator kEDMA_MemoryToPeripheral: Transfer from memory to peripheral

enumerator kEDMA_PeripheralToPeripheral: Transfer from Peripheral to peripheral

eDMA transfer status, _edma_transfer_status

Values:

enumerator kStatus_EDMA_QueueFull: TCD queue is full.

enumerator kStatus_EDMA_Busy: Channel is busy and can’t handle the transfer request.

typedef enum _edma_transfer_size edma_transfer_size_t: eDMA transfer configuration

typedef enum _edma_modulo edma_modulo_t: eDMA modulo configuration

typedef enum _edma_bandwidth edma_bandwidth_t: Bandwidth control.

typedef enum _edma_channel_link_type edma_channel_link_type_t: Channel link type.

typedef enum _edma_channel_security_level edma_channel_security_level_t: eDMA channel security level

typedef enum _edma_channel_protection_level edma_channel_protection_level_t: eDMA channel protection level

typedef enum _edma_interrupt_enable edma_interrupt_enable_t: eDMA interrupt source

typedef enum _edma_transfer_type edma_transfer_type_t: eDMA transfer type

typedef struct _edma_config edma_config_t: eDMA global configuration structure.

typedef struct _edma_transfer_config edma_transfer_config_t

eDMA transfer configuration

This structure configures the source/destination transfer attribute.

typedef struct _edma_channel_Preemption_config edma_channel_Preemption_config_t: eDMA channel priority configuration

typedef struct _edma_minor_offset_config edma_minor_offset_config_t: eDMA minor offset configuration

typedef struct _edma_tcd edma_tcd_t

eDMA TCD.

This structure is same as TCD register which is described in reference manual, and is used to configure the scatter/gather feature as a next hardware TCD.

typedef void (*edma_callback)(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds): Define callback function for eDMA.

typedef uint32_t (*edma_memorymap_callback)(uint32_t addr): Memroy map function callback for DMA.

typedef struct _edma_handle edma_handle_t: eDMA transfer handle structure

struct _edma_config

#include <fsl_edma.h>

eDMA global configuration structure.

Public Members

bool enableMasterIdReplication: Enable (true) master ID replication. If Master ID replication is disabled, the privileged protection level (supervisor mode) for DMA transfers is used.

bool enableHaltOnError: Enable (true) transfer halt on error. Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared.

bool enableRoundRobinArbitration: Enable (true) round robin channel arbitration method or fixed priority arbitration is used for channel selection

bool enableDebugMode: Enable(true) eDMA debug mode. When in debug mode, the eDMA stalls the start of a new channel. Executing channels are allowed to complete.

struct _edma_transfer_config

#include <fsl_edma.h>

eDMA transfer configuration

This structure configures the source/destination transfer attribute.

Public Members

uint32_t srcAddr: Source data address.

uint32_t destAddr: Destination data address.

edma_transfer_size_t srcTransferSize: Source data transfer size.

edma_transfer_size_t destTransferSize: Destination data transfer size.

int16_t srcOffset: Sign-extended offset applied to the current source address to form the next-state value as each source read is completed.

int16_t destOffset: Sign-extended offset applied to the current destination address to form the next-state value as each destination write is completed.

uint32_t minorLoopBytes: Bytes to transfer in a minor loop

uint32_t majorLoopCounts: Major loop iteration count.

struct _edma_channel_Preemption_config

#include <fsl_edma.h>

eDMA channel priority configuration

Public Members

bool enableChannelPreemption: If true: a channel can be suspended by other channel with higher priority

bool enablePreemptAbility: If true: a channel can suspend other channel with low priority

uint8_t channelPriority: Channel priority

struct _edma_minor_offset_config

#include <fsl_edma.h>

eDMA minor offset configuration

Public Members

bool enableSrcMinorOffset: Enable(true) or Disable(false) source minor loop offset.

bool enableDestMinorOffset: Enable(true) or Disable(false) destination minor loop offset.

uint32_t minorOffset: Offset for a minor loop mapping.

struct _edma_tcd

#include <fsl_edma.h>

eDMA TCD.

This structure is same as TCD register which is described in reference manual, and is used to configure the scatter/gather feature as a next hardware TCD.

Public Members

__IO uint32_t SADDR: SADDR register, used to save source address

__IO uint16_t SOFF: SOFF register, save offset bytes every transfer

__IO uint16_t ATTR: ATTR register, source/destination transfer size and modulo

__IO uint32_t NBYTES: Nbytes register, minor loop length in bytes

__IO uint32_t SLAST: SLAST register

__IO uint32_t DADDR: DADDR register, used for destination address

__IO uint16_t DOFF: DOFF register, used for destination offset

__IO uint16_t CITER: CITER register, current minor loop numbers, for unfinished minor loop.

__IO uint32_t DLAST_SGA: DLASTSGA register, next stcd address used in scatter-gather mode

__IO uint16_t CSR: CSR register, for TCD control status

__IO uint16_t BITER: BITER register, begin minor loop count.

struct _edma_handle

#include <fsl_edma.h>

eDMA transfer handle structure

Public Members

edma_callback callback: Callback function for major count exhausted.

void *userData: Callback function parameter.

DMA_Type *base: eDMA peripheral base address.

edma_tcd_t *tcdPool: Pointer to memory stored TCDs.

uint8_t channel: eDMA channel number.

volatile int8_t header: The first TCD index.

volatile int8_t tail: The last TCD index.

volatile int8_t tcdUsed: The number of used TCD slots.

volatile int8_t tcdSize: The total number of TCD slots in the queue.

uint8_t flags: The status of the current channel.

edma_memorymap_callback memoryCallback: Callback function for memory map convert in complex system

EWM: External Watchdog Monitor Driver#

void EWM_Init(EWM_Type *base, const ewm_config_t *config)

Initializes the EWM peripheral.

This function is used to initialize the EWM. After calling, the EWM runs immediately according to the configuration. Note that, except for the interrupt enable control bit, other control bits and registers are write once after a CPU reset. Modifying them more than once generates a bus transfer error.

This is an example.

ewm_config_t config;
EWM_GetDefaultConfig(&config);
config.compareHighValue = 0xAAU;
EWM_Init(ewm_base,&config);

Parameters:

base – EWM peripheral base address
config – The configuration of the EWM

void EWM_Deinit(EWM_Type *base)

Deinitializes the EWM peripheral.

This function is used to shut down the EWM.

Parameters:

base – EWM peripheral base address

void EWM_GetDefaultConfig(ewm_config_t *config)

Initializes the EWM configuration structure.

This function initializes the EWM configuration structure to default values. The default values are as follows.

ewmConfig->enableEwm = true;
ewmConfig->enableEwmInput = false;
ewmConfig->setInputAssertLogic = false;
ewmConfig->enableInterrupt = false;
ewmConfig->ewm_lpo_clock_source_t = kEWM_LpoClockSource0;
ewmConfig->prescaler = 0;
ewmConfig->compareLowValue = 0;
ewmConfig->compareHighValue = 0xFEU;

See also

ewm_config_t

Parameters:

config – Pointer to the EWM configuration structure.

static inline void EWM_EnableInterrupts(EWM_Type *base, uint32_t mask)

Enables the EWM interrupt.

This function enables the EWM interrupt.

Parameters:

base – EWM peripheral base address
mask – The interrupts to enable The parameter can be combination of the following source if defined
- kEWM_InterruptEnable

static inline void EWM_DisableInterrupts(EWM_Type *base, uint32_t mask)

Disables the EWM interrupt.

This function enables the EWM interrupt.

Parameters:

base – EWM peripheral base address
mask – The interrupts to disable The parameter can be combination of the following source if defined
- kEWM_InterruptEnable

static inline uint32_t EWM_GetStatusFlags(EWM_Type *base)

Gets all status flags.

This function gets all status flags.

This is an example for getting the running flag.

uint32_t status;
status = EWM_GetStatusFlags(ewm_base) & kEWM_RunningFlag;

See also

_ewm_status_flags_t

True: a related status flag has been set.
False: a related status flag is not set.

Parameters:

base – EWM peripheral base address

Returns:

State of the status flag: asserted (true) or not-asserted (false).

void EWM_Refresh(EWM_Type *base)

Services the EWM.

This function resets the EWM counter to zero.

Parameters:

base – EWM peripheral base address

FSL_EWM_DRIVER_VERSION: EWM driver version 2.0.4.

enum _ewm_lpo_clock_source

Describes EWM clock source.

Values:

enumerator kEWM_LpoClockSource0: EWM clock sourced from lpo_clk[0]

enumerator kEWM_LpoClockSource1: EWM clock sourced from lpo_clk[1]

enumerator kEWM_LpoClockSource2: EWM clock sourced from lpo_clk[2]

enumerator kEWM_LpoClockSource3: EWM clock sourced from lpo_clk[3]

enum _ewm_interrupt_enable_t

EWM interrupt configuration structure with default settings all disabled.

This structure contains the settings for all of EWM interrupt configurations.

Values:

enumerator kEWM_InterruptEnable: Enable the EWM to generate an interrupt

enum _ewm_status_flags_t

EWM status flags.

This structure contains the constants for the EWM status flags for use in the EWM functions.

Values:

enumerator kEWM_RunningFlag: Running flag, set when EWM is enabled

typedef enum _ewm_lpo_clock_source ewm_lpo_clock_source_t: Describes EWM clock source.

typedef struct _ewm_config ewm_config_t

Data structure for EWM configuration.

This structure is used to configure the EWM.

struct _ewm_config

#include <fsl_ewm.h>

Data structure for EWM configuration.

This structure is used to configure the EWM.

Public Members

bool enableEwm: Enable EWM module

bool enableEwmInput: Enable EWM_in input

bool setInputAssertLogic: EWM_in signal assertion state

bool enableInterrupt: Enable EWM interrupt

ewm_lpo_clock_source_t clockSource: Clock source select

uint8_t prescaler: Clock prescaler value

uint8_t compareLowValue: Compare low-register value

uint8_t compareHighValue: Compare high-register value

FGPIO Driver#

C40ESP3 Flash Driver#

enum _flash_driver_api_keys

Enumeration for Flash driver API keys.

Note

The resulting value is built with a byte order such that the string being readable in expected order when viewed in a hex editor, if the value is treated as a 32-bit little endian value.

Values:

enumerator kFLASH_ApiEraseKey: Key value used to validate all flash erase APIs.

status_t FLASH_Init(flash_config_t *config)

Initializes the global flash properties structure members.

This function checks and initializes the Flash module for the other Flash APIs. When async mode is enabled, this also initializes the async context including the operation queue and buffer pool.

Parameters:

config – Pointer to the storage for the driver runtime state.

Return values:

kStatus_FLASH_Success – API was executed successfully.
kStatus_FLASH_InvalidArgument – An invalid argument is provided.
kStatus_FLASH_CommandFailure – Run-time error during the command execution.
kStatus_FLASH_CommandNotSupported – Flash API is not supported.

status_t FLASH_Erase(flash_config_t *config, FMU_Type *base, uint32_t start, uint32_t lengthInBytes, uint32_t key)

Erases the flash sectors encompassed by parameters passed into function.

In synchronous mode, this function blocks until the erase completes. In asynchronous mode, this function queues the erase operation and returns immediately. The operation will be executed later by FLASH_Process() when sufficient LL idle time is available.

Parameters:

config – Pointer to the flash driver configuration.
base – FMU peripheral base address.
start – Start address of the region to erase.
lengthInBytes – Size of the region to erase in bytes.
key – Erase API key (kFLASH_ApiEraseKey).

Return values:

kStatus_FLASH_Success – Operation completed or queued successfully.
kStatus_FLASH_InvalidArgument – Invalid parameters.
#kStatus_FLASH_Busy – Queue or resources unavailable (async mode).

status_t FLASH_EraseAll(FMU_Type *base, uint32_t key)

Erases entire flash and ifr.

Note

This function always executes synchronously regardless of async mode setting.

Parameters:

base – FMU peripheral base address.
key – Erase API key.

Return values:

kStatus_FLASH_Success – Operation completed successfully.

status_t FLASH_Program(flash_config_t *config, FMU_Type *base, uint32_t start, uint8_t *src, uint32_t lengthInBytes)

Programs flash phrases with data at locations passed in through parameters.

In synchronous mode, this function blocks until programming completes. In asynchronous mode, this function copies the source data to an internal buffer, queues the operation, and returns immediately. The operation will be executed later by FLASH_Process() when sufficient LL idle time is available.

Parameters:

config – Pointer to the flash driver configuration.
base – FMU peripheral base address.
start – Target flash address for programming.
src – Pointer to source data buffer.
lengthInBytes – Number of bytes to program.

Return values:

kStatus_FLASH_Success – Operation completed or queued successfully.
kStatus_FLASH_InvalidArgument – Invalid parameters.
#kStatus_FLASH_Busy – Queue or buffer pool exhausted (async mode).

status_t FLASH_ProgramPage(flash_config_t *config, FMU_Type *base, uint32_t start, uint8_t *src, uint32_t lengthInBytes)

Programs flash pages with data at locations passed in through parameters.

Note

In async mode, this function behaves the same as FLASH_Program().

Parameters:

config – Pointer to the flash driver configuration.
base – FMU peripheral base address.
start – Target flash address for programming.
src – Pointer to source data buffer.
lengthInBytes – Number of bytes to program.

Return values:

kStatus_FLASH_Success – Operation completed or queued successfully.

status_t FLASH_Read(uint8_t *dst, uint32_t start, uint32_t lengthInBytes)

Reads data from flash memory.

This function always executes synchronously. In async mode, it checks the pending operation queue and applies any queued writes or erases to the returned data to ensure consistency.

Parameters:

config – Pointer to the flash driver configuration.
start – Source flash address to read from.
dst – Pointer to destination buffer.
lengthInBytes – Number of bytes to read.

Return values:

kStatus_FLASH_Success – Read completed successfully.
kStatus_FLASH_InvalidArgument – Invalid parameters.

status_t FLASH_VerifyErasePhrase(flash_config_t *config, FMU_Type *base, uint32_t start, uint32_t lengthInBytes): Verify that the flash phrases are erased.

status_t FLASH_VerifyErasePage(flash_config_t *config, FMU_Type *base, uint32_t start, uint32_t lengthInBytes): Verify that the flash pages are erased.

status_t FLASH_VerifyEraseSector(flash_config_t *config, FMU_Type *base, uint32_t start, uint32_t lengthInBytes): Verify that the flash sectors are erased.

status_t FLASH_VerifyEraseAll(FMU_Type *base): Verify that all flash and IFR space is erased.

status_t FLASH_VerifyEraseBlock(flash_config_t *config, FMU_Type *base, uint32_t blockaddr): Verify that a flash block is erased.

status_t FLASH_VerifyEraseIFRPhrase(flash_config_t *config, FMU_Type *base, uint32_t start, uint32_t lengthInBytes): Verify that the ifr phrases are erased.

status_t FLASH_VerifyEraseIFRPage(flash_config_t *config, FMU_Type *base, uint32_t start, uint32_t lengthInBytes): Verify that the ifr pages are erased.

status_t FLASH_VerifyEraseIFRSector(flash_config_t *config, FMU_Type *base, uint32_t start, uint32_t lengthInBytes): Verify that the ifr sectors are erased.

status_t FLASH_GetProperty(flash_config_t *config, flash_property_tag_t whichProperty, uint32_t *value): Returns the desired flash property.

status_t Read_Into_MISR(flash_config_t *config, FMU_Type *base, uint32_t start, uint32_t ending, uint32_t *seed, uint32_t *signature)

Read into MISR.

The Read into MISR operation generates a signature based on the contents of the selected flash memory using an embedded MISR.

status_t Read_IFR_Into_MISR(flash_config_t *config, FMU_Type *base, uint32_t start, uint32_t ending, uint32_t *seed, uint32_t *signature)

Read IFR into MISR.

The Read IFR into MISR operation generates a signature based on the contents of the selected IFR space using an embedded MISR.

FSL_FLASH_DRIVER_VERSION

Flash driver version for SDK.

Version 2.4.0.

enum _flash_driver_version_constants

Flash driver version for ROM.

Values:

enumerator kFLASH_DriverVersionName: Flash driver version name.

enumerator kFLASH_DriverVersionMajor: Major flash driver version.

enumerator kFLASH_DriverVersionMinor: Minor flash driver version.

enumerator kFLASH_DriverVersionBugfix: Bugfix for flash driver version.

enum _flash_property_tag

Enumeration for various flash properties.

Values:

enumerator kFLASH_PropertyPflash0SectorSize: Pflash sector size property.

enumerator kFLASH_PropertyPflash0TotalSize: Pflash total size property.

enumerator kFLASH_PropertyPflash0BlockSize: Pflash block size property.

enumerator kFLASH_PropertyPflash0BlockCount: Pflash block count property.

enumerator kFLASH_PropertyPflash0BlockBaseAddr: Pflash block base address property.

enumerator kFLASH_PropertyPflash0FacSupport: Pflash fac support property.

enumerator kFLASH_PropertyPflash0AccessSegmentSize: Pflash access segment size property.

enumerator kFLASH_PropertyPflash0AccessSegmentCount: Pflash access segment count property.

enumerator kFLASH_PropertyPflash1SectorSize: Pflash sector size property.

enumerator kFLASH_PropertyPflash1TotalSize: Pflash total size property.

enumerator kFLASH_PropertyPflash1BlockSize: Pflash block size property.

enumerator kFLASH_PropertyPflash1BlockCount: Pflash block count property.

enumerator kFLASH_PropertyPflash1BlockBaseAddr: Pflash block base address property.

enumerator kFLASH_PropertyPflash1FacSupport: Pflash fac support property.

enumerator kFLASH_PropertyPflash1AccessSegmentSize: Pflash access segment size property.

enumerator kFLASH_PropertyPflash1AccessSegmentCount: Pflash access segment count property.

enumerator kFLASH_PropertyFlexRamBlockBaseAddr: FlexRam block base address property.

enumerator kFLASH_PropertyFlexRamTotalSize: FlexRam total size property.

typedef enum _flash_property_tag flash_property_tag_t: Enumeration for various flash properties.

typedef struct _flash_mem_descriptor flash_mem_desc_t: Flash memory descriptor.

typedef struct _flash_ifr_desc flash_ifr_desc_t

typedef struct _msf1_config msf1_config_t

typedef struct _flash_config flash_config_t

Flash driver state information.

An instance of this structure is allocated by the user of the flash driver and passed into each of the driver APIs.

FLASH_ADDR_MASK

struct _flash_mem_descriptor

#include <fsl_k4_flash.h>

Flash memory descriptor.

Public Members

uint32_t blockBase: Base address of the flash block

uint32_t totalSize: The size of the flash block.

uint32_t blockCount: A number of flash blocks.

struct _flash_ifr_desc

struct _msf1_config

struct _flash_config

#include <fsl_k4_flash.h>

Flash driver state information.

An instance of this structure is allocated by the user of the flash driver and passed into each of the driver APIs.

FlexCAN: Flex Controller Area Network Driver#

FlexCAN Driver#

bool FLEXCAN_IsInstanceHasFDMode(CAN_Type *base)

Determine whether the FlexCAN instance support CAN FD mode at run time.

Note

Use this API only if different soc parts share the SOC part name macro define. Otherwise, a different SOC part name can be used to determine at compile time whether the FlexCAN instance supports CAN FD mode or not. If need use this API to determine if CAN FD mode is supported, the FLEXCAN_Init function needs to be executed first, and then call this API and use the return to value determines whether to supports CAN FD mode, if return true, continue calling FLEXCAN_FDInit to enable CAN FD mode.

Parameters:

base – FlexCAN peripheral base address.

Returns:

return TRUE if instance support CAN FD mode, FALSE if instance only support classic CAN (2.0) mode.

uint32_t FLEXCAN_GetFDMailboxOffset(CAN_Type *base, uint8_t mbIdx)

Get Mailbox offset number by dword.

This function gets the offset number of the specified mailbox. Mailbox is not consecutive between memory regions when payload is not 8 bytes so need to calculate the specified mailbox address. For example, in the first memory region, MB[0].CS address is 0x4002_4080. For 32 bytes payload frame, the second mailbox is ((1/12)*512 + 1%12*40)/4 = 10, meaning 10 dword after the 0x4002_4080, which is actually the address of mailbox MB[1].CS.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – Mailbox index.

Returns:

Mailbox address offset in word.

status_t FLEXCAN_EnterFreezeMode(CAN_Type *base)

Enter FlexCAN Freeze Mode.

This function makes the FlexCAN work under Freeze Mode.

Parameters:

base – FlexCAN peripheral base address.

Returns:

kStatus_Success Enter Freeze Mode successful kStatus_Timeout Timeout when wait for Freeze Mode Acknowledge

status_t FLEXCAN_ExitFreezeMode(CAN_Type *base)

Exit FlexCAN Freeze Mode.

This function makes the FlexCAN leave Freeze Mode.

Parameters:

base – FlexCAN peripheral base address.

Returns:

kStatus_Success Enter Freeze Mode successful kStatus_Timeout Timeout when wait for Freeze Mode Acknowledge

uint32_t FLEXCAN_GetInstance(CAN_Type *base)

Get the FlexCAN instance from peripheral base address.

Parameters:

base – FlexCAN peripheral base address.

Returns:

FlexCAN instance.

bool FLEXCAN_CalculateImprovedTimingValues(CAN_Type *base, uint32_t bitRate, uint32_t sourceClock_Hz, flexcan_timing_config_t *pTimingConfig)

Calculates the improved timing values by specific bit Rates for classical CAN.

This function use to calculates the Classical CAN timing values according to the given bit rate. The Calculated timing values will be set in CTRL1/CBT/ENCBT register. The calculation is based on the recommendation of the CiA 301 v4.2.0 and previous version document.

Parameters:

base – FlexCAN peripheral base address.
bitRate – The classical CAN speed in bps defined by user, should be less than or equal to 1Mbps.
sourceClock_Hz – The Source clock frequency in Hz.
pTimingConfig – Pointer to the FlexCAN timing configuration structure.

Returns:

TRUE if timing configuration found, FALSE if failed to find configuration.

void FLEXCAN_Init(CAN_Type *base, const flexcan_config_t *pConfig, uint32_t sourceClock_Hz)

Initializes a FlexCAN instance.

This function initializes the FlexCAN module with user-defined settings. This example shows how to set up the flexcan_config_t parameters and how to call the FLEXCAN_Init function by passing in these parameters.

flexcan_config_t flexcanConfig;
flexcanConfig.clkSrc               = kFLEXCAN_ClkSrc0;
flexcanConfig.bitRate              = 1000000U;
flexcanConfig.maxMbNum             = 16;
flexcanConfig.enableLoopBack       = false;
flexcanConfig.enableSelfWakeup     = false;
flexcanConfig.enableIndividMask    = false;
flexcanConfig.enableDoze           = false;
flexcanConfig.disableSelfReception = false;
flexcanConfig.enableListenOnlyMode = false;
flexcanConfig.timingConfig         = timingConfig;
FLEXCAN_Init(CAN0, &flexcanConfig, 40000000UL);

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the user-defined configuration structure.
sourceClock_Hz – FlexCAN Protocol Engine clock source frequency in Hz.

bool FLEXCAN_FDCalculateImprovedTimingValues(CAN_Type *base, uint32_t bitRate, uint32_t bitRateFD, uint32_t sourceClock_Hz, flexcan_timing_config_t *pTimingConfig)

Calculates the improved timing values by specific bit rates for CANFD.

This function use to calculates the CANFD timing values according to the given nominal phase bit rate and data phase bit rate. The Calculated timing values will be set in CBT/ENCBT and FDCBT/EDCBT registers. The calculation is based on the recommendation of the CiA 1301 v1.0.0 document.

Parameters:

base – FlexCAN peripheral base address.
bitRate – The CANFD bus control speed in bps defined by user.
bitRateFD – The CAN FD data phase speed in bps defined by user. Equal to bitRate means disable bit rate switching.
sourceClock_Hz – The Source clock frequency in Hz.
pTimingConfig – Pointer to the FlexCAN timing configuration structure.

Returns:

TRUE if timing configuration found, FALSE if failed to find configuration

void FLEXCAN_FDInit(CAN_Type *base, const flexcan_config_t *pConfig, uint32_t sourceClock_Hz, flexcan_mb_size_t dataSize, bool brs)

Initializes a FlexCAN instance.

This function initializes the FlexCAN module with user-defined settings. This example shows how to set up the flexcan_config_t parameters and how to call the FLEXCAN_FDInit function by passing in these parameters.

flexcan_config_t flexcanConfig;
flexcanConfig.clkSrc               = kFLEXCAN_ClkSrc0;
flexcanConfig.bitRate              = 1000000U;
flexcanConfig.bitRateFD            = 2000000U;
flexcanConfig.maxMbNum             = 16;
flexcanConfig.enableLoopBack       = false;
flexcanConfig.enableSelfWakeup     = false;
flexcanConfig.enableIndividMask    = false;
flexcanConfig.disableSelfReception = false;
flexcanConfig.enableListenOnlyMode = false;
flexcanConfig.enableDoze           = false;
flexcanConfig.timingConfig         = timingConfig;
FLEXCAN_FDInit(CAN0, &flexcanConfig, 80000000UL, kFLEXCAN_16BperMB, true);

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the user-defined configuration structure.
sourceClock_Hz – FlexCAN Protocol Engine clock source frequency in Hz.
dataSize – FlexCAN Message Buffer payload size. The actual transmitted or received CAN FD frame data size needs to be less than or equal to this value.
brs – True if bit rate switch is enabled in FD mode.

void FLEXCAN_Deinit(CAN_Type *base)

De-initializes a FlexCAN instance.

This function disables the FlexCAN module clock and sets all register values to the reset value.

Parameters:

base – FlexCAN peripheral base address.

void FLEXCAN_GetDefaultConfig(flexcan_config_t *pConfig)

Gets the default configuration structure.

This function initializes the FlexCAN configuration structure to default values. The default values are as follows. flexcanConfig->clkSrc = kFLEXCAN_ClkSrc0; flexcanConfig->bitRate = 1000000U; flexcanConfig->bitRateFD = 2000000U; flexcanConfig->maxMbNum = 16; flexcanConfig->enableLoopBack = false; flexcanConfig->enableSelfWakeup = false; flexcanConfig->enableIndividMask = false; flexcanConfig->disableSelfReception = false; flexcanConfig->enableListenOnlyMode = false; flexcanConfig->enableDoze = false; flexcanConfig->enablePretendedeNetworking = false; flexcanConfig->enableMemoryErrorControl = true; flexcanConfig->enableNonCorrectableErrorEnterFreeze = true; flexcanConfig->enableTransceiverDelayMeasure = true; flexcanConfig->enableRemoteRequestFrameStored = true; flexcanConfig->payloadEndianness = kFLEXCAN_bigEndian; flexcanConfig.timingConfig = timingConfig;

Parameters:

pConfig – Pointer to the FlexCAN configuration structure.

void FLEXCAN_SetTimingConfig(CAN_Type *base, const flexcan_timing_config_t *pConfig)

Sets the FlexCAN classical CAN protocol timing characteristic.

This function gives user settings to classical CAN or CAN FD nominal phase timing characteristic. The function is for an experienced user. For less experienced users, call the FLEXCAN_SetBitRate() instead.

Note

Calling FLEXCAN_SetTimingConfig() overrides the bit rate set in FLEXCAN_Init() or FLEXCAN_SetBitRate().

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the timing configuration structure.

status_t FLEXCAN_SetBitRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t bitRate_Bps)

Set bit rate of FlexCAN classical CAN frame or CAN FD frame nominal phase.

This function set the bit rate of classical CAN frame or CAN FD frame nominal phase base on FLEXCAN_CalculateImprovedTimingValues() API calculated timing values.

Note

Calling FLEXCAN_SetBitRate() overrides the bit rate set in FLEXCAN_Init().

Parameters:

base – FlexCAN peripheral base address.
sourceClock_Hz – Source Clock in Hz.
bitRate_Bps – Bit rate in Bps.

Returns:

kStatus_Success - Set CAN baud rate (only Nominal phase) successfully.

void FLEXCAN_SetFDTimingConfig(CAN_Type *base, const flexcan_timing_config_t *pConfig)

Sets the FlexCAN CANFD data phase timing characteristic.

This function gives user settings to CANFD data phase timing characteristic. The function is for an experienced user. For less experienced users, call the FLEXCAN_SetFDBitRate() to set both Nominal/Data bit Rate instead.

Note

Calling FLEXCAN_SetFDTimingConfig() overrides the data phase bit rate set in FLEXCAN_FDInit()/FLEXCAN_SetFDBitRate().

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the timing configuration structure.

status_t FLEXCAN_SetFDBitRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t bitRateN_Bps, uint32_t bitRateD_Bps)

Set bit rate of FlexCAN FD frame.

This function set the baud rate of FLEXCAN FD base on FLEXCAN_FDCalculateImprovedTimingValues() API calculated timing values.

Parameters:

base – FlexCAN peripheral base address.
sourceClock_Hz – Source Clock in Hz.
bitRateN_Bps – Nominal bit Rate in Bps.
bitRateD_Bps – Data bit Rate in Bps.

Returns:

kStatus_Success - Set CAN FD bit rate (include Nominal and Data phase) successfully.

void FLEXCAN_SetRxMbGlobalMask(CAN_Type *base, uint32_t mask)

Sets the FlexCAN receive message buffer global mask.

This function sets the global mask for the FlexCAN message buffer in a matching process. The configuration is only effective when the Rx individual mask is disabled in the FLEXCAN_Init().

Parameters:

base – FlexCAN peripheral base address.
mask – Rx Message Buffer Global Mask value.

void FLEXCAN_SetRxFifoGlobalMask(CAN_Type *base, uint32_t mask)

Sets the FlexCAN receive FIFO global mask.

This function sets the global mask for FlexCAN FIFO in a matching process.

Parameters:

base – FlexCAN peripheral base address.
mask – Rx Fifo Global Mask value.

void FLEXCAN_SetRxIndividualMask(CAN_Type *base, uint8_t maskIdx, uint32_t mask)

Sets the FlexCAN receive individual mask.

This function sets the individual mask for the FlexCAN matching process. The configuration is only effective when the Rx individual mask is enabled in the FLEXCAN_Init(). If the Rx FIFO is disabled, the individual mask is applied to the corresponding Message Buffer. If the Rx FIFO is enabled, the individual mask for Rx FIFO occupied Message Buffer is applied to the Rx Filter with the same index. Note that only the first 32 individual masks can be used as the Rx FIFO filter mask.

Parameters:

base – FlexCAN peripheral base address.
maskIdx – The Index of individual Mask.
mask – Rx Individual Mask value.

void FLEXCAN_SetTxMbConfig(CAN_Type *base, uint8_t mbIdx, bool enable)

Configures a FlexCAN transmit message buffer.

This function aborts the previous transmission, cleans the Message Buffer, and configures it as a Transmit Message Buffer.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
enable – Enable/disable Tx Message Buffer.
- true: Enable Tx Message Buffer.
- false: Disable Tx Message Buffer.

void FLEXCAN_SetRxMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_rx_mb_config_t *pRxMbConfig, bool enable)

Configures a FlexCAN Receive Message Buffer.

This function cleans a FlexCAN build-in Message Buffer and configures it as a Receive Message Buffer. User should invoke this API when CTRL2[RRS]=1. When CTRL2[RRS]=1, frame’s ID is compared to the IDs of the receive mailboxes with the CODE field configured as kFLEXCAN_RxMbEmpty, kFLEXCAN_RxMbFull or kFLEXCAN_RxMbOverrun. Message buffer will store the remote frame in the same fashion of a data frame. No automatic remote response frame will be generated. User need to setup another message buffer to respond remote request.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
pRxMbConfig – Pointer to the FlexCAN Message Buffer configuration structure.
enable – Enable/disable Rx Message Buffer.
- true: Enable Rx Message Buffer.
- false: Disable Rx Message Buffer.

static inline void FLEXCAN_SetMbID(CAN_Type *base, uint8_t mbIdx, uint32_t id)

Configures a FlexCAN Message Buffer identifier.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
id – CAN Message Buffer Identifier, should use FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro.

void FLEXCAN_SetFDTxMbConfig(CAN_Type *base, uint8_t mbIdx, bool enable)

Configures a FlexCAN transmit message buffer.

This function aborts the previous transmission, cleans the Message Buffer, and configures it as a Transmit Message Buffer.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
enable – Enable/disable Tx Message Buffer.
- true: Enable Tx Message Buffer.
- false: Disable Tx Message Buffer.

void FLEXCAN_SetFDRxMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_rx_mb_config_t *pRxMbConfig, bool enable)

Configures a FlexCAN Receive Message Buffer.

This function cleans a FlexCAN build-in Message Buffer and configures it as a Receive Message Buffer.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
pRxMbConfig – Pointer to the FlexCAN Message Buffer configuration structure.
enable – Enable/disable Rx Message Buffer.
- true: Enable Rx Message Buffer.
- false: Disable Rx Message Buffer.

static inline void FLEXCAN_SetFDMbID(CAN_Type *base, uint8_t mbIdx, uint32_t id)

Configures a FlexCAN Message Buffer identifier.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
id – CAN Message Buffer Identifier, should use FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro.

void FLEXCAN_SetRemoteResponseMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_frame_t *pFrame)

Configures a FlexCAN Remote Response Message Buffer.

User should invoke this API when CTRL2[RRS]=0. When CTRL2[RRS]=0, frame’s ID is compared to the IDs of the receive mailboxes with the CODE field configured as kFLEXCAN_RxMbRanswer. If there is a matching ID, then this mailbox content will be transmitted as response. The received remote request frame is not stored in receive buffer. It is only used to trigger a transmission of a frame in response.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
pFrame – Pointer to CAN message frame structure for response.

void FLEXCAN_SetRxFifoConfig(CAN_Type *base, const flexcan_rx_fifo_config_t *pRxFifoConfig, bool enable)

Configures the FlexCAN Legacy Rx FIFO.

This function configures the FlexCAN Rx FIFO with given configuration.

Note

Legacy Rx FIFO only can receive classic CAN message.

Parameters:

base – FlexCAN peripheral base address.
pRxFifoConfig – Pointer to the FlexCAN Legacy Rx FIFO configuration structure. Can be NULL when enable parameter is false.
enable – Enable/disable Legacy Rx FIFO.
- true: Enable Legacy Rx FIFO.
- false: Disable Legacy Rx FIFO.

void FLEXCAN_SetEnhancedRxFifoConfig(CAN_Type *base, const flexcan_enhanced_rx_fifo_config_t *pConfig, bool enable)

Configures the FlexCAN Enhanced Rx FIFO.

This function configures the Enhanced Rx FIFO with given configuration.

Note

Enhanced Rx FIFO support receive classic CAN or CAN FD messages, Legacy Rx FIFO and Enhanced Rx FIFO cannot be enabled at the same time.

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the FlexCAN Enhanced Rx FIFO configuration structure. Can be NULL when enable parameter is false.
enable – Enable/disable Enhanced Rx FIFO.
- true: Enable Enhanced Rx FIFO.
- false: Disable Enhanced Rx FIFO.

void FLEXCAN_SetPNConfig(CAN_Type *base, const flexcan_pn_config_t *pConfig)

Configures the FlexCAN Pretended Networking mode.

This function configures the FlexCAN Pretended Networking mode with given configuration.

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the FlexCAN Rx FIFO configuration structure.

static inline uint64_t FLEXCAN_GetStatusFlags(CAN_Type *base)

Gets the FlexCAN module interrupt flags.

This function gets all FlexCAN status flags. The flags are returned as the logical OR value of the enumerators _flexcan_flags. To check the specific status, compare the return value with enumerators in _flexcan_flags.

Parameters:

base – FlexCAN peripheral base address.

Returns:

FlexCAN status flags which are ORed by the enumerators in the _flexcan_flags.

static inline void FLEXCAN_ClearStatusFlags(CAN_Type *base, uint64_t mask)

Clears status flags with the provided mask.

This function clears the FlexCAN status flags with a provided mask. An automatically cleared flag can’t be cleared by this function.

Parameters:

base – FlexCAN peripheral base address.
mask – The status flags to be cleared, it is logical OR value of _flexcan_flags.

static inline void FLEXCAN_GetBusErrCount(CAN_Type *base, uint8_t *txErrBuf, uint8_t *rxErrBuf)

Gets the FlexCAN Bus Error Counter value.

This function gets the FlexCAN Bus Error Counter value for both Tx and Rx direction. These values may be needed in the upper layer error handling.

Parameters:

base – FlexCAN peripheral base address.
txErrBuf – Buffer to store Tx Error Counter value.
rxErrBuf – Buffer to store Rx Error Counter value.

static inline uint64_t FLEXCAN_GetMbStatusFlags(CAN_Type *base, uint64_t mask)

Gets the FlexCAN low 64 Message Buffer interrupt flags.

This function gets the interrupt flags of a given Message Buffers.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

Returns:

The status of given Message Buffers.

static inline uint64_t FLEXCAN_GetHigh64MbStatusFlags(CAN_Type *base, uint64_t mask)

Gets the FlexCAN High 64 Message Buffer interrupt flags.

Valid only if the number of available MBs exceeds 64.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

Returns:

The status of given Message Buffers.

static inline void FLEXCAN_ClearMbStatusFlags(CAN_Type *base, uint64_t mask)

Clears the FlexCAN low 64 Message Buffer interrupt flags.

This function clears the interrupt flags of a given Message Buffers.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

static inline void FLEXCAN_ClearHigh64MbStatusFlags(CAN_Type *base, uint64_t mask)

Clears the FlexCAN High 64 Message Buffer interrupt flags.

Valid only if the number of available MBs exceeds 64.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

void FLEXCAN_GetMemoryErrorReportStatus(CAN_Type *base, flexcan_memory_error_report_status_t *errorStatus)

Gets the FlexCAN Memory Error Report registers status.

This function gets the FlexCAN Memory Error Report registers status.

Parameters:

base – FlexCAN peripheral base address.
errorStatus – Pointer to FlexCAN Memory Error Report registers status structure.

static inline uint8_t FLEXCAN_GetPNMatchCount(CAN_Type *base)

Gets the FlexCAN Number of Matches when in Pretended Networking.

This function gets the number of times a given message has matched the predefined filtering criteria for ID and/or PL before a wakeup event.

Parameters:

base – FlexCAN peripheral base address.

Returns:

The number of received wake up msessages.

static inline uint32_t FLEXCAN_GetEnhancedFifoDataCount(CAN_Type *base)

Gets the number of FlexCAN Enhanced Rx FIFO available frames.

This function gets the number of CAN messages stored in the Enhanced Rx FIFO.

Parameters:

base – FlexCAN peripheral base address.

Returns:

The number of available CAN messages stored in the Enhanced Rx FIFO.

static inline void FLEXCAN_EnableInterrupts(CAN_Type *base, uint64_t mask)

Enables FlexCAN interrupts according to the provided mask.

This function enables the FlexCAN interrupts according to the provided mask. The mask is a logical OR of enumeration members, see _flexcan_interrupt_enable.

Parameters:

base – FlexCAN peripheral base address.
mask – The interrupts to enable. Logical OR of _flexcan_interrupt_enable.

static inline void FLEXCAN_DisableInterrupts(CAN_Type *base, uint64_t mask)

Disables FlexCAN interrupts according to the provided mask.

This function disables the FlexCAN interrupts according to the provided mask. The mask is a logical OR of enumeration members, see _flexcan_interrupt_enable.

Parameters:

base – FlexCAN peripheral base address.
mask – The interrupts to disable. Logical OR of _flexcan_interrupt_enable.

static inline void FLEXCAN_EnableMbInterrupts(CAN_Type *base, uint64_t mask)

Enables FlexCAN low 64 Message Buffer interrupts.

This function enables the interrupts of given Message Buffers.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

static inline void FLEXCAN_EnableHigh64MbInterrupts(CAN_Type *base, uint64_t mask)

Enables FlexCAN high 64 Message Buffer interrupts.

Valid only if the number of available MBs exceeds 64.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

static inline void FLEXCAN_DisableMbInterrupts(CAN_Type *base, uint64_t mask)

Disables FlexCAN low 64 Message Buffer interrupts.

This function disables the interrupts of given Message Buffers.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

static inline void FLEXCAN_DisableHigh64MbInterrupts(CAN_Type *base, uint64_t mask)

Disables FlexCAN high 64 Message Buffer interrupts.

Valid only if the number of available MBs exceeds 64.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

void FLEXCAN_EnableRxFifoDMA(CAN_Type *base, bool enable)

Enables or disables the FlexCAN Rx FIFO DMA request.

This function enables or disables the DMA feature of FlexCAN build-in Rx FIFO.

Parameters:

base – FlexCAN peripheral base address.
enable – true to enable, false to disable.

static inline uintptr_t FLEXCAN_GetRxFifoHeadAddr(CAN_Type *base)

Gets the Rx FIFO Head address.

This function returns the FlexCAN Rx FIFO Head address, which is mainly used for the DMA/eDMA use case.

Parameters:

base – FlexCAN peripheral base address.

Returns:

FlexCAN Rx FIFO Head address.

static inline status_t FLEXCAN_Enable(CAN_Type *base, bool enable)

Enables or disables the FlexCAN module operation.

This function enables or disables the FlexCAN module.

Parameters:

base – FlexCAN base pointer.
enable – true to enable, false to disable.

Returns:

kStatus_Success Enable FlexCAN module successful kStatus_Timeout Timeout when wait for Low-Power Mode Acknowledge

status_t FLEXCAN_WriteTxMb(CAN_Type *base, uint8_t mbIdx, const flexcan_frame_t *pTxFrame)

Writes a FlexCAN Message to the Transmit Message Buffer.

This function writes a CAN Message to the specified Transmit Message Buffer and changes the Message Buffer state to start CAN Message transmit. After that the function returns immediately.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The FlexCAN Message Buffer index.
pTxFrame – Pointer to CAN message frame to be sent.

Return values:

kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.

status_t FLEXCAN_ReadRxMb(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pRxFrame)

Reads a FlexCAN Message from Receive Message Buffer.

This function reads a CAN message from a specified Receive Message Buffer. The function fills a receive CAN message frame structure with just received data and activates the Message Buffer again. The function returns immediately.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The FlexCAN Message Buffer index.
pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Rx Message Buffer is full and has been read successfully.
kStatus_FLEXCAN_RxOverflow – - Rx Message Buffer is already overflowed and has been read successfully.
kStatus_Fail – - Rx Message Buffer is empty or inactive.
kStatus_Timeout – - Timeout when wait for Rx Message Buffer busy.

status_t FLEXCAN_WriteFDTxMb(CAN_Type *base, uint8_t mbIdx, const flexcan_fd_frame_t *pTxFrame)

Writes a FlexCAN FD Message to the Transmit Message Buffer.

This function writes a CAN FD Message to the specified Transmit Message Buffer and changes the Message Buffer state to start CAN FD Message transmit. After that the function returns immediately.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The FlexCAN FD Message Buffer index.
pTxFrame – Pointer to CAN FD message frame to be sent.

Return values:

kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.

status_t FLEXCAN_ReadFDRxMb(CAN_Type *base, uint8_t mbIdx, flexcan_fd_frame_t *pRxFrame)

Reads a FlexCAN FD Message from Receive Message Buffer.

This function reads a CAN FD message from a specified Receive Message Buffer. The function fills a receive CAN FD message frame structure with just received data and activates the Message Buffer again. The function returns immediately.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The FlexCAN FD Message Buffer index.
pRxFrame – Pointer to CAN FD message frame structure for reception.

Return values:

kStatus_Success – - Rx Message Buffer is full and has been read successfully.
kStatus_FLEXCAN_RxOverflow – - Rx Message Buffer is already overflowed and has been read successfully.
kStatus_Fail – - Rx Message Buffer is empty or inactive.
kStatus_Timeout – - Timeout when wait for Rx Message Buffer busy.

status_t FLEXCAN_ReadRxFifo(CAN_Type *base, flexcan_frame_t *pRxFrame)

Reads a FlexCAN Message from Legacy Rx FIFO.

This function reads a CAN message from the FlexCAN Legacy Rx FIFO.

Parameters:

base – FlexCAN peripheral base address.
pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Read Message from Rx FIFO successfully.
kStatus_Fail – - Rx FIFO is not enabled.

status_t FLEXCAN_ReadEnhancedRxFifo(CAN_Type *base, flexcan_fd_frame_t *pRxFrame)

Reads a FlexCAN Message from Enhanced Rx FIFO.

This function reads a CAN or CAN FD message from the FlexCAN Enhanced Rx FIFO.

Parameters:

base – FlexCAN peripheral base address.
pRxFrame – Pointer to CAN FD message frame structure for reception.

Return values:

kStatus_Success – - Read Message from Rx FIFO successfully.
kStatus_Fail – - Rx FIFO is not enabled.

status_t FLEXCAN_ReadPNWakeUpMB(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pRxFrame)

Reads a FlexCAN Message from Wake Up MB.

This function reads a CAN message from the FlexCAN Wake up Message Buffers. There are four Wake up Message Buffers (WMBs) used to store incoming messages in Pretended Networking mode. The WMB index indicates the arrival order. The last message is stored in WMB3.

Parameters:

base – FlexCAN peripheral base address.
pRxFrame – Pointer to CAN message frame structure for reception.
mbIdx – The FlexCAN Wake up Message Buffer index. Range in 0x0 ~ 0x3.

Return values:

kStatus_Success – - Read Message from Wake up Message Buffer successfully.
kStatus_Fail – - Wake up Message Buffer has no valid content.

status_t FLEXCAN_TransferFDSendBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_fd_frame_t *pTxFrame)

Performs a polling send transaction on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
mbIdx – The FlexCAN FD Message Buffer index.
pTxFrame – Pointer to CAN FD message frame to be sent.

Return values:

kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.
kStatus_Timeout – - Failed to send frames within specific time.

status_t FLEXCAN_TransferFDReceiveBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_fd_frame_t *pRxFrame)

Performs a polling receive transaction on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
mbIdx – The FlexCAN FD Message Buffer index.
pRxFrame – Pointer to CAN FD message frame structure for reception.

Return values:

kStatus_Success – - Rx Message Buffer is full and has been read successfully.
kStatus_FLEXCAN_RxOverflow – - Rx Message Buffer is already overflowed and has been read successfully.
kStatus_Fail – - Rx Message Buffer is empty.
kStatus_Timeout – - Failed to receive frames within specific time.

status_t FLEXCAN_TransferFDSendNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Sends a message using IRQ.

This function sends a message using IRQ. This is a non-blocking function, which returns right away. When messages have been sent out, the send callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN FD Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – Start Tx Message Buffer sending process successfully.
kStatus_Fail – Write Tx Message Buffer failed.
kStatus_FLEXCAN_TxBusy – Tx Message Buffer is in use.

status_t FLEXCAN_TransferFDReceiveNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Receives a message using IRQ.

This function receives a message using IRQ. This is non-blocking function, which returns right away. When the message has been received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN FD Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – - Start Rx Message Buffer receiving process successfully.
kStatus_FLEXCAN_RxBusy – - Rx Message Buffer is in use.

void FLEXCAN_TransferFDAbortSend(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx)

Aborts the interrupt driven message send process.

This function aborts the interrupt driven message send process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
mbIdx – The FlexCAN FD Message Buffer index.

void FLEXCAN_TransferFDAbortReceive(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx)

Aborts the interrupt driven message receive process.

This function aborts the interrupt driven message receive process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
mbIdx – The FlexCAN FD Message Buffer index.

status_t FLEXCAN_TransferSendBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pTxFrame)

Performs a polling send transaction on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
mbIdx – The FlexCAN Message Buffer index.
pTxFrame – Pointer to CAN message frame to be sent.

Return values:

kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.
kStatus_Timeout – - Failed to send frames within specific time.

status_t FLEXCAN_TransferReceiveBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pRxFrame)

Performs a polling receive transaction on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
mbIdx – The FlexCAN Message Buffer index.
pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Rx Message Buffer is full and has been read successfully.
kStatus_FLEXCAN_RxOverflow – - Rx Message Buffer is already overflowed and has been read successfully.
kStatus_Fail – - Rx Message Buffer is empty.
kStatus_Timeout – - Failed to receive frames within specific time.

status_t FLEXCAN_TransferReceiveFifoBlocking(CAN_Type *base, flexcan_frame_t *pRxFrame)

Performs a polling receive transaction from Legacy Rx FIFO on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Read Message from Rx FIFO successfully.
kStatus_Fail – - Rx FIFO is not enabled.
kStatus_Timeout – - Failed to receive frames within specific time.

status_t FLEXCAN_TransferReceiveEnhancedFifoBlocking(CAN_Type *base, flexcan_fd_frame_t *pRxFrame)

Performs a polling receive transaction from Enhanced Rx FIFO on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
pRxFrame – Pointer to CAN FD message frame structure for reception.

Return values:

kStatus_Success – - Read Message from Rx FIFO successfully.
kStatus_Fail – - Rx FIFO is not enabled.
kStatus_Timeout – - Failed to receive frames within specific time.

void FLEXCAN_TransferCreateHandle(CAN_Type *base, flexcan_handle_t *handle, flexcan_transfer_callback_t callback, void *userData)

Initializes the FlexCAN handle.

This function initializes the FlexCAN handle, which can be used for other FlexCAN transactional APIs. Usually, for a specified FlexCAN instance, call this API once to get the initialized handle.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
callback – The callback function.
userData – The parameter of the callback function.

status_t FLEXCAN_TransferSendNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Sends a message using IRQ.

This function sends a message using IRQ. This is a non-blocking function, which returns right away. When messages have been sent out, the send callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – Start Tx Message Buffer sending process successfully.
kStatus_Fail – Write Tx Message Buffer failed.
kStatus_FLEXCAN_TxBusy – Tx Message Buffer is in use.

status_t FLEXCAN_TransferReceiveNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Receives a message using IRQ.

This function receives a message using IRQ. This is non-blocking function, which returns right away. When the message has been received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – - Start Rx Message Buffer receiving process successfully.
kStatus_FLEXCAN_RxBusy – - Rx Message Buffer is in use.

status_t FLEXCAN_TransferRemoteRequestNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Sends a remote request frame using IRQ.

This function sends a remote request frame using IRQ. This is a non-blocking function, which returns right away. When the remote request frame has been sent out, the send callback function is called. User should invoke API FLEXCAN_TransferReceiveNonBlocking to receive the response frame. Receive message buffer index should less than send message buffer index.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – Start Tx remote request frame sending process successfully.
kStatus_Fail – Write Tx Message Buffer failed.
kStatus_FLEXCAN_TxBusy – Message Buffer is transmitting remote request frame.

status_t FLEXCAN_TransferRemoteResponseNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Configures a FlexCAN Message Buffer for automatic remote response using IRQ.

This function configures a Message Buffer to automatically respond to remote request frames using IRQ. This is a non-blocking function, which returns right away. When a matching remote request frame is received, the configured response frame will be transmitted automatically, and the callback function will be called. User should invoke this API when CTRL2[RRS]=0. When CTRL2[RRS]=0, if a remote request frame is received and matches a mailbox configured with CODE=kFLEXCAN_RxMbRanswer, the mailbox content will be transmitted as a response frame automatically. The received remote request frame is not stored.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – Configure remote response Message Buffer successfully.
kStatus_Busy – Message Buffer is waiting for remote request frame or transmitting response frame.

status_t FLEXCAN_TransferReceiveFifoNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_fifo_transfer_t *pFifoXfer)

Receives a message from Rx FIFO using IRQ.

This function receives a message using IRQ. This is a non-blocking function, which returns right away. When all messages have been received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pFifoXfer – FlexCAN Rx FIFO transfer structure. See the flexcan_fifo_transfer_t.

Return values:

kStatus_Success – - Start Rx FIFO receiving process successfully.
kStatus_FLEXCAN_RxFifoBusy – - Rx FIFO is currently in use.

status_t FLEXCAN_TransferGetReceiveFifoCount(CAN_Type *base, flexcan_handle_t *handle, size_t *count)

Gets the Rx Fifo transfer status during a interrupt non-blocking receive.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
count – Number of CAN messages receive so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

status_t FLEXCAN_TransferReceiveEnhancedFifoNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_fifo_transfer_t *pFifoXfer)

Receives a message from Enhanced Rx FIFO using IRQ.

This function receives a message using IRQ. This is a non-blocking function, which returns right away. When all messages have been received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pFifoXfer – FlexCAN Rx FIFO transfer structure. See the ref flexcan_fifo_transfer_t.@

Return values:

kStatus_Success – - Start Rx FIFO receiving process successfully.
kStatus_FLEXCAN_RxFifoBusy – - Rx FIFO is currently in use.

static inline status_t FLEXCAN_TransferGetReceiveEnhancedFifoCount(CAN_Type *base, flexcan_handle_t *handle, size_t *count)

Gets the Enhanced Rx Fifo transfer status during a interrupt non-blocking receive.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
count – Number of CAN messages receive so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

uint32_t FLEXCAN_GetTimeStamp(flexcan_handle_t *handle, uint8_t mbIdx)

Gets the detail index of Mailbox’s Timestamp by handle.

Then function can only be used when calling non-blocking Data transfer (TX/RX) API, After TX/RX data transfer done (User can get the status by handler’s callback function), we can get the detail index of Mailbox’s timestamp by handle, Detail non-blocking data transfer API (TX/RX) contain. -FLEXCAN_TransferSendNonBlocking -FLEXCAN_TransferFDSendNonBlocking -FLEXCAN_TransferReceiveNonBlocking -FLEXCAN_TransferFDReceiveNonBlocking -FLEXCAN_TransferReceiveFifoNonBlocking

Parameters:

handle – FlexCAN handle pointer.
mbIdx – The FlexCAN Message Buffer index.

Return values:

the – index of mailbox ‘s timestamp stored in the handle.

static inline uint32_t FLEXCAN_GetHighResolutionTimeStamp(CAN_Type *base, uint8_t mbIdx)

void FLEXCAN_TransferAbortSend(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx)

Aborts the interrupt driven message send process.

This function aborts the interrupt driven message send process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
mbIdx – The FlexCAN Message Buffer index.

void FLEXCAN_TransferAbortReceive(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx)

Aborts the interrupt driven message receive process.

This function aborts the interrupt driven message receive process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
mbIdx – The FlexCAN Message Buffer index.

void FLEXCAN_TransferAbortReceiveFifo(CAN_Type *base, flexcan_handle_t *handle)

Aborts the interrupt driven message receive from Rx FIFO process.

This function aborts the interrupt driven message receive from Rx FIFO process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

void FLEXCAN_TransferAbortReceiveEnhancedFifo(CAN_Type *base, flexcan_handle_t *handle)

Aborts the interrupt driven message receive from Enhanced Rx FIFO process.

This function aborts the interrupt driven message receive from Enhanced Rx FIFO process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

void FLEXCAN_TransferHandleIRQ(CAN_Type *base, flexcan_handle_t *handle)

FlexCAN IRQ handle function.

This function handles the FlexCAN Error, the Message Buffer, and the Rx FIFO IRQ request.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

void FLEXCAN_MbHandleIRQ(CAN_Type *base, flexcan_handle_t *handle, uint32_t startMbIdx, uint32_t endMbIdx)

FlexCAN Message Buffer IRQ handle function.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
startMbIdx – First Message Buffer to handle.
endMbIdx – Last Message Buffer to handle.

void FLEXCAN_EnhancedRxFifoHandleIRQ(CAN_Type *base, flexcan_handle_t *handle)

FlexCAN Enhanced Rx FIFO IRQ handle function.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

void FLEXCAN_BusoffErrorHandleIRQ(CAN_Type *base, flexcan_handle_t *handle)

FlexCAN Bus Off, Error and Warning IRQ handle function.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

void FLEXCAN_PNWakeUpHandleIRQ(CAN_Type *base, flexcan_handle_t *handle)

FlexCAN Pretended Networking Wake-up IRQ handle function.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

void FLEXCAN_MemoryErrorHandleIRQ(CAN_Type *base, flexcan_handle_t *handle)

FlexCAN Memory Error IRQ handle function.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

FSL_FLEXCAN_DRIVER_VERSION: FlexCAN driver version.

FlexCAN transfer status.

Values:

enumerator kStatus_FLEXCAN_TxBusy: Tx Message Buffer is Busy.

enumerator kStatus_FLEXCAN_TxIdle: Tx Message Buffer is Idle.

enumerator kStatus_FLEXCAN_TxSwitchToRx: Remote Message is send out and Message buffer changed to Receive one.

enumerator kStatus_FLEXCAN_RxBusy: Rx Message Buffer is Busy.

enumerator kStatus_FLEXCAN_RxIdle: Rx Message Buffer is Idle.

enumerator kStatus_FLEXCAN_RxOverflow: Rx Message Buffer is Overflowed.

enumerator kStatus_FLEXCAN_RxFifoBusy: Rx Message FIFO is Busy.

enumerator kStatus_FLEXCAN_RxFifoIdle: Rx Message FIFO is Idle.

enumerator kStatus_FLEXCAN_RxFifoOverflow: Rx Message FIFO is overflowed.

enumerator kStatus_FLEXCAN_RxFifoWarning: Rx Message FIFO is almost overflowed.

enumerator kStatus_FLEXCAN_RxFifoDisabled: Rx Message FIFO is disabled during reading.

enumerator kStatus_FLEXCAN_ErrorStatus: FlexCAN Module Error and Status.

enumerator kStatus_FLEXCAN_WakeUp: FlexCAN is waken up from STOP mode.

enumerator kStatus_FLEXCAN_UnHandled: UnHadled Interrupt asserted.

enumerator kStatus_FLEXCAN_RxRemote: Rx Remote Message Received in Mail box.

enumerator kStatus_FLEXCAN_RxFifoUnderflow: Enhanced Rx Message FIFO is underflow.

enumerator kStatus_FLEXCAN_MemoryError: FlexCAN Memory Error.

enum _flexcan_frame_format

FlexCAN frame format.

Values:

enumerator kFLEXCAN_FrameFormatStandard: Standard frame format attribute.

enumerator kFLEXCAN_FrameFormatExtend: Extend frame format attribute.

enum _flexcan_frame_type

FlexCAN frame type.

Values:

enumerator kFLEXCAN_FrameTypeData: Data frame type attribute.

enumerator kFLEXCAN_FrameTypeRemote: Remote frame type attribute.

enum _flexcan_clock_source

FlexCAN clock source.

Deprecated:

Do not use the kFLEXCAN_ClkSrcOs. It has been superceded kFLEXCAN_ClkSrc0

Do not use the kFLEXCAN_ClkSrcPeri. It has been superceded kFLEXCAN_ClkSrc1

Values:

enumerator kFLEXCAN_ClkSrcOsc: FlexCAN Protocol Engine clock from Oscillator.

enumerator kFLEXCAN_ClkSrcPeri: FlexCAN Protocol Engine clock from Peripheral Clock.

enumerator kFLEXCAN_ClkSrc0: FlexCAN Protocol Engine clock selected by user as SRC == 0.

enumerator kFLEXCAN_ClkSrc1: FlexCAN Protocol Engine clock selected by user as SRC == 1.

enum _flexcan_wake_up_source

FlexCAN wake up source.

Values:

enumerator kFLEXCAN_WakeupSrcUnfiltered: FlexCAN uses unfiltered Rx input to detect edge.

enumerator kFLEXCAN_WakeupSrcFiltered: FlexCAN uses filtered Rx input to detect edge.

enum _flexcan_endianness

FlexCAN payload endianness.

Values:

enumerator kFLEXCAN_bigEndian: Transmit frame with MSB first, receive frame with big-endian format.

enumerator kFLEXCAN_littleEndian: Transmit frame with LSB first, receive frame with little-endian format.

enum _flexcan_MB_timestamp_base

FlexCAN timebase used for capturing 16-bit TIME_STAMP field of message buffer.

Values:

enumerator kFLEXCAN_CANTimer: FlexCAN free-running timer.

enumerator kFLEXCAN_Lower16bitsHRTimer: Lower 16 bits of high-resolution on-chip timer.

enumerator kFLEXCAN_Upper16bitsHRTimer: Upper 16 bits of high-resolution on-chip timer.

enum _flexcan_capture_point

FlexCAN capture point of 32-bit high resolution timebase during a CAN frame.

Values:

enumerator kFLEXCAN_CANFrameID2ndBit: Second bit of identifier field of any frame is on the CAN bus. HR_TIME_STAMPn register will not capture 32-bit counter value.

enumerator kFLEXCAN_CANFrameEnd: End of the CAN frame.

enumerator kFLEXCAN_CANFrameStart: Start of the CAN frame.

enumerator kFLEXCAN_CANFDFrameRes: Start of frame for classical CAN frames; res bit for CAN FD frames.

enum _flexcan_rx_fifo_filter_type

FlexCAN Rx Fifo Filter type.

Values:

enumerator kFLEXCAN_RxFifoFilterTypeA: One full ID (standard and extended) per ID Filter element.

enumerator kFLEXCAN_RxFifoFilterTypeB: Two full standard IDs or two partial 14-bit ID slices per ID Filter Table element.

enumerator kFLEXCAN_RxFifoFilterTypeC: Four partial 8-bit Standard or extended ID slices per ID Filter Table element.

enumerator kFLEXCAN_RxFifoFilterTypeD: All frames rejected.

enum _flexcan_mb_size

FlexCAN Message Buffer Payload size.

Values:

enumerator kFLEXCAN_8BperMB: Selects 8 bytes per Message Buffer.

enumerator kFLEXCAN_16BperMB: Selects 16 bytes per Message Buffer.

enumerator kFLEXCAN_32BperMB: Selects 32 bytes per Message Buffer.

enumerator kFLEXCAN_64BperMB: Selects 64 bytes per Message Buffer.

enum _flexcan_fd_frame_length

FlexCAN CAN FD frame supporting data length (available DLC values).

For Tx, when the Data size corresponding to DLC value stored in the MB selected for transmission is larger than the MB Payload size, FlexCAN adds the necessary number of bytes with constant 0xCC pattern to complete the expected DLC. For Rx, when the Data size corresponding to DLC value received from the CAN bus is larger than the MB Payload size, the high order bytes that do not fit the Payload size will lose.

Values:

enumerator kFLEXCAN_0BperFrame: Frame contains 0 valid data bytes.

enumerator kFLEXCAN_1BperFrame: Frame contains 1 valid data bytes.

enumerator kFLEXCAN_2BperFrame: Frame contains 2 valid data bytes.

enumerator kFLEXCAN_3BperFrame: Frame contains 3 valid data bytes.

enumerator kFLEXCAN_4BperFrame: Frame contains 4 valid data bytes.

enumerator kFLEXCAN_5BperFrame: Frame contains 5 valid data bytes.

enumerator kFLEXCAN_6BperFrame: Frame contains 6 valid data bytes.

enumerator kFLEXCAN_7BperFrame: Frame contains 7 valid data bytes.

enumerator kFLEXCAN_8BperFrame: Frame contains 8 valid data bytes.

enumerator kFLEXCAN_12BperFrame: Frame contains 12 valid data bytes.

enumerator kFLEXCAN_16BperFrame: Frame contains 16 valid data bytes.

enumerator kFLEXCAN_20BperFrame: Frame contains 20 valid data bytes.

enumerator kFLEXCAN_24BperFrame: Frame contains 24 valid data bytes.

enumerator kFLEXCAN_32BperFrame: Frame contains 32 valid data bytes.

enumerator kFLEXCAN_48BperFrame: Frame contains 48 valid data bytes.

enumerator kFLEXCAN_64BperFrame: Frame contains 64 valid data bytes.

enum _flexcan_efifo_dma_per_read_length

FlexCAN Enhanced Rx Fifo DMA transfer per read length enumerations.

Values:

enumerator kFLEXCAN_1WordPerRead: Transfer 1 32-bit words (CS).

enumerator kFLEXCAN_2WordPerRead: Transfer 2 32-bit words (CS + ID).

enumerator kFLEXCAN_3WordPerRead: Transfer 3 32-bit words (CS + ID + 1~4 bytes data).

enumerator kFLEXCAN_4WordPerRead: Transfer 4 32-bit words (CS + ID + 5~8 bytes data).

enumerator kFLEXCAN_5WordPerRead: Transfer 5 32-bit words (CS + ID + 9~12 bytes data).

enumerator kFLEXCAN_6WordPerRead: Transfer 6 32-bit words (CS + ID + 13~16 bytes data).

enumerator kFLEXCAN_7WordPerRead: Transfer 7 32-bit words (CS + ID + 17~20 bytes data).

enumerator kFLEXCAN_8WordPerRead: Transfer 8 32-bit words (CS + ID + 21~24 bytes data).

enumerator kFLEXCAN_9WordPerRead: Transfer 9 32-bit words (CS + ID + 25~28 bytes data).

enumerator kFLEXCAN_10WordPerRead: Transfer 10 32-bit words (CS + ID + 29~32 bytes data).

enumerator kFLEXCAN_11WordPerRead: Transfer 11 32-bit words (CS + ID + 33~36 bytes data).

enumerator kFLEXCAN_12WordPerRead: Transfer 12 32-bit words (CS + ID + 37~40 bytes data).

enumerator kFLEXCAN_13WordPerRead: Transfer 13 32-bit words (CS + ID + 41~44 bytes data).

enumerator kFLEXCAN_14WordPerRead: Transfer 14 32-bit words (CS + ID + 45~48 bytes data).

enumerator kFLEXCAN_15WordPerRead: Transfer 15 32-bit words (CS + ID + 49~52 bytes data).

enumerator kFLEXCAN_16WordPerRead: Transfer 16 32-bit words (CS + ID + 53~56 bytes data).

enumerator kFLEXCAN_17WordPerRead: Transfer 17 32-bit words (CS + ID + 57~60 bytes data).

enumerator kFLEXCAN_18WordPerRead: Transfer 18 32-bit words (CS + ID + 61~64 bytes data).

enumerator kFLEXCAN_19WordPerRead: Transfer 19 32-bit words (CS + ID + 64 bytes data + ID HIT).

enumerator kFLEXCAN_20WordPerRead: Transfer 20 32-bit words (CS + ID + 64 bytes data + ID HIT + HR timestamp).

enum _flexcan_rx_fifo_priority

FlexCAN Enhanced/Legacy Rx FIFO priority.

The matching process starts from the Rx MB(or Enhanced/Legacy Rx FIFO) with higher priority. If no MB(or Enhanced/Legacy Rx FIFO filter) is satisfied, the matching process goes on with the Enhanced/Legacy Rx FIFO(or Rx MB) with lower priority.

Values:

enumerator kFLEXCAN_RxFifoPrioLow: Matching process start from Rx Message Buffer first.

enumerator kFLEXCAN_RxFifoPrioHigh: Matching process start from Enhanced/Legacy Rx FIFO first.

enum _flexcan_interrupt_enable

FlexCAN interrupt enable enumerations.

This provides constants for the FlexCAN interrupt enable enumerations for use in the FlexCAN functions.

Note

FlexCAN Message Buffers and Legacy Rx FIFO interrupts not included in.

Values:

enumerator kFLEXCAN_BusOffInterruptEnable: Bus Off interrupt, use bit 15.

enumerator kFLEXCAN_ErrorInterruptEnable: CAN Error interrupt, use bit 14.

enumerator kFLEXCAN_TxWarningInterruptEnable: Tx Warning interrupt, use bit 11.

enumerator kFLEXCAN_RxWarningInterruptEnable: Rx Warning interrupt, use bit 10.

enumerator kFLEXCAN_FDErrorInterruptEnable: CAN FD Error interrupt, use bit 31.

enumerator kFLEXCAN_PNMatchWakeUpInterruptEnable: PN Match Wake Up interrupt, use high word bit 17.

enumerator kFLEXCAN_PNTimeoutWakeUpInterruptEnable: PN Timeout Wake Up interrupt, use high word bit 16. Enhanced Rx FIFO Underflow interrupt, use high word bit 31.

enumerator kFLEXCAN_ERxFifoUnderflowInterruptEnable: Enhanced Rx FIFO Overflow interrupt, use high word bit 30.

enumerator kFLEXCAN_ERxFifoOverflowInterruptEnable: Enhanced Rx FIFO Watermark interrupt, use high word bit 29.

enumerator kFLEXCAN_ERxFifoWatermarkInterruptEnable: Enhanced Rx FIFO Data Avilable interrupt, use high word bit 28.

enumerator kFLEXCAN_ERxFifoDataAvlInterruptEnable

enumerator kFLEXCAN_HostAccessNCErrorInterruptEnable: Host Access With Non-Correctable Errors interrupt, use high word bit 0.

enumerator kFLEXCAN_FlexCanAccessNCErrorInterruptEnable: FlexCAN Access With Non-Correctable Errors interrupt, use high word bit 2.

enumerator kFLEXCAN_HostOrFlexCanCErrorInterruptEnable: Host or FlexCAN Access With Correctable Errors interrupt, use high word bit 3.

enum _flexcan_flags

FlexCAN status flags.

This provides constants for the FlexCAN status flags for use in the FlexCAN functions.

Note

The CPU read action clears the bits corresponding to the FlEXCAN_ErrorFlag macro, therefore user need to read status flags and distinguish which error is occur using _flexcan_error_flags enumerations.

Values:

enumerator kFLEXCAN_ErrorOverrunFlag: Error Overrun Status.

enumerator kFLEXCAN_FDErrorIntFlag: CAN FD Error Interrupt Flag.

enumerator kFLEXCAN_BusoffDoneIntFlag: Bus Off process completed Interrupt Flag.

enumerator kFLEXCAN_SynchFlag: CAN Synchronization Status.

enumerator kFLEXCAN_TxWarningIntFlag: Tx Warning Interrupt Flag.

enumerator kFLEXCAN_RxWarningIntFlag: Rx Warning Interrupt Flag.

enumerator kFLEXCAN_IdleFlag: FlexCAN In IDLE Status.

enumerator kFLEXCAN_FaultConfinementFlag: FlexCAN Fault Confinement State.

enumerator kFLEXCAN_TransmittingFlag: FlexCAN In Transmission Status.

enumerator kFLEXCAN_ReceivingFlag: FlexCAN In Reception Status.

enumerator kFLEXCAN_BusOffIntFlag: Bus Off Interrupt Flag.

enumerator kFLEXCAN_ErrorIntFlag: CAN Error Interrupt Flag.

enumerator kFLEXCAN_ErrorFlag

enumerator kFLEXCAN_PNMatchIntFlag: PN Matching Event Interrupt Flag.

enumerator kFLEXCAN_PNTimeoutIntFlag: PN Timeout Event Interrupt Flag.

enumerator kFLEXCAN_ERxFifoUnderflowIntFlag: Enhanced Rx FIFO underflow Interrupt Flag.

enumerator kFLEXCAN_ERxFifoOverflowIntFlag: Enhanced Rx FIFO overflow Interrupt Flag.

enumerator kFLEXCAN_ERxFifoWatermarkIntFlag: Enhanced Rx FIFO watermark Interrupt Flag.

enumerator kFLEXCAN_ERxFifoDataAvlIntFlag: Enhanced Rx FIFO data available Interrupt Flag.

enumerator kFLEXCAN_ERxFifoEmptyFlag: Enhanced Rx FIFO empty status.

enumerator kFLEXCAN_ERxFifoFullFlag: Enhanced Rx FIFO full status.

enumerator kFLEXCAN_HostAccessNonCorrectableErrorIntFlag: Host Access With Non-Correctable Error Interrupt Flag.

enumerator kFLEXCAN_FlexCanAccessNonCorrectableErrorIntFlag: FlexCAN Access With Non-Correctable Error Interrupt Flag.

enumerator kFLEXCAN_CorrectableErrorIntFlag: Correctable Error Interrupt Flag.

enumerator kFLEXCAN_HostAccessNonCorrectableErrorOverrunFlag: Host Access With Non-Correctable Error Interrupt Overrun Flag.

enumerator kFLEXCAN_FlexCanAccessNonCorrectableErrorOverrunFlag: FlexCAN Access With Non-Correctable Error Interrupt Overrun Flag.

enumerator kFLEXCAN_CorrectableErrorOverrunFlag: Correctable Error Interrupt Overrun Flag.

enumerator kFLEXCAN_AllMemoryErrorIntFlag: All Memory Error Interrupt Flags.

enumerator kFLEXCAN_AllMemoryErrorFlag: All Memory Error Flags.

enum _flexcan_error_flags

FlexCAN error status flags.

The FlexCAN Error Status enumerations is used to report current error of the FlexCAN bus. This enumerations should be used with KFLEXCAN_ErrorFlag in _flexcan_flags enumerations to ditermine which error is generated.

Values:

enumerator kFLEXCAN_FDStuffingError: Stuffing Error.

enumerator kFLEXCAN_FDFormError: Form Error.

enumerator kFLEXCAN_FDCrcError: Cyclic Redundancy Check Error.

enumerator kFLEXCAN_FDBit0Error: Unable to send dominant bit.

enumerator kFLEXCAN_FDBit1Error: Unable to send recessive bit.

enumerator kFLEXCAN_TxErrorWarningFlag: Tx Error Warning Status.

enumerator kFLEXCAN_RxErrorWarningFlag: Rx Error Warning Status.

enumerator kFLEXCAN_StuffingError: Stuffing Error.

enumerator kFLEXCAN_FormError: Form Error.

enumerator kFLEXCAN_CrcError: Cyclic Redundancy Check Error.

enumerator kFLEXCAN_AckError: Received no ACK on transmission.

enumerator kFLEXCAN_Bit0Error: Unable to send dominant bit.

enumerator kFLEXCAN_Bit1Error: Unable to send recessive bit.

FlexCAN Legacy Rx FIFO status flags.

The FlexCAN Legacy Rx FIFO Status enumerations are used to determine the status of the Rx FIFO. Because Rx FIFO occupy the MB0 ~ MB7 (Rx Fifo filter also occupies more Message Buffer space), Rx FIFO status flags are mapped to the corresponding Message Buffer status flags.

Values:

enumerator kFLEXCAN_RxFifoOverflowFlag: Rx FIFO overflow flag.

enumerator kFLEXCAN_RxFifoWarningFlag: Rx FIFO almost full flag.

enumerator kFLEXCAN_RxFifoFrameAvlFlag: Frames available in Rx FIFO flag.

enum _flexcan_memory_error_type

FlexCAN Memory Error Type.

Values:

enumerator kFLEXCAN_CorrectableError: The memory error is correctable which means on bit error.

enumerator kFLEXCAN_NonCorrectableError: The memory error is non-correctable which means two bit errors.

enum _flexcan_memory_access_type

FlexCAN Memory Access Type.

Values:

enumerator kFLEXCAN_MoveOutFlexCanAccess: The memory error was detected during move-out FlexCAN access.

enumerator kFLEXCAN_MoveInAccess: The memory error was detected during move-in FlexCAN access.

enumerator kFLEXCAN_TxArbitrationAccess: The memory error was detected during Tx Arbitration FlexCAN access.

enumerator kFLEXCAN_RxMatchingAccess: The memory error was detected during Rx Matching FlexCAN access.

enumerator kFLEXCAN_MoveOutHostAccess: The memory error was detected during Rx Matching Host (CPU) access.

enum _flexcan_byte_error_syndrome

FlexCAN Memory Error Byte Syndrome.

Values:

enumerator kFLEXCAN_NoError: No bit error in this byte.

enumerator kFLEXCAN_ParityBits0Error: Parity bit 0 error in this byte.

enumerator kFLEXCAN_ParityBits1Error: Parity bit 1 error in this byte.

enumerator kFLEXCAN_ParityBits2Error: Parity bit 2 error in this byte.

enumerator kFLEXCAN_ParityBits3Error: Parity bit 3 error in this byte.

enumerator kFLEXCAN_ParityBits4Error: Parity bit 4 error in this byte.

enumerator kFLEXCAN_DataBits0Error: Data bit 0 error in this byte.

enumerator kFLEXCAN_DataBits1Error: Data bit 1 error in this byte.

enumerator kFLEXCAN_DataBits2Error: Data bit 2 error in this byte.

enumerator kFLEXCAN_DataBits3Error: Data bit 3 error in this byte.

enumerator kFLEXCAN_DataBits4Error: Data bit 4 error in this byte.

enumerator kFLEXCAN_DataBits5Error: Data bit 5 error in this byte.

enumerator kFLEXCAN_DataBits6Error: Data bit 6 error in this byte.

enumerator kFLEXCAN_DataBits7Error: Data bit 7 error in this byte.

enumerator kFLEXCAN_AllZeroError: All-zeros non-correctable error in this byte.

enumerator kFLEXCAN_AllOneError: All-ones non-correctable error in this byte.

enumerator kFLEXCAN_NonCorrectableErrors: Non-correctable error in this byte.

enum _flexcan_pn_match_source

FlexCAN Pretended Networking match source selection.

Values:

enumerator kFLEXCAN_PNMatSrcID: Message match with ID filtering.

enumerator kFLEXCAN_PNMatSrcIDAndData: Message match with ID filtering and payload filtering.

enum _flexcan_pn_match_mode

FlexCAN Pretended Networking mode match type.

Values:

enumerator kFLEXCAN_PNMatModeEqual: Match upon ID/Payload contents against an exact target value.

enumerator kFLEXCAN_PNMatModeGreater: Match upon an ID/Payload value greater than or equal to a specified target value.

enumerator kFLEXCAN_PNMatModeSmaller: Match upon an ID/Payload value smaller than or equal to a specified target value.

enumerator kFLEXCAN_PNMatModeRange: Match upon an ID/Payload value inside a range, greater than or equal to a specified lower limit, and smaller than or equal to a specified upper limit

typedef enum _flexcan_frame_format flexcan_frame_format_t: FlexCAN frame format.

typedef enum _flexcan_frame_type flexcan_frame_type_t: FlexCAN frame type.

typedef enum _flexcan_clock_source flexcan_clock_source_t

FlexCAN clock source.

Deprecated:

Do not use the kFLEXCAN_ClkSrcOs. It has been superceded kFLEXCAN_ClkSrc0

Do not use the kFLEXCAN_ClkSrcPeri. It has been superceded kFLEXCAN_ClkSrc1

typedef enum _flexcan_wake_up_source flexcan_wake_up_source_t: FlexCAN wake up source.

typedef enum _flexcan_endianness flexcan_endianness_t: FlexCAN payload endianness.

typedef enum _flexcan_MB_timestamp_base flexcan_MB_timestamp_base_t: FlexCAN timebase used for capturing 16-bit TIME_STAMP field of message buffer.

typedef enum _flexcan_capture_point flexcan_capture_point_t: FlexCAN capture point of 32-bit high resolution timebase during a CAN frame.

typedef enum _flexcan_rx_fifo_filter_type flexcan_rx_fifo_filter_type_t: FlexCAN Rx Fifo Filter type.

typedef enum _flexcan_mb_size flexcan_mb_size_t: FlexCAN Message Buffer Payload size.

typedef enum _flexcan_efifo_dma_per_read_length flexcan_efifo_dma_per_read_length_t: FlexCAN Enhanced Rx Fifo DMA transfer per read length enumerations.

typedef enum _flexcan_rx_fifo_priority flexcan_rx_fifo_priority_t

FlexCAN Enhanced/Legacy Rx FIFO priority.

typedef enum _flexcan_memory_error_type flexcan_memory_error_type_t: FlexCAN Memory Error Type.

typedef enum _flexcan_memory_access_type flexcan_memory_access_type_t: FlexCAN Memory Access Type.

typedef enum _flexcan_byte_error_syndrome flexcan_byte_error_syndrome_t: FlexCAN Memory Error Byte Syndrome.

typedef struct _flexcan_memory_error_report_status flexcan_memory_error_report_status_t

FlexCAN memory error register status structure.

This structure contains the memory access properties that caused a memory error access. It is used as the parameter of FLEXCAN_GetMemoryErrorReportStatus() function. And user can use FLEXCAN_GetMemoryErrorReportStatus to get the status of the last memory error access.

typedef struct _flexcan_frame flexcan_frame_t: FlexCAN message frame structure.

typedef struct _flexcan_fd_frame flexcan_fd_frame_t

CAN FD message frame structure.

The CAN FD message supporting up to sixty four bytes can be used for a data frame, depending on the length selected for the message buffers. The length should be a enumeration member, see _flexcan_fd_frame_length.

typedef struct _flexcan_timing_config flexcan_timing_config_t: FlexCAN protocol timing characteristic configuration structure.

typedef struct _flexcan_config flexcan_config_t

FlexCAN module configuration structure.

Deprecated:

Do not use the baudRate. It has been superceded bitRate

Do not use the baudRateFD. It has been superceded bitRateFD

typedef struct _flexcan_rx_mb_config flexcan_rx_mb_config_t

FlexCAN Receive Message Buffer configuration structure.

This structure is used as the parameter of FLEXCAN_SetRxMbConfig() function. The FLEXCAN_SetRxMbConfig() function is used to configure FlexCAN Receive Message Buffer. The function abort previous receiving process, clean the Message Buffer and activate the Rx Message Buffer using given Message Buffer setting.

typedef enum _flexcan_pn_match_source flexcan_pn_match_source_t: FlexCAN Pretended Networking match source selection.

typedef enum _flexcan_pn_match_mode flexcan_pn_match_mode_t: FlexCAN Pretended Networking mode match type.

typedef struct _flexcan_pn_config flexcan_pn_config_t

FlexCAN Pretended Networking configuration structure.

This structure is used as the parameter of FLEXCAN_SetPNConfig() function. The FLEXCAN_SetPNConfig() function is used to configure FlexCAN Networking work mode.

typedef struct _flexcan_rx_fifo_config flexcan_rx_fifo_config_t: FlexCAN Legacy Rx FIFO configuration structure.

typedef struct _flexcan_enhanced_rx_fifo_std_id_filter flexcan_enhanced_rx_fifo_std_id_filter_t: FlexCAN Enhanced Rx FIFO Standard ID filter element structure.

typedef struct _flexcan_enhanced_rx_fifo_ext_id_filter flexcan_enhanced_rx_fifo_ext_id_filter_t: FlexCAN Enhanced Rx FIFO Extended ID filter element structure.

typedef struct _flexcan_enhanced_rx_fifo_config flexcan_enhanced_rx_fifo_config_t: FlexCAN Enhanced Rx FIFO configuration structure.

typedef struct _flexcan_mb_transfer flexcan_mb_transfer_t: FlexCAN Message Buffer transfer.

typedef struct _flexcan_fifo_transfer flexcan_fifo_transfer_t: FlexCAN Rx FIFO transfer.

typedef struct _flexcan_handle flexcan_handle_t: FlexCAN handle structure definition.

typedef void (*flexcan_transfer_callback_t)(CAN_Type *base, flexcan_handle_t *handle, status_t status, uint64_t result, void *userData)

FLEXCAN_WAIT_TIMEOUT

FLEXCAN_POLLING_TIMEOUT: Max loops to wait for polling transfer.

FLEXCAN_MODULE_TIMEOUT: Max loops to wait for FlexCAN register access complete.

FLEXCAN_MB_BUSY_TIMEOUT: Max loops to wait for FlexCAN RX Message Buffer busy.

DLC_LENGTH_DECODE(dlc): FlexCAN frame length helper macro.

FLEXCAN_ID_STD(id)

FlexCAN Frame ID helper macro.

Standard Frame ID helper macro.

FLEXCAN_ID_EXT(id): Extend Frame ID helper macro.

FLEXCAN_RX_MB_STD_MASK(id, rtr, ide)

FlexCAN Rx Message Buffer Mask helper macro.

Standard Rx Message Buffer Mask helper macro.

FLEXCAN_RX_MB_EXT_MASK(id, rtr, ide): Extend Rx Message Buffer Mask helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide)

FlexCAN Legacy Rx FIFO Mask helper macro.

Standard Rx FIFO Mask helper macro Type A helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH(id, rtr, ide): Standard Rx FIFO Mask helper macro Type B upper part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW(id, rtr, ide): Standard Rx FIFO Mask helper macro Type B lower part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH(id): Standard Rx FIFO Mask helper macro Type C upper part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH(id): Standard Rx FIFO Mask helper macro Type C mid-upper part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW(id): Standard Rx FIFO Mask helper macro Type C mid-lower part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id): Standard Rx FIFO Mask helper macro Type C lower part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide): Extend Rx FIFO Mask helper macro Type A helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH(id, rtr, ide): Extend Rx FIFO Mask helper macro Type B upper part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW(id, rtr, ide): Extend Rx FIFO Mask helper macro Type B lower part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(id): Extend Rx FIFO Mask helper macro Type C upper part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH(id): Extend Rx FIFO Mask helper macro Type C mid-upper part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_LOW(id): Extend Rx FIFO Mask helper macro Type C mid-lower part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(id): Extend Rx FIFO Mask helper macro Type C lower part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A(id, rtr, ide)

FlexCAN Rx FIFO Filter helper macro.

Standard Rx FIFO Filter helper macro Type A helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_HIGH(id, rtr, ide): Standard Rx FIFO Filter helper macro Type B upper part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_LOW(id, rtr, ide): Standard Rx FIFO Filter helper macro Type B lower part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_HIGH(id): Standard Rx FIFO Filter helper macro Type C upper part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_HIGH(id): Standard Rx FIFO Filter helper macro Type C mid-upper part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_LOW(id): Standard Rx FIFO Filter helper macro Type C mid-lower part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_LOW(id): Standard Rx FIFO Filter helper macro Type C lower part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_A(id, rtr, ide): Extend Rx FIFO Filter helper macro Type A helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_HIGH(id, rtr, ide): Extend Rx FIFO Filter helper macro Type B upper part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_LOW(id, rtr, ide): Extend Rx FIFO Filter helper macro Type B lower part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_HIGH(id): Extend Rx FIFO Filter helper macro Type C upper part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_HIGH(id): Extend Rx FIFO Filter helper macro Type C mid-upper part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_LOW(id): Extend Rx FIFO Filter helper macro Type C mid-lower part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_LOW(id): Extend Rx FIFO Filter helper macro Type C lower part helper macro.

ENHANCED_RX_FIFO_FSCH(x): FlexCAN Enhanced Rx FIFO Filter and Mask helper macro.

RTR_STD_HIGH(x)

RTR_STD_LOW(x)

RTR_EXT(x)

ID_STD_LOW(id)

ID_STD_HIGH(id)

ID_EXT(id)

FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(id, rtr, id_mask, rtr_mask): Standard ID filter element with filter + mask scheme.

FLEXCAN_ENHANCED_RX_FIFO_STD_FILTER_WITH_RANGE(id_upper, rtr, id_lower, rtr_mask): Standard ID filter element with filter range.

FLEXCAN_ENHANCED_RX_FIFO_STD_TWO_FILTERS(id1, rtr1, id2, rtr2): Standard ID filter element with two filters without masks.

FLEXCAN_ENHANCED_RX_FIFO_EXT_MASK_AND_FILTER_LOW(id, rtr): Extended ID filter element with filter + mask scheme low word.

FLEXCAN_ENHANCED_RX_FIFO_EXT_MASK_AND_FILTER_HIGH(id_mask, rtr_mask): Extended ID filter element with filter + mask scheme high word.

FLEXCAN_ENHANCED_RX_FIFO_EXT_FILTER_WITH_RANGE_LOW(id_upper, rtr): Extended ID filter element with range scheme low word.

FLEXCAN_ENHANCED_RX_FIFO_EXT_FILTER_WITH_RANGE_HIGH(id_lower, rtr_mask): Extended ID filter element with range scheme high word.

FLEXCAN_ENHANCED_RX_FIFO_EXT_TWO_FILTERS_LOW(id2, rtr2): Extended ID filter element with two filters without masks low word.

FLEXCAN_ENHANCED_RX_FIFO_EXT_TWO_FILTERS_HIGH(id1, rtr1): Extended ID filter element with two filters without masks high word.

FLEXCAN_PN_STD_MASK(id, rtr)

FlexCAN Pretended Networking ID Mask helper macro.

Standard Rx Message Buffer Mask helper macro.

FLEXCAN_PN_EXT_MASK(id, rtr): Extend Rx Message Buffer Mask helper macro.

FLEXCAN_PN_INT_MASK(x): FlexCAN interrupt/status flag helper macro.

FLEXCAN_PN_INT_UNMASK(x)

FLEXCAN_PN_STATUS_MASK(x)

FLEXCAN_PN_STATUS_UNMASK(x)

FLEXCAN_EFIFO_INT_MASK(x)

FLEXCAN_EFIFO_INT_UNMASK(x)

FLEXCAN_EFIFO_STATUS_MASK(x)

FLEXCAN_EFIFO_STATUS_UNMASK(x)

FLEXCAN_MECR_INT_MASK(x)

FLEXCAN_MECR_INT_UNMASK(x)

FLEXCAN_MECR_STATUS_MASK(x)

FLEXCAN_MECR_STATUS_UNMASK(x)

FLEXCAN_ERROR_AND_STATUS_INT_FLAG

FLEXCAN_PNWAKE_UP_FLAG

FLEXCAN_WAKE_UP_FLAG

FLEXCAN_MEMORY_ERROR_INT_FLAG

FLEXCAN_ENHANCED_RX_FIFO_INT_FLAG: FlexCAN Enhanced Rx FIFO base address helper macro.

E_RX_FIFO(base)

FLEXCAN_CALLBACK(x)

FlexCAN transfer callback function.

The FlexCAN transfer callback returns a value from the underlying layer. If the status equals to kStatus_FLEXCAN_ErrorStatus, the result parameter is the Content of FlexCAN status register which can be used to get the working status(or error status) of FlexCAN module. If the status equals to other FlexCAN Message Buffer transfer status, the result is the index of Message Buffer that generate transfer event. If the status equals to other FlexCAN Message Buffer transfer status, the result is meaningless and should be Ignored.

struct _flexcan_memory_error_report_status

#include <fsl_flexcan.h>

FlexCAN memory error register status structure.

Public Members

flexcan_memory_error_type_t errorType: The type of memory error that giving rise to the report.

flexcan_memory_access_type_t accessType: The type of memory access that giving rise to the memory error.

uint16_t accessAddress: The address where memory error detected.

uint32_t errorData: The raw data word read from memory with error.

struct _flexcan_frame: #include <fsl_flexcan.h>

FlexCAN message frame structure.

struct _flexcan_fd_frame

#include <fsl_flexcan.h>

CAN FD message frame structure.

Public Members

uint32_t idhit: Note

ID HIT offset is changed dynamically according to data length code (DLC), when DLC is 15, they will be located below. Using FLEXCAN_FixEnhancedRxFifoFrameIdHit API is recommended to ensure this idhit value is correct. CAN Enhanced Rx FIFO filter hit id (This value is only used in Enhanced Rx FIFO receive mode).

uint32_t hrtimestamp: Note

HR timestamp offset is changed dynamically according to data length code (DLC). External 32-bit on-chip timer high-resolution timestamp.

struct _flexcan_timing_config

#include <fsl_flexcan.h>

FlexCAN protocol timing characteristic configuration structure.

Public Members

uint32_t preDivider: Classic CAN or CAN FD nominal phase bit rate prescaler.

uint32_t rJumpwidth: Classic CAN or CAN FD nominal phase Re-sync Jump Width.

uint32_t phaseSeg1: Classic CAN or CAN FD nominal phase Segment 1.

uint32_t phaseSeg2: Classic CAN or CAN FD nominal phase Segment 2.

uint32_t propSeg: Classic CAN or CAN FD nominal phase Propagation Segment.

uint32_t fpreDivider: CAN FD data phase bit rate prescaler.

uint32_t frJumpwidth: CAN FD data phase Re-sync Jump Width.

uint32_t fphaseSeg1: CAN FD data phase Phase Segment 1.

uint32_t fphaseSeg2: CAN FD data phase Phase Segment 2.

uint32_t fpropSeg: CAN FD data phase Propagation Segment.

struct _flexcan_config

#include <fsl_flexcan.h>

FlexCAN module configuration structure.

Deprecated:

Do not use the baudRate. It has been superceded bitRate

Do not use the baudRateFD. It has been superceded bitRateFD

Public Members

flexcan_clock_source_t clkSrc: Clock source for FlexCAN Protocol Engine.

flexcan_wake_up_source_t wakeupSrc: Wake up source selection.

uint8_t maxMbNum: The maximum number of Message Buffers used by user.

bool enableLoopBack: Enable or Disable Loop Back Self Test Mode.

bool enableTimerSync: Enable or Disable Timer Synchronization.

bool enableIndividMask: Enable or Disable Rx Individual Mask and Queue feature.

bool disableSelfReception: Enable or Disable Self Reflection.

bool enableListenOnlyMode: Enable or Disable Listen Only Mode.

bool enableDoze: Enable or Disable Doze Mode.

bool enablePretendedeNetworking: Enable or Disable the Pretended Networking mode.

bool enableMemoryErrorControl: Enable or Disable the memory errors detection and correction mechanism.

bool enableNonCorrectableErrorEnterFreeze: Enable or Disable Non-Correctable Errors In FlexCAN Access Put Device In Freeze Mode.

bool enableTransceiverDelayMeasure: Enable or Disable the transceiver delay measurement, when it is enabled, then the secondary sample point position is determined by the sum of the transceiver delay measurement plus the enhanced TDC offset.

bool enableRemoteRequestFrameStored: true: Store Remote Request Frame in the same fashion of data frame. false: Generate an automatic Remote Response Frame.

flexcan_endianness_t payloadEndianness: Selects the byte order for the payload of transmit and receive frames, see flexcan_endianness_t.

bool enableExternalTimeTick: true: External time tick clocks the free-running timer. false: FlexCAN bit clock clocks the free-running timer.

flexcan_MB_timestamp_base_t captureTimeBase: Timebase of message buffer 16-bit TIME_STAMP field.

flexcan_capture_point_t capturePoint: Point in time when 32-bit timebase is captured during CAN frame.

struct _flexcan_rx_mb_config

#include <fsl_flexcan.h>

FlexCAN Receive Message Buffer configuration structure.

Public Members

uint32_t id: CAN Message Buffer Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro.

flexcan_frame_format_t format: CAN Frame Identifier format(Standard of Extend).

flexcan_frame_type_t type: CAN Frame Type(Data or Remote for classical CAN only).

struct _flexcan_pn_config

#include <fsl_flexcan.h>

FlexCAN Pretended Networking configuration structure.

This structure is used as the parameter of FLEXCAN_SetPNConfig() function. The FLEXCAN_SetPNConfig() function is used to configure FlexCAN Networking work mode.

Public Members

bool enableTimeout: Enable or Disable timeout event trigger wakeup.

uint16_t timeoutValue: The timeout value that generates a wakeup event, the counter timer is incremented based on 64 times the CAN Bit Time unit.

bool enableMatch: Enable or Disable match event trigger wakeup.

flexcan_pn_match_source_t matchSrc: Selects the match source (ID and/or data match) to trigger wakeup.

uint8_t matchNum: The number of times a given message must match the predefined ID and/or data before generating a wakeup event, range in 0x1 ~ 0xFF.

flexcan_pn_match_mode_t idMatchMode: The ID match type.

flexcan_pn_match_mode_t dataMatchMode: The data match type.

uint32_t idLower: The ID target values 1 which used either for ID match “equal to”, “smaller than”, “greater than” comparisons, or as the lower limit value in ID match “range detection”.

uint32_t idUpper

The ID target values 2 which used only as the upper limit value in ID match “range

detection” or used to store the ID mask in “equal to”.

uint8_t lengthLower

The lower limit for length of data bytes which used only in data match “range

detection”. Range in 0x0 ~ 0x8.

uint8_t lengthUpper

The upper limit for length of data bytes which used only in data match “range

detection”. Range in 0x0 ~ 0x8.

struct _flexcan_rx_fifo_config

#include <fsl_flexcan.h>

FlexCAN Legacy Rx FIFO configuration structure.

Public Members

uint32_t *idFilterTable: Pointer to the FlexCAN Legacy Rx FIFO identifier filter table.

uint8_t idFilterNum: The FlexCAN Legacy Rx FIFO Filter elements quantity.

flexcan_rx_fifo_filter_type_t idFilterType: The FlexCAN Legacy Rx FIFO Filter type.

flexcan_rx_fifo_priority_t priority: The FlexCAN Legacy Rx FIFO receive priority.

struct _flexcan_enhanced_rx_fifo_std_id_filter

#include <fsl_flexcan.h>

FlexCAN Enhanced Rx FIFO Standard ID filter element structure.

Public Members

uint32_t filterType: FlexCAN internal Free-Running Counter Time Stamp.

uint32_t rtr1: CAN FD frame data length code (DLC), range see _flexcan_fd_frame_length, When the length <= 8, it equal to the data length, otherwise the number of valid frame data is not equal to the length value. user can use DLC_LENGTH_DECODE(length) macro to get the number of valid data bytes.

uint32_t std1: CAN Frame Type(DATA or REMOTE).

uint32_t rtr2: CAN Frame Identifier(STD or EXT format).

uint32_t std2: Substitute Remote request.

struct _flexcan_enhanced_rx_fifo_ext_id_filter

#include <fsl_flexcan.h>

FlexCAN Enhanced Rx FIFO Extended ID filter element structure.

Public Members

uint32_t filterType: FlexCAN internal Free-Running Counter Time Stamp.

uint32_t rtr1: CAN FD frame data length code (DLC), range see _flexcan_fd_frame_length, When the length <= 8, it equal to the data length, otherwise the number of valid frame data is not equal to the length value. user can use DLC_LENGTH_DECODE(length) macro to get the number of valid data bytes.

uint32_t std1: CAN Frame Type(DATA or REMOTE).

uint32_t rtr2: CAN Frame Identifier(STD or EXT format).

uint32_t std2: Substitute Remote request.

struct _flexcan_enhanced_rx_fifo_config

#include <fsl_flexcan.h>

FlexCAN Enhanced Rx FIFO configuration structure.

Public Members

uint32_t *idFilterTable: Pointer to the FlexCAN Enhanced Rx FIFO identifier filter table, each table member occupies 32 bit word, table size should be equal to idFilterNum. There are two types of Enhanced Rx FIFO filter elements that can be stored in table : extended-ID filter element (1 word, occupie 1 table members) and standard-ID filter element (2 words, occupies 2 table members), the extended-ID filter element needs to be placed in front of the table.

uint8_t idFilterPairNum: idFilterPairNum is the Enhanced Rx FIFO identifier filter element pair numbers, each pair of filter elements occupies 2 words and can consist of one extended ID filter element or two standard ID filter elements.

uint8_t extendIdFilterNum: The number of extended ID filter element items in the FlexCAN enhanced Rx FIFO identifier filter table, each extended-ID filter element occupies 2 words, extendIdFilterNum need less than or equal to idFilterPairNum.

uint8_t fifoWatermark: (fifoWatermark + 1) is the minimum number of CAN messages stored in the Enhanced RX FIFO which can trigger FIFO watermark interrupt or a DMA request.

flexcan_efifo_dma_per_read_length_t dmaPerReadLength: Define the length of each read of the Enhanced RX FIFO element by the DAM, see _flexcan_fd_frame_length.

flexcan_rx_fifo_priority_t priority: The FlexCAN Enhanced Rx FIFO receive priority.

struct _flexcan_mb_transfer

#include <fsl_flexcan.h>

FlexCAN Message Buffer transfer.

Public Members

flexcan_frame_t *frame: The buffer of CAN Message to be transfer.

uint8_t mbIdx: The index of Message buffer used to transfer Message.

struct _flexcan_fifo_transfer

#include <fsl_flexcan.h>

FlexCAN Rx FIFO transfer.

Public Members

flexcan_fd_frame_t *framefd: The buffer of CAN Message to be received from Enhanced Rx FIFO.

flexcan_frame_t *frame: The buffer of CAN Message to be received from Legacy Rx FIFO.

size_t frameNum: Depth of CAN Message receive array of Legacy or Enhanced Rx FIFO.

struct _flexcan_handle

#include <fsl_flexcan.h>

FlexCAN handle structure.

Public Members

flexcan_transfer_callback_t callback: Callback function.

void *userData: FlexCAN callback function parameter.

flexcan_frame_t *volatile mbFrameBuf[CAN_WORD1_COUNT]: The buffer for received CAN data from Message Buffers.

flexcan_fd_frame_t *volatile mbFDFrameBuf[CAN_WORD1_COUNT]: The buffer for received CAN FD data from Message Buffers.

flexcan_frame_t *volatile rxFifoFrameBuf: The buffer for received CAN data from Legacy Rx FIFO.

flexcan_fd_frame_t *volatile rxFifoFDFrameBuf: The buffer for received CAN FD data from Enhanced Rx FIFO.

size_t rxFifoFrameNum: The number of CAN messages remaining to be received from Legacy or Enhanced Rx FIFO.

size_t rxFifoTransferTotalNum: Total CAN Message number need to be received from Legacy or Enhanced Rx FIFO.

volatile uint8_t mbState[CAN_WORD1_COUNT]: Message Buffer transfer state.

volatile uint8_t rxFifoState: Rx FIFO transfer state.

volatile uint32_t timestamp[CAN_WORD1_COUNT]: Mailbox transfer timestamp.

struct byteStatus

Public Members

bool byteIsRead: The byte n (0~3) was read or not. The type of error and which bit in byte (n) is affected by the error.

struct __unnamed13__

Public Members

uint32_t timestamp: FlexCAN internal Free-Running Counter Time Stamp.

uint32_t length: CAN frame data length in bytes (Range: 0~8).

uint32_t type: CAN Frame Type(DATA or REMOTE).

uint32_t format: CAN Frame Identifier(STD or EXT format).

uint32_t __pad0__: Reserved.

uint32_t idhit: CAN Rx FIFO filter hit id(This value is only used in Rx FIFO receive mode).

struct __unnamed15__

Public Members

uint32_t id: CAN Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro.

uint32_t __pad0__: Reserved.

union __unnamed17__

Public Members

struct _flexcan_frame

struct _flexcan_frame

struct __unnamed19__

Public Members

uint32_t dataWord0: CAN Frame payload word0.

uint32_t dataWord1: CAN Frame payload word1.

struct __unnamed21__

Public Members

uint8_t dataByte3: CAN Frame payload byte3.

uint8_t dataByte2: CAN Frame payload byte2.

uint8_t dataByte1: CAN Frame payload byte1.

uint8_t dataByte0: CAN Frame payload byte0.

uint8_t dataByte7: CAN Frame payload byte7.

uint8_t dataByte6: CAN Frame payload byte6.

uint8_t dataByte5: CAN Frame payload byte5.

uint8_t dataByte4: CAN Frame payload byte4.

struct __unnamed23__

Public Members

uint32_t timestamp: FlexCAN internal Free-Running Counter Time Stamp.

uint32_t length: CAN FD frame data length code (DLC), range see _flexcan_fd_frame_length, When the length <= 8, it equal to the data length, otherwise the number of valid frame data is not equal to the length value. user can use DLC_LENGTH_DECODE(length) macro to get the number of valid data bytes.

uint32_t type: CAN Frame Type(DATA only).

uint32_t format: CAN Frame Identifier(STD or EXT format).

uint32_t srr: Substitute Remote request.

uint32_t esi: Error State Indicator.

uint32_t brs: Bit Rate Switch.

uint32_t edl: Extended Data Length.

struct __unnamed25__

Public Members

uint32_t id: CAN Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro.

uint32_t __pad0__: Reserved.

union __unnamed27__

Public Members

struct _flexcan_fd_frame

struct _flexcan_fd_frame

struct __unnamed29__

Public Members

uint32_t dataWord[16]: CAN FD Frame payload, 16 double word maximum.

struct __unnamed31__

Public Members

uint8_t dataByte3: CAN Frame payload byte3.

uint8_t dataByte2: CAN Frame payload byte2.

uint8_t dataByte1: CAN Frame payload byte1.

uint8_t dataByte0: CAN Frame payload byte0.

uint8_t dataByte7: CAN Frame payload byte7.

uint8_t dataByte6: CAN Frame payload byte6.

uint8_t dataByte5: CAN Frame payload byte5.

uint8_t dataByte4: CAN Frame payload byte4.

union __unnamed33__

Public Members

struct _flexcan_config

struct _flexcan_config

struct __unnamed35__

Public Members

uint32_t baudRate: FlexCAN bit rate in bps, for classical CAN or CANFD nominal phase.

uint32_t baudRateFD: FlexCAN FD bit rate in bps, for CANFD data phase.

struct __unnamed37__

Public Members

uint32_t bitRate: FlexCAN bit rate in bps, for classical CAN or CANFD nominal phase.

uint32_t bitRateFD: FlexCAN FD bit rate in bps, for CANFD data phase.

union __unnamed39__

Public Members

struct _flexcan_pn_config

< The data target values 1 which used either for data match “equal to”, “smaller than”, “greater than” comparisons, or as the lower limit value in data match “range

detection”.

struct _flexcan_pn_config

struct __unnamed43__

< The data target values 1 which used either for data match “equal to”, “smaller than”, “greater than” comparisons, or as the lower limit value in data match “range

detection”.

Public Members

uint32_t lowerWord0: CAN Frame payload word0.

uint32_t lowerWord1: CAN Frame payload word1.

struct __unnamed45__

Public Members

uint8_t lowerByte3: CAN Frame payload byte3.

uint8_t lowerByte2: CAN Frame payload byte2.

uint8_t lowerByte1: CAN Frame payload byte1.

uint8_t lowerByte0: CAN Frame payload byte0.

uint8_t lowerByte7: CAN Frame payload byte7.

uint8_t lowerByte6: CAN Frame payload byte6.

uint8_t lowerByte5: CAN Frame payload byte5.

uint8_t lowerByte4: CAN Frame payload byte4.

union __unnamed41__

Public Members

struct _flexcan_pn_config

< The data target values 2 which used only as the upper limit value in data match “range

detection” or used to store the data mask in “equal to”.

struct _flexcan_pn_config

struct __unnamed47__

< The data target values 2 which used only as the upper limit value in data match “range

detection” or used to store the data mask in “equal to”.

Public Members

uint32_t upperWord0: CAN Frame payload word0.

uint32_t upperWord1: CAN Frame payload word1.

struct __unnamed49__

Public Members

uint8_t upperByte3: CAN Frame payload byte3.

uint8_t upperByte2: CAN Frame payload byte2.

uint8_t upperByte1: CAN Frame payload byte1.

uint8_t upperByte0: CAN Frame payload byte0.

uint8_t upperByte7: CAN Frame payload byte7.

uint8_t upperByte6: CAN Frame payload byte6.

uint8_t upperByte5: CAN Frame payload byte5.

uint8_t upperByte4: CAN Frame payload byte4.

FlexCAN eDMA Driver#

void FLEXCAN_TransferCreateHandleEDMA(CAN_Type *base, flexcan_edma_handle_t *handle, flexcan_edma_transfer_callback_t callback, void *userData, edma_handle_t *rxFifoEdmaHandle)

Initializes the FlexCAN handle, which is used in transactional functions.

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.
callback – The callback function.
userData – The parameter of the callback function.
rxFifoEdmaHandle – User-requested DMA handle for Rx FIFO DMA transfer.

void FLEXCAN_PrepareTransfConfiguration(CAN_Type *base, flexcan_fifo_transfer_t *pFifoXfer, edma_transfer_config_t *pEdmaConfig)

Prepares the eDMA transfer configuration for FLEXCAN Legacy RX FIFO.

This function prepares the eDMA transfer configuration structure according to FLEXCAN Legacy RX FIFO.

Parameters:

base – FlexCAN peripheral base address.
pFifoXfer – FlexCAN Rx FIFO EDMA transfer structure, see flexcan_fifo_transfer_t.
pEdmaConfig – The user configuration structure of type edma_transfer_t.

status_t FLEXCAN_StartTransferDatafromRxFIFO(CAN_Type *base, flexcan_edma_handle_t *handle, edma_transfer_config_t *pEdmaConfig)

Start Transfer Data from the FLEXCAN Legacy Rx FIFO using eDMA.

This function to Update edma transfer confiugration and Start eDMA transfer

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.
pEdmaConfig – The user configuration structure of type edma_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_FLEXCAN_RxFifoBusy – Previous transfer ongoing.

status_t FLEXCAN_TransferReceiveFifoEDMA(CAN_Type *base, flexcan_edma_handle_t *handle, flexcan_fifo_transfer_t *pFifoXfer)

Receives the CAN Message from the Legacy Rx FIFO using eDMA.

This function receives the CAN Message using eDMA. This is a non-blocking function, which returns right away. After the CAN Message is received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.
pFifoXfer – FlexCAN Rx FIFO EDMA transfer structure, see flexcan_fifo_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_FLEXCAN_RxFifoBusy – Previous transfer ongoing.

status_t FLEXCAN_TransferGetReceiveFifoCountEMDA(CAN_Type *base, flexcan_edma_handle_t *handle, size_t *count)

Gets the Legacy Rx Fifo transfer status during a interrupt non-blocking receive.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
count – Number of CAN messages receive so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXCAN_TransferAbortReceiveFifoEDMA(CAN_Type *base, flexcan_edma_handle_t *handle)

Aborts the receive Legacy/Enhanced Rx FIFO process which used eDMA.

This function aborts the receive Legacy/Enhanced Rx FIFO process which used eDMA.

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.

status_t FLEXCAN_TransferReceiveEnhancedFifoEDMA(CAN_Type *base, flexcan_edma_handle_t *handle, flexcan_fifo_transfer_t *pFifoXfer)

Receives the CAN FD Message from the Enhanced Rx FIFO using eDMA.

This function receives the CAN FD Message using eDMA. This is a non-blocking function, which returns right away. After the CAN Message is received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.
pFifoXfer – FlexCAN Rx FIFO EDMA transfer structure, see flexcan_fifo_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_FLEXCAN_RxFifoBusy – Previous transfer ongoing.

static inline status_t FLEXCAN_TransferGetReceiveEnhancedFifoCountEMDA(CAN_Type *base, flexcan_edma_handle_t *handle, size_t *count)

Gets the Enhanced Rx Fifo transfer status during a interrupt non-blocking receive.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
count – Number of CAN messages receive so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

FSL_FLEXCAN_EDMA_DRIVER_VERSION: FlexCAN EDMA driver version.

typedef struct _flexcan_edma_handle flexcan_edma_handle_t

typedef void (*flexcan_edma_transfer_callback_t)(CAN_Type *base, flexcan_edma_handle_t *handle, status_t status, void *userData): FlexCAN transfer callback function.

struct _flexcan_edma_handle

#include <fsl_flexcan_edma.h>

FlexCAN eDMA handle.

Public Members

flexcan_edma_transfer_callback_t callback: Callback function.

void *userData: FlexCAN callback function parameter.

edma_handle_t *rxFifoEdmaHandle: The EDMA handler for Rx FIFO.

volatile uint8_t rxFifoState: Rx FIFO transfer state.

size_t frameNum: The number of messages that need to be received.

flexcan_fd_frame_t *framefd: Point to the buffer of CAN Message to be received from Enhanced Rx FIFO.

GDET#

status_t GDET_Init(GDET_Type *base)

Initialize GDET.

This function initializes GDET block and setting.

Parameters:

base – GDET peripheral base address

Returns:

Status of the init operation

void GDET_Deinit(GDET_Type *base)

Deinitialize GDET.

This function deinitializes GDET secure counter.

Parameters:

base – GDET peripheral base address

status_t GDET_Enable(GDET_Type *base)

Enable GDET.

This function enables GDET and interrupts.

Parameters:

base – GDET peripheral base address

Returns:

Status of the enable operation

status_t GDET_Disable(GDET_Type *base)

Disable GDET.

This function disables GDET and interrupts.

Parameters:

base – GDET peripheral base address

Returns:

Status of the disable operation

status_t GDET_IsolateOn(GDET_Type *base)

Turn on GDET isolation.

This function turns on isolation of GDET peripheral

Parameters:

base – GDET peripheral base address

Returns:

Status of the operation

status_t GDET_IsolateOff(GDET_Type *base)

Turn off GDET isolation.

This function turns off isolation of GDET peripheral

Parameters:

base – GDET peripheral base address

Returns:

Status of the operation

status_t GDET_ReconfigureVoltageMode(GDET_Type *base, gdet_core_voltage_t voltage)

Change expected core voltage.

This function changes core voltage which Glitch detector expect.

Parameters:

base – GDET peripheral base address
voltage – Expected core voltage

Returns:

Status of the GDET reconfiguration operation

FSL_GDET_DRIVER_VERSION

Defines GDET driver version 2.1.3.

Change log:

Version 2.1.3
- Update to KW43 GDET offering
Version 2.1.2
- Update to MCXA577 GDET offering
Version 2.1.1
- Update to RT700 GDET offering
Version 2.1.0
- Update for multiple instances
- Fix bug in isolation off API
- Add enable and disable APIs
2.0.1
- Fix MISRA in GDET_ReconfigureVoltageMode()
Version 2.0.0
- initial version

typedef uint32_t gdet_core_voltage_t

GDET Core Voltage.

These constants are used to define core voltage argument to be used with GDET_ReconfigureVoltageMode(). Different SoC may support various volatages, refer to documentation.

void GDET_DriverIRQHandler(void)

kGDET_0_9v: Voltage (0.9V)

kGDET_1_0v: Voltage (1.0V)

kGDET_1_1v: Voltage (1.1V)

Glitch Detect#

GLIKEY#

Values:

enumerator kStatus_GLIKEY_LockedError: GLIKEY status for locked SFR registers (unexpected) .

enumerator kStatus_GLIKEY_NotLocked: GLIKEY status for unlocked SFR registers.

enumerator kStatus_GLIKEY_Locked: GLIKEY status for locked SFR registers.

enumerator kStatus_GLIKEY_DisabledError: GLIKEY status for disabled error.

FSL_GLIKEY_DRIVER_VERSION

Defines GLIKEY driver version 2.0.1.

Change log:

Version 2.0.1
- Implement INIT state recovery from the LOCKED state after a reset when the previous index was locked.
Version 2.0.0
- Initial version

GLIKEY_CODEWORD_STEP1

GLIKEY_CODEWORD_STEP2

GLIKEY_CODEWORD_STEP3

GLIKEY_CODEWORD_STEP4

GLIKEY_CODEWORD_STEP5

GLIKEY_CODEWORD_STEP6

GLIKEY_CODEWORD_STEP7

GLIKEY_CODEWORD_STEP_EN

GLIKEY_FSM_WR_DIS

GLIKEY_FSM_INIT

GLIKEY_FSM_STEP1

GLIKEY_FSM_STEP2

GLIKEY_FSM_STEP3

GLIKEY_FSM_STEP4

GLIKEY_FSM_LOCKED

GLIKEY_FSM_WR_EN

GLIKEY_FSM_SSR_RESET

uint32_t GLIKEY_GetStatus(GLIKEY_Type *base)

Retreives the current status of Glikey.

Parameters:

base – [in] The base address of the Glikey instance

Returns:

Glikey status information

status_t GLIKEY_IsLocked(GLIKEY_Type *base)

Get if Glikey is locked.

This operation returns the locking status of Glikey.

Return values:

kStatus_GLIKEY_Locked – if locked
kStatus_GLIKEY_NotLocked – if unlocked

Returns:

Status

status_t GLIKEY_CheckLock(GLIKEY_Type *base)

Check if Glikey is locked.

This operation returns the locking status of Glikey.

Return values:

kStatus_GLIKEY_LockedError – if locked
kStatus_GLIKEY_NotLocked – if unlocked

Returns:

Status kStatus_Success if success

status_t GLIKEY_SyncReset(GLIKEY_Type *base)

Perform a synchronous reset of Glikey.

This function performs a synchrounous reset of the Glikey. This results in:

Glikey will return to the INIT state, unless it is in the LOCK state

Parameters:

base – [in] The base address of the Glikey instance

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError

status_t GLIKEY_SetIntEnable(GLIKEY_Type *base, uint32_t value)

Set interrupt enable flag of Glikey.

Parameters:

base – [in] The base address of the Glikey instance
value – [in] Value to set the interrupt enable flag to, see #[TODO: add reference to constants]

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError

status_t GLIKEY_GetIntEnable(GLIKEY_Type *base, uint32_t *value)

Get interrupt enable flag of Glikey.

Parameters:

base – [in] The base address of the Glikey instance
value – [out] Pointer which will be filled with the interrupt enable status, see #[TODO: add reference to constants]

Returns:

Status kStatus_Success if success

status_t GLIKEY_ClearIntStatus(GLIKEY_Type *base)

Clear the interrupt status flag of Glikey.

Parameters:

base – [in] The base address of the Glikey instance

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError

status_t GLIKEY_SetIntStatus(GLIKEY_Type *base)

Set the interrupt status flag of Glikey.

Parameters:

base – [in] The base address of the Glikey instance

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError

status_t GLIKEY_Lock(GLIKEY_Type *base)

Lock Glikey SFR (Special Function Registers) interface.

This operation locks the Glikey SFR interface if it is not locked yet.

Parameters:

base – [in] The base address of the Glikey instance

Returns:

Status kStatus_Success if success

status_t GLIKEY_LockIndex(GLIKEY_Type *base)

Lock Glikey index.

This operation is used to lock a Glikey index. It can only be executed from the WR_EN state, executing it from any other state will result in Glikey entering WR_DIS state. When this happens Glikey requires a reset (synchrous or asynchronous) to go back to INIT state. If the Glikey SFR lock is active this operation will return an error.

Parameters:

base – [in] The base address of the Glikey instance

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError, kStatus_GLIKEY_DisabledError

status_t GLIKEY_IsIndexLocked(GLIKEY_Type *base, uint32_t index)

Check if Glikey index is locked.

This operation returns the locking status of Glikey index.

Parameters:

base – [in] The base address of the Glikey instance
index – [in] The index of the Glikey instance

Returns:

kStatus_GLIKEY_Locked if locked, kStatus_GLIKEY_NotLocked if unlocked Possible errors: kStatus_Fail

status_t GLIKEY_StartEnable(GLIKEY_Type *base, uint32_t index)

Start Glikey enable.

This operation is used to set a new index and start a the sequence to enable it. It needs to be started from the INIT state. If the new index is already locked Glikey will go to LOCKED state, otherwise it will go to STEP1 state. If this operation is used when Glikey is in any state other than INIT Glikey will go to WR_DIS state. It can only recover from this state through a reset (synchrounous or asyncrhonous). If the Glikey SFR lock is active this operation will return an error.

Parameters:

base – [in] The base address of the Glikey instance
index – [in] The index of the Glikey instance

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError, kStatus_Fail

status_t GLIKEY_ContinueEnable(GLIKEY_Type *base, uint32_t codeword)

Continue Glikey enable.

This operation is used to progress through the different states of the state machine, starting from STEP1 until the state WR_EN is reached. Each next state of the state machine can only be reached by providing the right codeword to this function. If anything goes wrong the state machine will go to WR_DIS state and can only recover from it through a reset (synchrous or asynchronous). If the Glikey SFR lock is active this operation will return an error.

Parameters:

base – [in] The base address of the Glikey instance
codeword – [in] Encoded word for progressing to next FSM state (see GLIKEY_CODEWORD_STEPx/EN)

Returns:

Status kStatus_Success if success Possible errors: kStatus_GLIKEY_LockedError, kStatus_Fail, kStatus_GLIKEY_DisabledError

status_t GLIKEY_EndOperation(GLIKEY_Type *base)

End Glikey operation.

This operation is used to end a Glikey operation. It can only be executed from the WR_EN, LOCKED and RESET states. Executing it from any other state will result in Glikey entering WR_DIS state. When this happens Glikey requires a reset (synchrous or asynchronous) to go back to INIT state. After this operation Glikey will go to INIT state or stay in LOCKED state when the index was locked. If the Glikey SFR lock is active this operation will return an error.

Parameters:

base – [in] The base address of the Glikey instance

Returns:

A code-flow protected error code (see nxpCsslFlowProtection)

Returns:

Status kStatus_Success if success, kStatus_GLIKEY_Locked if index is still locked Possible errors: kStatus_GLIKEY_LockedError, kStatus_GLIKEY_DisabledError

status_t GLIKEY_ResetIndex(GLIKEY_Type *base, uint32_t index)

Reset Glikey index.

This operation is used to reset a Glikey index. It can only be executed from the INIT state, executing it from any other state will result in Glikey entering WR_DIS state. When this happens Glikey requires a reset (synchrous or asynchronous) to go back to INIT state. If the Glikey SFR lock is active or the index is locked this operation will return an error.

Returns:: A code-flow protected error code (see nxpCsslFlowProtection)
Returns:: Status kStatus_Success if success, kStatus_GLIKEY_Locked if index is still locked Possible errors: kStatus_GLIKEY_LockedError, kStatus_GLIKEY_DisabledError

GLIKEY#

GPIO: General-Purpose Input/Output Driver#

FSL_GPIO_DRIVER_VERSION: GPIO driver version.

enum _gpio_pin_direction

GPIO direction definition.

Values:

enumerator kGPIO_DigitalInput: Set current pin as digital input

enumerator kGPIO_DigitalOutput: Set current pin as digital output

enum _gpio_checker_attribute

GPIO checker attribute.

Values:

enumerator kGPIO_UsernonsecureRWUsersecureRWPrivilegedsecureRW: User nonsecure:Read+Write; User Secure:Read+Write; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureRUsersecureRWPrivilegedsecureRW: User nonsecure:Read; User Secure:Read+Write; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureNUsersecureRWPrivilegedsecureRW: User nonsecure:None; User Secure:Read+Write; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureRUsersecureRPrivilegedsecureRW: User nonsecure:Read; User Secure:Read; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureNUsersecureRPrivilegedsecureRW: User nonsecure:None; User Secure:Read; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureNUsersecureNPrivilegedsecureRW: User nonsecure:None; User Secure:None; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureNUsersecureNPrivilegedsecureR: User nonsecure:None; User Secure:None; Privileged Secure:Read

enumerator kGPIO_UsernonsecureNUsersecureNPrivilegedsecureN: User nonsecure:None; User Secure:None; Privileged Secure:None

enumerator kGPIO_IgnoreAttributeCheck: Ignores the attribute check

enum _gpio_interrupt_config

Configures the interrupt generation condition.

Values:

enumerator kGPIO_InterruptStatusFlagDisabled: Interrupt status flag is disabled.

enumerator kGPIO_DMARisingEdge: ISF flag and DMA request on rising edge.

enumerator kGPIO_DMAFallingEdge: ISF flag and DMA request on falling edge.

enumerator kGPIO_DMAEitherEdge: ISF flag and DMA request on either edge.

enumerator kGPIO_FlagRisingEdge: Flag sets on rising edge.

enumerator kGPIO_FlagFallingEdge: Flag sets on falling edge.

enumerator kGPIO_FlagEitherEdge: Flag sets on either edge.

enumerator kGPIO_InterruptLogicZero: Interrupt when logic zero.

enumerator kGPIO_InterruptRisingEdge: Interrupt on rising edge.

enumerator kGPIO_InterruptFallingEdge: Interrupt on falling edge.

enumerator kGPIO_InterruptEitherEdge: Interrupt on either edge.

enumerator kGPIO_InterruptLogicOne: Interrupt when logic one.

enumerator kGPIO_ActiveHighTriggerOutputEnable: Enable active high-trigger output.

enumerator kGPIO_ActiveLowTriggerOutputEnable: Enable active low-trigger output.

enum _gpio_interrupt_selection

Configures the selection of interrupt/DMA request/trigger output.

Values:

enumerator kGPIO_InterruptOutput0: Interrupt/DMA request/trigger output 0.

enumerator kGPIO_InterruptOutput1: Interrupt/DMA request/trigger output 1.

enum gpio_pin_interrupt_control_t

GPIO pin and interrupt control.

Values:

enumerator kGPIO_PinControlNonSecure: Pin Control Non-Secure.

enumerator kGPIO_InterruptControlNonSecure: Interrupt Control Non-Secure.

enumerator kGPIO_PinControlNonPrivilege: Pin Control Non-Privilege.

enumerator kGPIO_InterruptControlNonPrivilege: Interrupt Control Non-Privilege.

typedef enum _gpio_pin_direction gpio_pin_direction_t: GPIO direction definition.

typedef enum _gpio_checker_attribute gpio_checker_attribute_t: GPIO checker attribute.

typedef struct _gpio_pin_config gpio_pin_config_t

The GPIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, leave the outputConfig unused. Note that in some use cases, the corresponding port property should be configured in advance with the PORT_SetPinConfig().

typedef enum _gpio_interrupt_config gpio_interrupt_config_t: Configures the interrupt generation condition.

typedef enum _gpio_interrupt_selection gpio_interrupt_selection_t: Configures the selection of interrupt/DMA request/trigger output.

typedef struct _gpio_version_info gpio_version_info_t: GPIO version information.

GPIO_FIT_REG(value)

struct _gpio_pin_config

#include <fsl_gpio.h>

The GPIO pin configuration structure.

Public Members

gpio_pin_direction_t pinDirection: GPIO direction, input or output

uint8_t outputLogic: Set a default output logic, which has no use in input

struct _gpio_version_info

#include <fsl_gpio.h>

GPIO version information.

Public Members

uint16_t feature: Feature Specification Number.

uint8_t minor: Minor Version Number.

uint8_t major: Major Version Number.

GPIO Driver#

void GPIO_PortInit(GPIO_Type *base)

Initializes the GPIO peripheral.

This function ungates the GPIO clock.

Parameters:

base – GPIO peripheral base pointer.

void GPIO_PortDenit(GPIO_Type *base)

Denitializes the GPIO peripheral.

Parameters:

base – GPIO peripheral base pointer.

void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config)

Initializes a GPIO pin used by the board.

To initialize the GPIO, define a pin configuration, as either input or output, in the user file. Then, call the GPIO_PinInit() function.

This is an example to define an input pin or an output pin configuration.

Define a digital input pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalInput,
  0,
}
Define a digital output pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalOutput,
  0,
}

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
pin – GPIO port pin number
config – GPIO pin configuration pointer

void GPIO_GetVersionInfo(GPIO_Type *base, gpio_version_info_t *verInfo)

Get GPIO version information.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
verInfo – GPIO version information

static inline void GPIO_SecurePrivilegeLock(GPIO_Type *base, gpio_pin_interrupt_control_t mask)

lock or unlock secure privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – pin or interrupt macro

static inline void GPIO_EnablePinControlNonSecure(GPIO_Type *base, uint32_t mask)

Enable Pin Control Non-Secure.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_DisablePinControlNonSecure(GPIO_Type *base, uint32_t mask)

Disable Pin Control Non-Secure.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_EnablePinControlNonPrivilege(GPIO_Type *base, uint32_t mask)

Enable Pin Control Non-Privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_DisablePinControlNonPrivilege(GPIO_Type *base, uint32_t mask)

Disable Pin Control Non-Privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_EnableInterruptControlNonSecure(GPIO_Type *base, uint32_t mask)

Enable Interrupt Control Non-Secure.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_DisableInterruptControlNonSecure(GPIO_Type *base, uint32_t mask)

Disable Interrupt Control Non-Secure.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_EnableInterruptControlNonPrivilege(GPIO_Type *base, uint32_t mask)

Enable Interrupt Control Non-Privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_DisableInterruptControlNonPrivilege(GPIO_Type *base, uint32_t mask)

Disable Interrupt Control Non-Privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PortInputEnable(GPIO_Type *base, uint32_t mask)

Enable port input.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PortInputDisable(GPIO_Type *base, uint32_t mask)

Disable port input.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t pin, uint8_t output)

Sets the output level of the multiple GPIO pins to the logic 1 or 0.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
pin – GPIO pin number
output – GPIO pin output logic level.
- 0: corresponding pin output low-logic level.
- 1: corresponding pin output high-logic level.

static inline void GPIO_PortSet(GPIO_Type *base, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 1.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PortClear(GPIO_Type *base, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 0.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t mask)

Reverses the current output logic of the multiple GPIO pins.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t pin)

Reads the current input value of the GPIO port.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
pin – GPIO pin number

Return values:

GPIO – port input value

0: corresponding pin input low-logic level.
1: corresponding pin input high-logic level.

static inline void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_config_t config)

Configures the gpio pin interrupt/DMA request.

Parameters:

base – GPIO peripheral base pointer.
pin – GPIO pin number.
config – GPIO pin interrupt configuration.
- kGPIO_InterruptStatusFlagDisabled: Interrupt/DMA request disabled.
- kGPIO_DMARisingEdge : DMA request on rising edge(if the DMA requests exit).
- kGPIO_DMAFallingEdge: DMA request on falling edge(if the DMA requests exit).
- kGPIO_DMAEitherEdge : DMA request on either edge(if the DMA requests exit).
- kGPIO_FlagRisingEdge : Flag sets on rising edge(if the Flag states exit).
- kGPIO_FlagFallingEdge : Flag sets on falling edge(if the Flag states exit).
- kGPIO_FlagEitherEdge : Flag sets on either edge(if the Flag states exit).
- kGPIO_InterruptLogicZero : Interrupt when logic zero.
- kGPIO_InterruptRisingEdge : Interrupt on rising edge.
- kGPIO_InterruptFallingEdge: Interrupt on falling edge.
- kGPIO_InterruptEitherEdge : Interrupt on either edge.
- kGPIO_InterruptLogicOne : Interrupt when logic one.
- kGPIO_ActiveHighTriggerOutputEnable : Enable active high-trigger output (if the trigger states exit).
- kGPIO_ActiveLowTriggerOutputEnable : Enable active low-trigger output (if the trigger states exit).

static inline void GPIO_SetPinInterruptChannel(GPIO_Type *base, uint32_t pin, gpio_interrupt_selection_t selection)

Configures the gpio pin interrupt/DMA request/trigger output channel selection.

Parameters:

base – GPIO peripheral base pointer.
pin – GPIO pin number.
selection – GPIO pin interrupt output selection.
- kGPIO_InterruptOutput0: Interrupt/DMA request/trigger output 0.
- kGPIO_InterruptOutput1 : Interrupt/DMA request/trigger output 1.

uint32_t GPIO_GpioGetInterruptFlags(GPIO_Type *base)

Read the GPIO interrupt status flags.

Parameters:

base – GPIO peripheral base pointer. (GPIOA, GPIOB, GPIOC, and so on.)

Returns:

The current GPIO’s interrupt status flag. ‘1’ means the related pin’s flag is set, ‘0’ means the related pin’s flag not set. For example, the return value 0x00010001 means the pin 0 and 17 have the interrupt pending.

uint32_t GPIO_GpioGetInterruptChannelFlags(GPIO_Type *base, uint32_t channel)

Read the GPIO interrupt status flags based on selected interrupt channel(IRQS).

Parameters:

base – GPIO peripheral base pointer. (GPIOA, GPIOB, GPIOC, and so on.)
channel – ‘0’ means selete interrupt channel 0, ‘1’ means selete interrupt channel 1.

Returns:

The current GPIO’s interrupt status flag based on the selected interrupt channel. ‘1’ means the related pin’s flag is set, ‘0’ means the related pin’s flag not set. For example, the return value 0x00010001 means the pin 0 and 17 have the interrupt pending.

uint8_t GPIO_PinGetInterruptFlag(GPIO_Type *base, uint32_t pin)

Read individual pin’s interrupt status flag.

Parameters:

base – GPIO peripheral base pointer. (GPIOA, GPIOB, GPIOC, and so on)
pin – GPIO specific pin number.

Returns:

The current selected pin’s interrupt status flag.

void GPIO_GpioClearInterruptFlags(GPIO_Type *base, uint32_t mask)

Clears GPIO pin interrupt status flags.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

void GPIO_GpioClearInterruptChannelFlags(GPIO_Type *base, uint32_t mask, uint32_t channel)

Clears GPIO pin interrupt status flags based on selected interrupt channel(IRQS).

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro
channel – ‘0’ means selete interrupt channel 0, ‘1’ means selete interrupt channel 1.

void GPIO_PinClearInterruptFlag(GPIO_Type *base, uint32_t pin)

Clear GPIO individual pin’s interrupt status flag.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on).
pin – GPIO specific pin number.

static inline void GPIO_SetMultipleInterruptPinsConfig(GPIO_Type *base, uint32_t mask, gpio_interrupt_config_t config)

Sets the GPIO interrupt configuration in PCR register for multiple pins.

Parameters:

base – GPIO peripheral base pointer.
mask – GPIO pin number macro.
config – GPIO pin interrupt configuration.
- kGPIO_InterruptStatusFlagDisabled: Interrupt disabled.
- kGPIO_DMARisingEdge : DMA request on rising edge(if the DMA requests exit).
- kGPIO_DMAFallingEdge: DMA request on falling edge(if the DMA requests exit).
- kGPIO_DMAEitherEdge : DMA request on either edge(if the DMA requests exit).
- kGPIO_FlagRisingEdge : Flag sets on rising edge(if the Flag states exit).
- kGPIO_FlagFallingEdge : Flag sets on falling edge(if the Flag states exit).
- kGPIO_FlagEitherEdge : Flag sets on either edge(if the Flag states exit).
- kGPIO_InterruptLogicZero : Interrupt when logic zero.
- kGPIO_InterruptRisingEdge : Interrupt on rising edge.
- kGPIO_InterruptFallingEdge: Interrupt on falling edge.
- kGPIO_InterruptEitherEdge : Interrupt on either edge.
- kGPIO_InterruptLogicOne : Interrupt when logic one.
- kGPIO_ActiveHighTriggerOutputEnable : Enable active high-trigger output (if the trigger states exit).
- kGPIO_ActiveLowTriggerOutputEnable : Enable active low-trigger output (if the trigger states exit)..

void GPIO_CheckAttributeBytes(GPIO_Type *base, gpio_checker_attribute_t attribute)

brief The GPIO module supports a device-specific number of data ports, organized as 32-bit words/8-bit Bytes. Each 32-bit/8-bit data port includes a GACR register, which defines the byte-level attributes required for a successful access to the GPIO programming model. If the GPIO module’s GACR register organized as 32-bit words, the attribute controls for the 4 data bytes in the GACR follow a standard little endian data convention.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
attribute – GPIO checker attribute

GPIO_PortGetInterruptFlags(base)

GPIO_PortClearInterruptFlags(base, mask)

INTM: Interrupt Monitor Driver#

FSL_INTM_DRIVER_VERSION: INTM driver version.

enum _intm_monitor

Interrupt monitors.

Values:

enumerator kINTM_Monitor1

enumerator kINTM_Monitor2

enumerator kINTM_Monitor3

enumerator kINTM_Monitor4

typedef enum _intm_monitor intm_monitor_t: Interrupt monitors.

typedef struct _intm_monitor_config intm_monitor_config_t: INTM interrupt source configuration structure.

typedef struct _intm_config intm_config_t: INTM configuration structure.

void INTM_GetDefaultConfig(intm_config_t *config)

Fill in the INTM config struct with the default settings.

The default values are:

config[0].irqnumber = NotAvail_IRQn;
config[0].maxtimer = 1000U;
config[1].irqnumber = NotAvail_IRQn;
config[1].maxtimer = 1000U;
config[2].irqnumber = NotAvail_IRQn;
config[2].maxtimer = 1000U;
config[3].irqnumber = NotAvail_IRQn;
config[3].maxtimer = 1000U;
config->enable = false;

Parameters:

config – Pointer to user’s INTM config structure.

void INTM_Init(INTM_Type *base, const intm_config_t *config)

Ungates the INTM clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application using the INTM driver.

Parameters:

base – INTM peripheral base address
config – Pointer to user’s INTM config structure.

void INTM_Deinit(INTM_Type *base)

Disables the INTM module.

Parameters:

base – INTM peripheral base address

static inline void INTM_EnableCycleCount(INTM_Type *base, bool enable)

Enable the cycle count timer mode.

Monitor mode enables the cycle count timer on a monitored interrupt request for comparison to the latency register.

Parameters:

base – INTM peripheral base address.
enable – Enable the cycle count or not.

static inline void INTM_AckIrq(INTM_Type *base, IRQn_Type irq)

Interrupt Acknowledge.

Call this function in ISR to acknowledge interrupt.

Parameters:

base – INTM peripheral base address.
irq – Handle interrupt number.

static inline void INTM_SetInterruptRequestNumber(INTM_Type *base, intm_monitor_t intms, IRQn_Type irq)

Interrupt Request Select.

This function is used to set the interrupt request number to monitor or check.

Parameters:

base – INTM peripheral base address.
intms – Programmable interrupt monitors.
irq – Interrupt request number to monitor.

Returns:

Select the interrupt request number to monitor.

static inline void INTM_SetMaxTime(INTM_Type *base, intm_monitor_t intms, uint32_t count)

Set the maximum count time.

This function is to set the maximum time from interrupt generation to confirmation.

Parameters:

base – INTM peripheral base address.
intms – Programmable interrupt monitors.
count – Timer maximum count.

static inline void INTM_ClearTimeCount(INTM_Type *base, intm_monitor_t intms)

Clear the timer period in units of count.

This function is used to clear the INTM_TIMERa register.

Parameters:

base – INTM peripheral base address.
intms – Programmable interrupt monitors.

static inline uint32_t INTM_GetTimeCount(INTM_Type *base, intm_monitor_t intms)

Gets the timer period in units of count.

This function is used to get the number of INTM clock cycles from interrupt request to confirmation interrupt processing. If this number exceeds the set maximum time, will be an error signal.

Parameters:

base – INTM peripheral base address.
intms – Programmable interrupt monitors.

static inline bool INTM_GetStatusFlags(INTM_Type *base, intm_monitor_t intms)

Interrupt monitor status.

This function indicates whether the INTM_TIMERa value has exceeded the INTM_LATENCYa value. If any interrupt source in INTM_TIMERa exceeds the programmed delay value, the monitor state can be cleared by calling the INTM_ClearTimeCount() API to clear the corresponding INTM_TIMERa register.

Parameters:

base – INTM peripheral base address.
intms – Programmable interrupt monitors.

Returns:

Whether INTM_TIMER value has exceeded INTM_LATENCY value. false:INTM_TIMER value has not exceeded the INTM_LATENCY value; true:INTM_TIMER value has exceeded the INTM_LATENCY value.

struct _intm_monitor_config

#include <fsl_intm.h>

INTM interrupt source configuration structure.

Public Members

uint32_t maxtimer: Set the maximum timer

IRQn_Type irqnumber: Select the interrupt request number to monitor.

struct _intm_config

#include <fsl_intm.h>

INTM configuration structure.

Public Members

bool enable: Interrupt source monitor config. enables the cycle count timer on a monitored interrupt request for comparison to the latency register.

Common Driver#

FSL_COMMON_DRIVER_VERSION: common driver version.

DEBUG_CONSOLE_DEVICE_TYPE_NONE: No debug console.

DEBUG_CONSOLE_DEVICE_TYPE_UART: Debug console based on UART.

DEBUG_CONSOLE_DEVICE_TYPE_LPUART: Debug console based on LPUART.

DEBUG_CONSOLE_DEVICE_TYPE_LPSCI: Debug console based on LPSCI.

DEBUG_CONSOLE_DEVICE_TYPE_USBCDC: Debug console based on USBCDC.

DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM: Debug console based on FLEXCOMM.

DEBUG_CONSOLE_DEVICE_TYPE_IUART: Debug console based on i.MX UART.

DEBUG_CONSOLE_DEVICE_TYPE_VUSART: Debug console based on LPC_VUSART.

DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART: Debug console based on LPC_USART.

DEBUG_CONSOLE_DEVICE_TYPE_SWO: Debug console based on SWO.

DEBUG_CONSOLE_DEVICE_TYPE_QSCI: Debug console based on QSCI.

MIN(a, b): Computes the minimum of a and b.

MAX(a, b): Computes the maximum of a and b.

UINT16_MAX: Max value of uint16_t type.

UINT32_MAX: Max value of uint32_t type.

MCUX_MASK_INVERT_8(mask): 8-bit mask inversion.

MCUX_MASK_INVERT_16(mask): 16-bit mask inversion.

MCUX_MASK_INVERT_32(mask): 32-bit mask inversion for completeness.

MCUX_REG_WRITE8(reg, value): 8-bit register write macro

MCUX_REG_WRITE16(reg, value): 16-bit register write macro

MCUX_REG_WRITE32(reg, value): 32-bit register write macro

MCUX_REG_READ8(reg): 8-bit register read macro

MCUX_REG_READ16(reg): 16-bit register read macro

MCUX_REG_READ32(reg): 32-bit register read macro

MCUX_REG_BIT_SET8(reg, mask): 8-bit register bit set macro

MCUX_REG_BIT_SET16(reg, mask): 16-bit register bit set macro

MCUX_REG_BIT_SET32(reg, mask): 32-bit register bit set macro

MCUX_REG_BIT_CLEAR8(reg, mask): 8-bit register bit clear macro

MCUX_REG_BIT_CLEAR16(reg, mask): 16-bit register bit clear macro

MCUX_REG_BIT_CLEAR32(reg, mask): 32-bit register bit clear macro

MCUX_REG_BIT_GET8(reg, mask): 8-bit register bit get macro

MCUX_REG_BIT_GET16(reg, mask): 16-bit register bit get macro

MCUX_REG_BIT_GET32(reg, mask): 32-bit register bit get macro

MCUX_REG_MODIFY8(reg, mask, value): 32-bit register read-modify-write macro

MCUX_REG_MODIFY16(reg, mask, value): 16-bit register read-modify-write macro

MCUX_REG_MODIFY32(reg, mask, value): 32-bit register read-modify-write macro

SDK_ATOMIC_LOCAL_ADD(addr, val): Add value val from the variable at address address.

SDK_ATOMIC_LOCAL_SUB(addr, val): Subtract value val to the variable at address address.

SDK_ATOMIC_LOCAL_SET(addr, bits): Set the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_CLEAR(addr, bits): Clear the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_TOGGLE(addr, bits): Toggle the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits): For the variable at address address, clear the bits specifiled by clearBits and set the bits specifiled by setBits.

SDK_ATOMIC_LOCAL_COMPARE_AND_SET(addr, expected, newValue): For the variable at address address, check whether the value equal to expected. If value same as expected then update newValue to address and return true , else return false .

SDK_ATOMIC_LOCAL_TEST_AND_SET(addr, newValue): For the variable at address address, set as newValue value and return old value.

USEC_TO_COUNT(us, clockFreqInHz): Macro to convert a microsecond period to raw count value

COUNT_TO_USEC(count, clockFreqInHz): Macro to convert a raw count value to microsecond

MSEC_TO_COUNT(ms, clockFreqInHz): Macro to convert a millisecond period to raw count value

COUNT_TO_MSEC(count, clockFreqInHz): Macro to convert a raw count value to millisecond

SDK_ISR_EXIT_BARRIER

SDK_ALIGN(var, alignbytes): Macro to define a variable with alignbytes alignment

SDK_SIZEALIGN(var, alignbytes)

Macro to define a variable with L1 d-cache line size alignment

Macro to define a variable with L2 cache line size alignment

Macro to change a value to a given size aligned value (rounded up)

SDK_SIZEALIGN_UP(var, alignbytes): Macro to change a value to a given size aligned value (rounded up), the wrapper of SDK_SIZEALIGN

SDK_SIZEALIGN_DOWN(var, alignbytes): Macro to change a value to a given size aligned value (rounded down)

SDK_IS_ALIGNED(var, alignbytes): Macro to check if a value is aligned to a given size

AT_NONCACHEABLE_SECTION(var): Define a variable var, and place it in non-cacheable section.

AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes): Define a variable var, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.

AT_NONCACHEABLE_SECTION_INIT(var): Define a variable var with initial value, and place it in non-cacheable section.

AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes): Define a variable var with initial value, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.

AT_CACHE_LINE_SECTION(var): Define a variable var, which is cache line size aligned and be placed in CacheLineData section.

AT_CACHE_LINE_SECTION_INIT(var): Define a variable var with initial value, which is cache line size aligned and be placed in CacheLineData.init section.

AT_QUICKACCESS_SECTION_CODE(func): Place function in a section which can be accessed quickly by core.

AT_QUICKACCESS_SECTION_DATA(var): Place data in a section which can be accessed quickly by core.

AT_QUICKACCESS_SECTION_DATA_ALIGN(var, alignbytes): Place data in a section which can be accessed quickly by core, and the variable address is set to align with alignbytes.

MCUX_RAMFUNC

Function attribute to place function in RAM. For example, to place function my_func in ram, use like:

MCUX_RAMFUNC my_func

RAMFUNCTION_SECTION_CODE(func): Place function in ram.

MCUX_DEPRECATED: Deprecated APIs.

MCUX_DEPRECATED_MACRO: Deprecated macros.

MCUX_EXPERIMENTAL: Experimental APIs.

MCUX_EXPERIMENTAL_MACRO: Experimental macros.

enum _status_groups

Status group numbers.

Values:

enumerator kStatusGroup_Generic: Group number for generic status codes.

enumerator kStatusGroup_FLASH: Group number for FLASH status codes.

enumerator kStatusGroup_LPSPI: Group number for LPSPI status codes.

enumerator kStatusGroup_FLEXIO_SPI: Group number for FLEXIO SPI status codes.

enumerator kStatusGroup_DSPI: Group number for DSPI status codes.

enumerator kStatusGroup_FLEXIO_UART: Group number for FLEXIO UART status codes.

enumerator kStatusGroup_FLEXIO_I2C: Group number for FLEXIO I2C status codes.

enumerator kStatusGroup_LPI2C: Group number for LPI2C status codes.

enumerator kStatusGroup_UART: Group number for UART status codes.

enumerator kStatusGroup_I2C: Group number for UART status codes.

enumerator kStatusGroup_LPSCI: Group number for LPSCI status codes.

enumerator kStatusGroup_LPUART: Group number for LPUART status codes.

enumerator kStatusGroup_SPI: Group number for SPI status code.

enumerator kStatusGroup_XRDC: Group number for XRDC status code.

enumerator kStatusGroup_SEMA42: Group number for SEMA42 status code.

enumerator kStatusGroup_SDHC: Group number for SDHC status code

enumerator kStatusGroup_SDMMC: Group number for SDMMC status code

enumerator kStatusGroup_SAI: Group number for SAI status code

enumerator kStatusGroup_MCG: Group number for MCG status codes.

enumerator kStatusGroup_SCG: Group number for SCG status codes.

enumerator kStatusGroup_SDSPI: Group number for SDSPI status codes.

enumerator kStatusGroup_FLEXIO_I2S: Group number for FLEXIO I2S status codes

enumerator kStatusGroup_FLEXIO_MCULCD: Group number for FLEXIO LCD status codes

enumerator kStatusGroup_FLASHIAP: Group number for FLASHIAP status codes

enumerator kStatusGroup_FLEXCOMM_I2C: Group number for FLEXCOMM I2C status codes

enumerator kStatusGroup_I2S: Group number for I2S status codes

enumerator kStatusGroup_IUART: Group number for IUART status codes

enumerator kStatusGroup_CSI: Group number for CSI status codes

enumerator kStatusGroup_MIPI_DSI: Group number for MIPI DSI status codes

enumerator kStatusGroup_SDRAMC: Group number for SDRAMC status codes.

enumerator kStatusGroup_POWER: Group number for POWER status codes.

enumerator kStatusGroup_ENET: Group number for ENET status codes.

enumerator kStatusGroup_PHY: Group number for PHY status codes.

enumerator kStatusGroup_TRGMUX: Group number for TRGMUX status codes.

enumerator kStatusGroup_SMARTCARD: Group number for SMARTCARD status codes.

enumerator kStatusGroup_LMEM: Group number for LMEM status codes.

enumerator kStatusGroup_QSPI: Group number for QSPI status codes.

enumerator kStatusGroup_DMA: Group number for DMA status codes.

enumerator kStatusGroup_EDMA: Group number for EDMA status codes.

enumerator kStatusGroup_DMAMGR: Group number for DMAMGR status codes.

enumerator kStatusGroup_FLEXCAN: Group number for FlexCAN status codes.

enumerator kStatusGroup_LTC: Group number for LTC status codes.

enumerator kStatusGroup_FLEXIO_CAMERA: Group number for FLEXIO CAMERA status codes.

enumerator kStatusGroup_LPC_SPI: Group number for LPC_SPI status codes.

enumerator kStatusGroup_LPC_USART: Group number for LPC_USART status codes.

enumerator kStatusGroup_DMIC: Group number for DMIC status codes.

enumerator kStatusGroup_SDIF: Group number for SDIF status codes.

enumerator kStatusGroup_SPIFI: Group number for SPIFI status codes.

enumerator kStatusGroup_OTP: Group number for OTP status codes.

enumerator kStatusGroup_MCAN: Group number for MCAN status codes.

enumerator kStatusGroup_CAAM: Group number for CAAM status codes.

enumerator kStatusGroup_ECSPI: Group number for ECSPI status codes.

enumerator kStatusGroup_USDHC: Group number for USDHC status codes.

enumerator kStatusGroup_LPC_I2C: Group number for LPC_I2C status codes.

enumerator kStatusGroup_DCP: Group number for DCP status codes.

enumerator kStatusGroup_MSCAN: Group number for MSCAN status codes.

enumerator kStatusGroup_ESAI: Group number for ESAI status codes.

enumerator kStatusGroup_FLEXSPI: Group number for FLEXSPI status codes.

enumerator kStatusGroup_MMDC: Group number for MMDC status codes.

enumerator kStatusGroup_PDM: Group number for MIC status codes.

enumerator kStatusGroup_SDMA: Group number for SDMA status codes.

enumerator kStatusGroup_ICS: Group number for ICS status codes.

enumerator kStatusGroup_SPDIF: Group number for SPDIF status codes.

enumerator kStatusGroup_LPC_MINISPI: Group number for LPC_MINISPI status codes.

enumerator kStatusGroup_HASHCRYPT: Group number for Hashcrypt status codes

enumerator kStatusGroup_LPC_SPI_SSP: Group number for LPC_SPI_SSP status codes.

enumerator kStatusGroup_I3C: Group number for I3C status codes

enumerator kStatusGroup_LPC_I2C_1: Group number for LPC_I2C_1 status codes.

enumerator kStatusGroup_NOTIFIER: Group number for NOTIFIER status codes.

enumerator kStatusGroup_DebugConsole: Group number for debug console status codes.

enumerator kStatusGroup_SEMC: Group number for SEMC status codes.

enumerator kStatusGroup_ApplicationRangeStart: Starting number for application groups.

enumerator kStatusGroup_IAP: Group number for IAP status codes

enumerator kStatusGroup_SFA: Group number for SFA status codes

enumerator kStatusGroup_SPC: Group number for SPC status codes.

enumerator kStatusGroup_PUF: Group number for PUF status codes.

enumerator kStatusGroup_TOUCH_PANEL: Group number for touch panel status codes

enumerator kStatusGroup_VBAT: Group number for VBAT status codes

enumerator kStatusGroup_XSPI: Group number for XSPI status codes

enumerator kStatusGroup_PNGDEC: Group number for PNGDEC status codes

enumerator kStatusGroup_JPEGDEC: Group number for JPEGDEC status codes

enumerator kStatusGroup_AUDMIX: Group number for AUDMIX status codes

enumerator kStatusGroup_HAL_GPIO: Group number for HAL GPIO status codes.

enumerator kStatusGroup_HAL_UART: Group number for HAL UART status codes.

enumerator kStatusGroup_HAL_TIMER: Group number for HAL TIMER status codes.

enumerator kStatusGroup_HAL_SPI: Group number for HAL SPI status codes.

enumerator kStatusGroup_HAL_I2C: Group number for HAL I2C status codes.

enumerator kStatusGroup_HAL_FLASH: Group number for HAL FLASH status codes.

enumerator kStatusGroup_HAL_PWM: Group number for HAL PWM status codes.

enumerator kStatusGroup_HAL_RNG: Group number for HAL RNG status codes.

enumerator kStatusGroup_HAL_I2S: Group number for HAL I2S status codes.

enumerator kStatusGroup_HAL_ADC_SENSOR: Group number for HAL ADC SENSOR status codes.

enumerator kStatusGroup_TIMERMANAGER: Group number for TiMER MANAGER status codes.

enumerator kStatusGroup_SERIALMANAGER: Group number for SERIAL MANAGER status codes.

enumerator kStatusGroup_LED: Group number for LED status codes.

enumerator kStatusGroup_BUTTON: Group number for BUTTON status codes.

enumerator kStatusGroup_EXTERN_EEPROM: Group number for EXTERN EEPROM status codes.

enumerator kStatusGroup_SHELL: Group number for SHELL status codes.

enumerator kStatusGroup_MEM_MANAGER: Group number for MEM MANAGER status codes.

enumerator kStatusGroup_LIST: Group number for List status codes.

enumerator kStatusGroup_OSA: Group number for OSA status codes.

enumerator kStatusGroup_COMMON_TASK: Group number for Common task status codes.

enumerator kStatusGroup_MSG: Group number for messaging status codes.

enumerator kStatusGroup_SDK_OCOTP: Group number for OCOTP status codes.

enumerator kStatusGroup_SDK_FLEXSPINOR: Group number for FLEXSPINOR status codes.

enumerator kStatusGroup_CODEC: Group number for codec status codes.

enumerator kStatusGroup_ASRC: Group number for codec status ASRC.

enumerator kStatusGroup_OTFAD: Group number for codec status codes.

enumerator kStatusGroup_SDIOSLV: Group number for SDIOSLV status codes.

enumerator kStatusGroup_MECC: Group number for MECC status codes.

enumerator kStatusGroup_ENET_QOS: Group number for ENET_QOS status codes.

enumerator kStatusGroup_LOG: Group number for LOG status codes.

enumerator kStatusGroup_I3CBUS: Group number for I3CBUS status codes.

enumerator kStatusGroup_QSCI: Group number for QSCI status codes.

enumerator kStatusGroup_ELEMU: Group number for ELEMU status codes.

enumerator kStatusGroup_QUEUEDSPI: Group number for QSPI status codes.

enumerator kStatusGroup_POWER_MANAGER: Group number for POWER_MANAGER status codes.

enumerator kStatusGroup_IPED: Group number for IPED status codes.

enumerator kStatusGroup_ELS_PKC: Group number for ELS PKC status codes.

enumerator kStatusGroup_CSS_PKC: Group number for CSS PKC status codes.

enumerator kStatusGroup_HOSTIF: Group number for HOSTIF status codes.

enumerator kStatusGroup_CLIF: Group number for CLIF status codes.

enumerator kStatusGroup_BMA: Group number for BMA status codes.

enumerator kStatusGroup_NETC: Group number for NETC status codes.

enumerator kStatusGroup_ELE: Group number for ELE status codes.

enumerator kStatusGroup_GLIKEY: Group number for GLIKEY status codes.

enumerator kStatusGroup_AON_POWER: Group number for AON_POWER status codes.

enumerator kStatusGroup_AON_COMMON: Group number for AON_COMMON status codes.

enumerator kStatusGroup_ENDAT3: Group number for ENDAT3 status codes.

enumerator kStatusGroup_HIPERFACE: Group number for HIPERFACE status codes.

enumerator kStatusGroup_NPX: Group number for NPX status codes.

enumerator kStatusGroup_ELA_CSEC: Group number for ELA_CSEC status codes.

enumerator kStatusGroup_FLEXIO_T_FORMAT: Group number for T-format status codes.

enumerator kStatusGroup_FLEXIO_A_FORMAT: Group number for A-format status codes.

enumerator kStatusGroup_LPC_QSPI: Group number for LPC QSPI status codes.

enumerator kStatusGroup_EVENT_CTRL: Group number for Event controller status codes.

Generic status return codes.

Values:

enumerator kStatus_Success: Generic status for Success.

enumerator kStatus_Fail: Generic status for Fail.

enumerator kStatus_ReadOnly: Generic status for read only failure.

enumerator kStatus_OutOfRange: Generic status for out of range access.

enumerator kStatus_InvalidArgument: Generic status for invalid argument check.

enumerator kStatus_Timeout: Generic status for timeout.

enumerator kStatus_NoTransferInProgress: Generic status for no transfer in progress.

enumerator kStatus_Busy: Generic status for module is busy.

enumerator kStatus_NoData: Generic status for no data is found for the operation.

typedef int32_t status_t: Type used for all status and error return values.

void *SDK_Malloc(size_t size, size_t alignbytes)

Allocate memory with given alignment and aligned size.

This is provided to support the dynamically allocated memory used in cache-able region.

Parameters:

size – The length required to malloc.
alignbytes – The alignment size.

Return values:

The – allocated memory.

void SDK_Free(void *ptr)

Free memory.

Parameters:

ptr – The memory to be release.

void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz)

Delay at least for some time. Please note that, this API uses while loop for delay, different run-time environments make the time not precise, if precise delay count was needed, please implement a new delay function with hardware timer.

Parameters:

delayTime_us – Delay time in unit of microsecond.
coreClock_Hz – Core clock frequency with Hz.

static inline status_t EnableIRQ(IRQn_Type interrupt)

Enable specific interrupt.

Enable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only enables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ number.

Return values:

kStatus_Success – Interrupt enabled successfully
kStatus_Fail – Failed to enable the interrupt

static inline status_t DisableIRQ(IRQn_Type interrupt)

Disable specific interrupt.

Disable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only disables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ number.

Return values:

kStatus_Success – Interrupt disabled successfully
kStatus_Fail – Failed to disable the interrupt

static inline status_t EnableIRQWithPriority(IRQn_Type interrupt, uint8_t priNum)

Enable the IRQ, and also set the interrupt priority.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ to Enable.
priNum – Priority number set to interrupt controller register.

Return values:

kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.

static inline status_t IRQ_SetPriority(IRQn_Type interrupt, uint8_t priNum)

Set the IRQ priority.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ to set.
priNum – Priority number set to interrupt controller register.

Return values:

kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.

static inline status_t IRQ_ClearPendingIRQ(IRQn_Type interrupt)

Clear the pending IRQ flag.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The flag which IRQ to clear.

Return values:

kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.

static inline uint32_t DisableGlobalIRQ(void)

Disable the global IRQ.

Disable the global interrupt and return the current primask register. User is required to provided the primask register for the EnableGlobalIRQ().

Returns:: Current primask value.

static inline void EnableGlobalIRQ(uint32_t primask)

Enable the global IRQ.

Set the primask register with the provided primask value but not just enable the primask. The idea is for the convenience of integration of RTOS. some RTOS get its own management mechanism of primask. User is required to use the EnableGlobalIRQ() and DisableGlobalIRQ() in pair.

Parameters:

primask – value of primask register to be restored. The primask value is supposed to be provided by the DisableGlobalIRQ().

static inline bool _SDK_AtomicLocalCompareAndSet(uint32_t *addr, uint32_t expected, uint32_t newValue)

static inline uint32_t _SDK_AtomicTestAndSet(uint32_t *addr, uint32_t newValue)

FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ: Macro to use the default weak IRQ handler in drivers.

MAKE_STATUS(group, code): Construct a status code value from a group and code number.

MAKE_VERSION(major, minor, bugfix)

Construct the version number for drivers.

The driver version is a 32-bit number, for both 32-bit platforms(such as Cortex M) and 16-bit platforms(such as DSC).

| Unused    || Major Version || Minor Version ||  Bug Fix    |
31        25  24           17  16            9  8            0

ARRAY_SIZE(x): Computes the number of elements in an array.

UINT64_H(X): Macro to get upper 32 bits of a 64-bit value

UINT64_L(X): Macro to get lower 32 bits of a 64-bit value

SUPPRESS_FALL_THROUGH_WARNING(): For switch case code block, if case section ends without “break;” statement, there wil be fallthrough warning with compiler flag -Wextra or -Wimplicit-fallthrough=n when using armgcc. To suppress this warning, “SUPPRESS_FALL_THROUGH_WARNING();” need to be added at the end of each case section which misses “break;”statement.

MSDK_REG_SECURE_ADDR(x): Convert the register address to the one used in secure mode.

MSDK_REG_NONSECURE_ADDR(x): Convert the register address to the one used in non-secure mode.

MSDK_HAS_DWT_CYCCNT: The chip supports DWT CYCCNT or not.

MSDK_INVALID_IRQ_HANDLER: Invalid IRQ handler address.

LIN: Local Interconnect Network Driver#

LIN Driver#

uint32_t LIN_CalcMaxHeaderTimeoutCnt(uint32_t baudRate)

Calculates maximal header time lenght.

Theader_Maximum = 1.4 * THeader_Nominal, THeader_Nominal = 34 * TBit, ( 13 nominal bits of breack; 1 nominal bit of break delimiter; 10 bits for SYNC and 10 bits of PID) The function is not include time for conveying break and break delimiter TIME_OUT_UNIT is in micro second

Parameters:

baudRate – baudrate

uint32_t LIN_CalcMaxResTimeoutCnt(uint32_t baudRate, uint8_t size)

Calculates maximal header time length.

TResponse_Maximum = 1.4 * TResponse_Nominal, TResponse_Nominal = 10 * (NData+ 1) * TBit

Parameters:

baudRate – Baudrate
size – Frame size

lin_status_t LIN_SetResponse(uint8_t instance, uint8_t *response_buff, uint8_t response_length, uint8_t max_frame_res_timeout)

Forwards a response to a lower level.

Parameters:

instance – LPUART instance
response_buff – response message
response_length – length of response
max_frame_res_timeout – maximal timeout duration for message

Returns:

An error code or lin_status_t

lin_status_t LIN_RxResponse(uint8_t instance, uint8_t *response_buff, uint8_t response_length, uint8_t max_frame_res_timeout)

Forwards a response to a higher level.

Parameters:

instance – LPUART instance
response_buff – response message
response_length – length of response
max_frame_res_timeout – maximal timeout duration for message

Returns:

An error code or lin_status_t

lin_status_t LIN_IgnoreResponse(uint8_t instance)

Put a node into idle state.

Parameters:

instance – LPUART instance

Returns:

An error code or lin_status_t

void LIN_GetSlaveDefaultConfig(lin_user_config_t *linUserConfig)

Initializes linUserConfig variable for a slave node.

Parameters:

linUserConfig – Pointer to LIN user config structure

void LIN_GetMasterDefaultConfig(lin_user_config_t *linUserConfig)

Initializes linUserConfig variable for a master node.

Parameters:

linUserConfig – Pointer to LIN user config structure

void LIN_CalculateBaudrate(uint32_t instance, uint32_t baudRate_Bps, uint32_t srcClock_Hz, uint32_t *osr, uint16_t *sbr)

Calculates baudrate registers values for given baudrate.

Parameters:

instance – LPUART instance
baudRate_Bps – LPUART baudrate
srcClock_Hz – LPUART clock frequency
osr – LPUART baudrate OSR value, return value
sbr – LPUART baudrate SBR value, return value

void LIN_SetBaudrate(uint32_t instance, uint32_t osr, uint16_t sbr)

Set baudrate registers values.

Parameters:

instance – LPUART instance
osr – LPUART baudrate OSR value
sbr – LPUART baudrate SBR value

lin_status_t LIN_Init(uint32_t instance, lin_user_config_t *linUserConfig, lin_state_t *linCurrentState, uint32_t clockSource)

Initializes an instance LIN Hardware Interface for LIN Network.

The caller provides memory for the driver state structures during initialization. The user must select the LIN Hardware Interface clock source in the application to initialize the LIN Hardware Interface.

Parameters:

instance – LPUART instance
linUserConfig – user configuration structure of type lin_user_config_t
linCurrentState – pointer to the LIN Hardware Interface driver state structure
clockSource – clock source frequency in Hz for the LIN Hardware Interface

Returns:

An error code or lin_status_t

lin_status_t LIN_Deinit(uint32_t instance)

Shuts down the LIN Hardware Interface by disabling interrupts and transmitter/receiver.

Parameters:

instance – LPUART instance

Returns:

An error code or lin_status_t

lin_callback_t LIN_InstallCallback(uint32_t instance, lin_callback_t function)

Installs callback function that is used for LIN_DRV_IRQHandler.

Note

After a callback is installed, it bypasses part of the LIN Hardware Interface IRQHandler logic. Therefore, the callback needs to handle the indexes of txBuff and txSize.

Parameters:

instance – LPUART instance.
function – the LIN receive callback function.

Returns:

Former LIN callback function pointer.

lin_status_t LIN_SendFrameDataBlocking(uint32_t instance, const uint8_t *txBuff, uint8_t txSize, uint32_t timeoutMSec)

Sends Frame data out through the LIN Hardware Interface using blocking method. This function will calculate the checksum byte and send it with the frame data. Blocking means that the function does not return until the transmission is complete.

Parameters:

instance – LPUART instance
txBuff – source buffer containing 8-bit data chars to send
txSize – the number of bytes to send
timeoutMSec – timeout value in milli seconds

Returns:

An error code or lin_status_t LIN_BUS_BUSY if the bus is currently busy, transmission cannot be started.

lin_status_t LIN_SendFrameData(uint32_t instance, const uint8_t *txBuff, uint8_t txSize)

Sends frame data out through the LIN Hardware Interface using non-blocking method. This enables an a-sync method for transmitting data. Non-blocking means that the function returns immediately. The application has to get the transmit status to know when the transmit is complete. This function will calculate the checksum byte and send it with the frame data.

Note

If users use LIN_TimeoutService in a timer interrupt handler, then before using this function, users have to set timeout counter to an appropriate value by using LIN_SetTimeoutCounter(instance, timeoutValue). The timeout value should be big enough to complete the transmission. Timeout in real time is (timeoutValue) * (time period that LIN_TimeoutService is called). For example, if LIN_TimeoutService is called in an timer interrupt with period of 500 micro seconds, then timeout in real time is timeoutValue * 500 micro seconds.

Parameters:

instance – LPUART instance
txBuff – source buffer containing 8-bit data chars to send
txSize – the number of bytes to send

Returns:

An error code or lin_status_t LIN_BUS_BUSY if the bus is currently busy, transmission cannot be started. LIN_SUCCESS if the transmission was completed.

lin_status_t LIN_GetTransmitStatus(uint32_t instance, uint8_t *bytesRemaining)

Get status of an on-going non-blocking transmission While sending frame data using non-blocking method, users can use this function to get status of that transmission. The bytesRemaining shows number of bytes that still needed to transmit.

Parameters:

instance – LPUART instance
bytesRemaining – Number of bytes still needed to transmit

Returns:

lin_status_t LIN_TX_BUSY if the transmission is still in progress. LIN_TIMEOUT if timeout occurred and transmission was not completed. LIN_SUCCESS if the transmission was successful.

lin_status_t LIN_ReceiveFrameDataBlocking(uint32_t instance, uint8_t *rxBuff, uint8_t rxSize, uint32_t timeoutMSec)

Receives frame data through the LIN Hardware Interface using blocking method. This function will check the checksum byte. If the checksum is correct, it will receive the frame data. Blocking means that the function does not return until the reception is complete.

Parameters:

instance – LPUART instance
rxBuff – buffer containing 8-bit received data
rxSize – the number of bytes to receive
timeoutMSec – timeout value in milli seconds

Returns:

An error code or lin_status_t

lin_status_t LIN_ReceiveFrameData(uint32_t instance, uint8_t *rxBuff, uint8_t rxSize)

Receives frame data through the LIN Hardware Interface using non- blocking method. This function will check the checksum byte. If the checksum is correct, it will receive it with the frame data. Non-blocking means that the function returns immediately. The application has to get the receive status to know when the reception is complete.

Note

If users use LIN_TimeoutService in a timer interrupt handler, then before using this function, users have to set timeout counter to an appropriate value by using LIN_SetTimeoutCounter(instance, timeoutValue). The timeout value should be big enough to complete the reception. Timeout in real time is (timeoutValue) * (time period that LIN_TimeoutService is called). For example, if LIN_TimeoutService is called in an timer interrupt with period of 500 micro seconds, then timeout in real time is timeoutValue * 500 micro seconds.

Parameters:

instance – LPUART instance
rxBuff – buffer containing 8-bit received data
rxSize – the number of bytes to receive

Returns:

An error code or lin_status_t

lin_status_t LIN_AbortTransferData(uint32_t instance)

Aborts an on-going non-blocking transmission/reception. While performing a non-blocking transferring data, users can call this function to terminate immediately the transferring.

Parameters:

instance – LPUART instance

Returns:

An error code or lin_status_t

lin_status_t LIN_GetReceiveStatus(uint32_t instance, uint8_t *bytesRemaining)

Get status of an on-going non-blocking reception While receiving frame data using non-blocking method, users can use this function to get status of that receiving. This function return the current event ID, LIN_RX_BUSY while receiving and return LIN_SUCCESS, or timeout (LIN_TIMEOUT) when the reception is complete. The bytesRemaining shows number of bytes that still needed to receive.

Parameters:

instance – LPUART instance
bytesRemaining – Number of bytes still needed to receive

Returns:

lin_status_t LIN_RX_BUSY, LIN_TIMEOUT or LIN_SUCCESS

lin_status_t LIN_GoToSleepMode(uint32_t instance)

Puts current LIN node to sleep mode This function changes current node state to LIN_NODE_STATE_SLEEP_MODE.

Parameters:

instance – LPUART instance

Returns:

An error code or lin_status_t

lin_status_t LIN_GotoIdleState(uint32_t instance)

Puts current LIN node to Idle state This function changes current node state to LIN_NODE_STATE_IDLE.

Parameters:

instance – LPUART instance

Returns:

An error code or lin_status_t

lin_status_t LIN_SendWakeupSignal(uint32_t instance)

Sends a wakeup signal through the LIN Hardware Interface.

Parameters:

instance – LPUART instance

Returns:

An error code or lin_status_t

lin_node_state_t LIN_GetCurrentNodeState(uint32_t instance)

Get the current LIN node state.

Parameters:

instance – LPUART instance

Returns:

current LIN node state

void LIN_TimeoutService(uint32_t instance)

Callback function for Timer Interrupt Handler Users may use (optional, not required) LIN_TimeoutService to check if timeout has occurred during non-blocking frame data transmission and reception. User may initialize a timer (for example FTM) in Output Compare Mode with period of 500 micro seconds (recommended). In timer IRQ handler, call this function.

Parameters:

instance – LPUART instance

void LIN_SetTimeoutCounter(uint32_t instance, uint32_t timeoutValue)

Set Value for Timeout Counter that is used in LIN_TimeoutService.

Parameters:

instance – LPUART instance
timeoutValue – Timeout Value to be set

lin_status_t LIN_MasterSendHeader(uint32_t instance, uint8_t id)

Sends frame header out through the LIN Hardware Interface using a non-blocking method. This function sends LIN Break field, sync field then the ID with correct parity.

Parameters:

instance – LPUART instance
id – Frame Identifier

Returns:

An error code or lin_status_t

lin_status_t LIN_EnableIRQ(uint32_t instance)

Enables LIN hardware interrupts.

Parameters:

instance – LPUART instance

Returns:

An error code or lin_status_t

lin_status_t LIN_DisableIRQ(uint32_t instance)

Disables LIN hardware interrupts.

Parameters:

instance – LPUART instance

Returns:

An error code or lin_status_t

void LIN_IRQHandler(uint8_t instance)

Interrupt handler for LIN Hardware Interface.

Parameters:

instance – LPUART instance

lin_status_t LIN_AutoBaudCapture(uint32_t instance)

This function capture bits time to detect break char, calculate baudrate from sync bits and enable transceiver if autobaud successful. This function should only be used in Slave. The timer should be in mode input capture of both rising and falling edges. The timer input capture pin should be externally connected to RXD pin.

Parameters:

instance – LPUART instance

Returns:

lin_status_t

uint8_t LIN_ProcessParity(uint8_t PID, uint8_t typeAction)

Makes or checks parity bits. If action is checking parity, the function returns ID value if parity bits are correct or 0xFF if parity bits are incorrect. If action is making parity bits, then from input value of ID, the function returns PID. This is not a public API as it is called by other API functions.

Parameters:

PID – PID byte in case of checking parity bits or ID byte in case of making parity bits.
typeAction – 1 for Checking parity bits, 0 for making parity bits

Returns:

0xFF if parity bits are incorrect, ID in case of checking parity bits and they are correct. Function returns PID in case of making parity bits.

uint8_t LIN_MakeChecksumByte(const uint8_t *buffer, uint8_t sizeBuffer, uint8_t PID)

Makes the checksum byte for a frame.

Parameters:

buffer – Pointer to Tx buffer
sizeBuffer – Number of bytes that are contained in the buffer.
PID – Protected Identifier byte.

Returns:

the checksum byte.

FSL_LIN_DRIVER_VERSION: LIN driver version.

enum lin_frame_type

List of LIN frame types.

Values:

enumerator LIN_FRM_UNCD: unconditional frame

enumerator LIN_FRM_EVNT: event triggered frame

enumerator LIN_FRM_SPRDC: sporadic frame

enumerator LIN_FRM_DIAG: diagnostic frame

enum lin_frame_response

List of LIN frame response types.

Values:

enumerator LIN_RES_NOTHING: node is neither publisher nor subscriber

enumerator LIN_RES_PUB: node is publisher

enumerator LIN_RES_SUB: node is subscriber

enum lin_diagnostic_mode

Diagnostic mode.

Values:

enumerator DIAG_NONE: None

enumerator DIAG_INTERLEAVE_MODE: Interleave mode

enumerator DIAG_ONLY_MODE: Diagnostic only mode

enum lin_event_id_t

Defines types for an enumerating event related to an Identifier.

Values:

enumerator LIN_NO_EVENT: No event yet

enumerator LIN_WAKEUP_SIGNAL: Received a wakeup signal

enumerator LIN_BAUDRATE_ADJUSTED: Indicate that baudrate was adjusted to Master’s baudrate

enumerator LIN_RECV_BREAK_FIELD_OK: Indicate that correct Break Field was received

enumerator LIN_SYNC_OK: Sync byte is correct

enumerator LIN_SYNC_ERROR: Sync byte is incorrect

enumerator LIN_PID_OK: PID correct

enumerator LIN_PID_ERROR: PID incorrect

enumerator LIN_FRAME_ERROR: Framing Error

enumerator LIN_READBACK_ERROR: Readback data is incorrect

enumerator LIN_CHECKSUM_ERROR: Checksum byte is incorrect

enumerator LIN_TX_COMPLETED: Sending data completed

enumerator LIN_RX_COMPLETED: Receiving data completed

enumerator LIN_NO_DATA_TIMEOUT: No data timeout

enumerator LIN_BUS_ACTIVITY_TIMEOUT: Bus activity timeout

enumerator LIN_TIMEOUT_ERROR: Indicate that timeout has occurred

enumerator LIN_LAST_RESPONSE_SHORT_ERROR: Indicate that the last frame was too short

enum lin_status_t

Defines Error codes of the LIN driver.

Values:

enumerator LIN_IFC_NOT_SUPPORT: This interface is not supported

enumerator LIN_INITIALIZED: LIN Hardware has been initialized

enumerator LIN_SUCCESS: Successfully done

enumerator LIN_ERROR: Error

enumerator LIN_TX_BUSY: Transmitter is busy

enumerator LIN_RX_BUSY: Receiver is busy

enumerator LIN_BUS_BUSY: Bus is busy

enumerator LIN_NO_TRANSFER_IN_PROGRESS: No data transfer is in progress

enumerator LIN_TIMEOUT: Timeout

enumerator LIN_LPUART_STAT_CLOCK_GATED_OFF: LPUART is gated from clock manager

enum lin_node_state_t

Define type for an enumerating LIN Node state.

Values:

enumerator LIN_NODE_STATE_UNINIT: Uninitialized state

enumerator LIN_NODE_STATE_SLEEP_MODE: Sleep mode state

enumerator LIN_NODE_STATE_IDLE: Idle state

enumerator LIN_NODE_STATE_SEND_BREAK_FIELD: Send break field state

enumerator LIN_NODE_STATE_RECV_SYNC: Receive the synchronization byte state

enumerator LIN_NODE_STATE_SEND_PID: Send PID state

enumerator LIN_NODE_STATE_RECV_PID: Receive PID state

enumerator LIN_NODE_STATE_RECV_DATA: Receive data state

enumerator LIN_NODE_STATE_RECV_DATA_COMPLETED: Receive data completed state

enumerator LIN_NODE_STATE_SEND_DATA: Send data state

enumerator LIN_NODE_STATE_SEND_DATA_COMPLETED: Send data completed state

enum lin_protocol_handle

List of protocols.

Values:

enumerator LIN_PROTOCOL_21: LIN protocol version 2.1

enumerator LIN_PROTOCOL_J2602: J2602 protocol

enum lin_supported_baudrates_t

List of supported baudrates for autobaud feature.

Values:

enumerator kLIN_BAUD_2400

enumerator kLIN_BAUD_4800

enumerator kLIN_BAUD_9600

enumerator kLIN_BAUD_14400

enumerator kLIN_BAUD_19200

typedef void (*lin_timer_get_time_interval_t)(uint32_t *nanoSeconds): Callback function to get time interval in nano seconds.

typedef void (*lin_callback_t)(uint32_t instance, void *linState): LIN Driver callback function type.

LPUART_Type *const g_linLpuartBase[1]: Table of base addresses for LPUART instances.

const IRQn_Type g_linLpuartRxTxIrqId[1]: Table to save LPUART IRQ enumeration numbers defined in the CMSIS header file.

lin_baudrate_values_t g_linConfigBaudrates[5U]: Table to save LIN user config buadrate values.

lin_state_t *g_linStatePtr[1]

Pointers to LPUART bases for each instance.

Table to save LPUART state structure pointers

lin_user_config_t *g_linUserconfigPtr[1]: Table to save LIN user config structure pointers.

LIN_SLAVE

LIN_MASTER

MAKE_PARITY

CHECK_PARITY

LIN_TIME_OUT_UNIT_US

LIN_MAKE_UNCONDITIONAL_FRAME

LIN_UPDATE_UNCONDITIONAL_FRAME

LIN_NUM_OF_SUPP_BAUDRATES

struct lin_user_config_t

#include <fsl_lin.h>

LIN hardware configuration structure.

Public Members

uint8_t hardware_instance: interface instance number

uint32_t baudRate: baudrate of LIN Hardware Interface to configure

bool nodeFunction: Node function as Master or Slave

bool autobaudEnable: Enable Autobaud feature

lin_timer_get_time_interval_t timerGetTimeIntervalCallback: Callback function to get time interval in nano seconds

struct lin_state_t

#include <fsl_lin.h>

Runtime state of the LIN driver.

Note that the caller provides memory for the driver state structures during initialization because the driver does not statically allocate memory.

Public Members

const uint8_t *txBuff: The buffer of data being sent.

uint8_t *rxBuff: The buffer of received data.

uint8_t cntByte: To count number of bytes already transmitted or received.

volatile uint8_t txSize: The remaining number of bytes to be received.

volatile uint8_t rxSize: The remaining number of bytes to be received.

uint8_t checkSum: Checksum byte.

volatile bool isTxBusy: True if the LIN interface is transmitting frame data.

volatile bool isRxBusy: True if the LIN interface is receiving frame data.

volatile bool isBusBusy: True if there are data, frame headers being transferred on bus

volatile bool isTxBlocking: True if transmit is blocking transaction.

volatile bool isRxBlocking: True if receive is blocking transaction.

lin_callback_t Callback: Callback function to invoke after receiving a byte or transmitting a byte.

uint8_t currentId: Current ID

uint8_t currentPid: Current PID

volatile lin_event_id_t currentEventId: Current ID Event

volatile lin_node_state_t currentNodeState: Current Node state

volatile uint32_t timeoutCounter: Value of the timeout counter

volatile bool timeoutCounterFlag: Timeout counter flag

volatile bool baudrateEvalEnable: Baudrate Evaluation Process Enable

volatile uint8_t fallingEdgeInterruptCount: Falling Edge count of a sync byte

uint32_t linSourceClockFreq: Frequency of the source clock for LIN

volatile bool txCompleted: Used to wait for LIN interface ISR to complete transmission.

volatile bool rxCompleted: Used to wait for LIN interface ISR to complete reception

struct lin_baudrate_values_t: #include <fsl_lin.h>

Structure of baudrate properties.

struct lin_frame_struct

#include <fsl_lin.h>

Informations of frame.

Public Members

lin_frame_type frm_type: Frame information (unconditional or event triggered..)

uint8_t frm_len: Length of the frame

lin_frame_response frm_response: Action response when received PID

uint8_t frm_offset: Frame byte offset in frame buffer

uint8_t flag_offset: Flag byte offset in flag buffer

uint8_t flag_size: Flag size in flag buffer

uint32_t delay: Frame delay

const uint8_t *frame_data_ptr: List of Signal to which the frame is associated and its offset

struct lin_protocol_user_config_t

#include <fsl_lin.h>

Protocol configuration structure.

Public Members

lin_protocol_handle protocol_version: Protocol version

lin_protocol_handle language_version: Language version

uint8_t number_of_configurable_frames: Number of frame except diagnostic frames

uint8_t frame_start: Start index of frame list

const lin_frame_struct *frame_tbl_ptr: Frame list except diagnostic frames

const uint16_t *list_identifiers_ROM_ptr: Configuration in ROM

uint8_t *list_identifiers_RAM_ptr: Configuration in RAM

uint16_t max_idle_timeout_cnt: Max Idle timeout counter

uint16_t max_message_length: Max message length

struct lin_product_id

#include <fsl_lin.h>

Product id structure.

Public Members

uint16_t supplier_id: Supplier ID

uint16_t function_id: Function ID

uint8_t variant: Variant value

struct lin_serial_number

#include <fsl_lin.h>

Serial number.

Public Members

uint8_t serial_0: Serial 0

uint8_t serial_1: Serial 1

uint8_t serial_2: Serial 2

uint8_t serial_3: Serial 3

struct lin_protocol_state_t

#include <fsl_lin.h>

Protocol state structure.

Public Members

uint16_t baud_rate: Adjusted baud rate

uint8_t *response_buffer_ptr: Response buffer

uint8_t response_length: Response length

uint8_t successful_transfer: Sets when frame is transferred successfully

uint8_t error_in_response: Sets when frame received/transmitter by the node contains an error in the response field

uint8_t timeout_in_response: Timeout response

bool go_to_sleep_flg: Go to sleep flag

uint8_t current_id: Current PID

uint8_t num_of_processed_frame: Number of processed frames

uint8_t num_of_successfull_frame: Number of processed frames

uint8_t next_transmit_tick: Used to count the next transmit tick

bool save_config_flg: Set when save configuration request has been received

lin_diagnostic_mode diagnostic_mode: Diagnostic mode

uint16_t frame_timeout_cnt: Frame timeout counter

uint16_t idle_timeout_cnt: Idle timeout counter, node will go to sleep when count down to 0

bool transmit_error_resp_sig_flg: Flag indicates that the error response signal is going to be sent

bool event_trigger_collision_flg: Flag indicates collision on bus

struct lin_node_attribute

#include <fsl_lin.h>

Attributes of LIN node.

Public Members

uint8_t *configured_NAD_ptr: NAD value used in configuration command

uint8_t initial_NAD: Initial NAD

lin_product_id product_id: Product ID

lin_serial_number serial_number: Serial number

uint8_t *resp_err_frm_id_ptr: Pointer to the list of index of frames that carries response error signal

uint8_t num_frame_have_esignal: The count of frames that carry response error signal

uint8_t response_error_byte_offset: Byte offset of response error signal

uint8_t response_error_bit_offset: Bit offset of response error signal

uint8_t num_of_fault_state_signal: Number of Fault state signal

uint16_t P2_min: P2 min

uint16_t ST_min: ST min

uint16_t N_As_timeout: N_As_timeout

uint16_t N_Cr_timeout: N_Cr_timeout

struct lin_master_data_t

#include <fsl_lin.h>

LIN master data structure.

Public Members

uint8_t active_schedule_id: Active schedule table id

uint8_t previous_schedule_id: Previous schedule table id

uint8_t *schedule_start_entry_ptr: Start entry of each schedule table

uint8_t data_buffer[8]: Master data buffer

LIN LPUART Driver#

FSL_LIN_LPUART_DRIVER_VERSION: LIN LPUART driver version.

enum _lin_lpuart_stop_bit_count

Values:

enumerator kLPUART_OneStopBit: One stop bit

enumerator kLPUART_TwoStopBit: Two stop bits

enum _lin_lpuart_flags

Values:

enumerator kLPUART_TxDataRegEmptyFlag: Transmit data register empty flag, sets when transmit buffer is empty

enumerator kLPUART_TransmissionCompleteFlag: Transmission complete flag, sets when transmission activity complete

enumerator kLPUART_RxDataRegFullFlag: Receive data register full flag, sets when the receive data buffer is full

enumerator kLPUART_IdleLineFlag: Idle line detect flag, sets when idle line detected

enumerator kLPUART_RxOverrunFlag: Receive Overrun, sets when new data is received before data is read from receive register

enumerator kLPUART_NoiseErrorFlag: Receive takes 3 samples of each received bit. If any of these samples differ, noise flag sets

enumerator kLPUART_FramingErrorFlag: Frame error flag, sets if logic 0 was detected where stop bit expected

enumerator kLPUART_ParityErrorFlag: If parity enabled, sets upon parity error detection

enumerator kLPUART_LinBreakFlag: LIN break detect interrupt flag, sets when LIN break char detected and LIN circuit enabled

enumerator kLPUART_RxActiveEdgeFlag: Receive pin active edge interrupt flag, sets when active edge detected

enumerator kLPUART_RxActiveFlag: Receiver Active Flag (RAF), sets at beginning of valid start bit

enumerator kLPUART_DataMatch1Flag: The next character to be read from LPUART_DATA matches MA1

enumerator kLPUART_DataMatch2Flag: The next character to be read from LPUART_DATA matches MA2

enumerator kLPUART_NoiseErrorInRxDataRegFlag: NOISY bit, sets if noise detected in current data word

enumerator kLPUART_ParityErrorInRxDataRegFlag: PARITY bit, sets if noise detected in current data word

enumerator kLPUART_TxFifoEmptyFlag: TXEMPT bit, sets if transmit buffer is empty

enumerator kLPUART_RxFifoEmptyFlag: RXEMPT bit, sets if receive buffer is empty

enumerator kLPUART_TxFifoOverflowFlag: TXOF bit, sets if transmit buffer overflow occurred

enumerator kLPUART_RxFifoUnderflowFlag: RXUF bit, sets if receive buffer underflow occurred

enum _lin_lpuart_interrupt_enable

Values:

enumerator kLPUART_LinBreakInterruptEnable: LIN break detect.

enumerator kLPUART_RxActiveEdgeInterruptEnable: Receive Active Edge.

enumerator kLPUART_TxDataRegEmptyInterruptEnable: Transmit data register empty.

enumerator kLPUART_TransmissionCompleteInterruptEnable: Transmission complete.

enumerator kLPUART_RxDataRegFullInterruptEnable: Receiver data register full.

enumerator kLPUART_IdleLineInterruptEnable: Idle line.

enumerator kLPUART_RxOverrunInterruptEnable: Receiver Overrun.

enumerator kLPUART_NoiseErrorInterruptEnable: Noise error flag.

enumerator kLPUART_FramingErrorInterruptEnable: Framing error flag.

enumerator kLPUART_ParityErrorInterruptEnable: Parity error flag.

enumerator kLPUART_TxFifoOverflowInterruptEnable: Transmit FIFO Overflow.

enumerator kLPUART_RxFifoUnderflowInterruptEnable: Receive FIFO Underflow.

enum _lin_lpuart_status

Values:

enumerator kStatus_LPUART_TxBusy: TX busy

enumerator kStatus_LPUART_RxBusy: RX busy

enumerator kStatus_LPUART_TxIdle: LPUART transmitter is idle.

enumerator kStatus_LPUART_RxIdle: LPUART receiver is idle.

enumerator kStatus_LPUART_TxWatermarkTooLarge: TX FIFO watermark too large

enumerator kStatus_LPUART_RxWatermarkTooLarge: RX FIFO watermark too large

enumerator kStatus_LPUART_FlagCannotClearManually: Some flag can’t manually clear

enumerator kStatus_LPUART_Error: Error happens on LPUART.

enumerator kStatus_LPUART_RxRingBufferOverrun: LPUART RX software ring buffer overrun.

enumerator kStatus_LPUART_RxHardwareOverrun: LPUART RX receiver overrun.

enumerator kStatus_LPUART_NoiseError: LPUART noise error.

enumerator kStatus_LPUART_FramingError: LPUART framing error.

enumerator kStatus_LPUART_ParityError: LPUART parity error.

enum lin_lpuart_bit_count_per_char_t

Values:

enumerator LPUART_8_BITS_PER_CHAR: 8-bit data characters

enumerator LPUART_9_BITS_PER_CHAR: 9-bit data characters

enumerator LPUART_10_BITS_PER_CHAR: 10-bit data characters

typedef enum _lin_lpuart_stop_bit_count lin_lpuart_stop_bit_count_t

static inline bool LIN_LPUART_GetRxDataPolarity(const LPUART_Type *base)

static inline void LIN_LPUART_SetRxDataPolarity(LPUART_Type *base, bool polarity)

static inline void LIN_LPUART_WriteByte(LPUART_Type *base, uint8_t data)

static inline void LIN_LPUART_ReadByte(const LPUART_Type *base, uint8_t *readData)

status_t LIN_LPUART_CalculateBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz, uint32_t *osr, uint16_t *sbr)

Calculates the best osr and sbr value for configured baudrate.

Parameters:

base – LPUART peripheral base address
baudRate_Bps – user configuration structure of type lin_user_config_t
srcClock_Hz – pointer to the LIN_LPUART driver state structure
osr – pointer to osr value
sbr – pointer to sbr value

Returns:

An error code or lin_status_t

void LIN_LPUART_SetBaudRate(LPUART_Type *base, uint32_t *osr, uint16_t *sbr)

Configure baudrate according to osr and sbr value.

Parameters:

base – LPUART peripheral base address
osr – pointer to osr value
sbr – pointer to sbr value

lin_status_t LIN_LPUART_Init(LPUART_Type *base, lin_user_config_t *linUserConfig, lin_state_t *linCurrentState, uint32_t linSourceClockFreq)

Initializes an LIN_LPUART instance for LIN Network.

The caller provides memory for the driver state structures during initialization. The user must select the LIN_LPUART clock source in the application to initialize the LIN_LPUART. This function initializes a LPUART instance for operation. This function will initialize the run-time state structure to keep track of the on-going transfers, initialize the module to user defined settings and default settings, set break field length to be 13 bit times minimum, enable the break detect interrupt, Rx complete interrupt, frame error detect interrupt, and enable the LPUART module transmitter and receiver

Parameters:

base – LPUART peripheral base address
linUserConfig – user configuration structure of type lin_user_config_t
linCurrentState – pointer to the LIN_LPUART driver state structure
linSourceClockFreq – LIN source clock frequency in Hz

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_Deinit(LPUART_Type *base)

Shuts down the LIN_LPUART by disabling interrupts and transmitter/receiver.

Parameters:

base – LPUART peripheral base address

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_SendFrameDataBlocking(LPUART_Type *base, const uint8_t *txBuff, uint8_t txSize, uint32_t timeoutMSec)

Sends Frame data out through the LIN_LPUART module using blocking method. This function will calculate the checksum byte and send it with the frame data. Blocking means that the function does not return until the transmission is complete.

Parameters:

base – LPUART peripheral base address
txBuff – source buffer containing 8-bit data chars to send
txSize – the number of bytes to send
timeoutMSec – timeout value in milli seconds

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_SendFrameData(LPUART_Type *base, const uint8_t *txBuff, uint8_t txSize)

Sends frame data out through the LIN_LPUART module using non-blocking method. This enables an a-sync method for transmitting data. Non-blocking means that the function returns immediately. The application has to get the transmit status to know when the transmit is complete. This function will calculate the checksum byte and send it with the frame data.

Parameters:

base – LPUART peripheral base address
txBuff – source buffer containing 8-bit data chars to send
txSize – the number of bytes to send

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_GetTransmitStatus(LPUART_Type *base, uint8_t *bytesRemaining)

Get status of an on-going non-blocking transmission While sending frame data using non-blocking method, users can use this function to get status of that transmission. This function return LIN_TX_BUSY while sending, or LIN_TIMEOUT if timeout has occurred, or return LIN_SUCCESS when the transmission is complete. The bytesRemaining shows number of bytes that still needed to transmit.

Parameters:

base – LPUART peripheral base address
bytesRemaining – Number of bytes still needed to transmit

Returns:

lin_status_t LIN_TX_BUSY, LIN_SUCCESS or LIN_TIMEOUT

lin_status_t LIN_LPUART_RecvFrmDataBlocking(LPUART_Type *base, uint8_t *rxBuff, uint8_t rxSize, uint32_t timeoutMSec)

Receives frame data through the LIN_LPUART module using blocking method. This function will check the checksum byte. If the checksum is correct, it will receive the frame data. Blocking means that the function does not return until the reception is complete.

Parameters:

base – LPUART peripheral base address
rxBuff – buffer containing 8-bit received data
rxSize – the number of bytes to receive
timeoutMSec – timeout value in milli seconds

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_RecvFrmData(LPUART_Type *base, uint8_t *rxBuff, uint8_t rxSize)

Receives frame data through the LIN_LPUART module using non-blocking method. This function will check the checksum byte. If the checksum is correct, it will receive it with the frame data. Non-blocking means that the function returns immediately. The application has to get the receive status to know when the reception is complete.

Parameters:

base – LPUART peripheral base address
rxBuff – buffer containing 8-bit received data
rxSize – the number of bytes to receive

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_AbortTransferData(LPUART_Type *base)

Aborts an on-going non-blocking transmission/reception. While performing a non-blocking transferring data, users can call this function to terminate immediately the transferring.

Parameters:

base – LPUART peripheral base address

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_GetReceiveStatus(LPUART_Type *base, uint8_t *bytesRemaining)

Parameters:

base – LPUART peripheral base address
bytesRemaining – Number of bytes still needed to receive

Returns:

lin_status_t LIN_RX_BUSY, LIN_TIMEOUT or LIN_SUCCESS

lin_status_t LIN_LPUART_GoToSleepMode(LPUART_Type *base)

This function puts current node to sleep mode This function changes current node state to LIN_NODE_STATE_SLEEP_MODE.

Parameters:

base – LPUART peripheral base address

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_GotoIdleState(LPUART_Type *base)

Puts current LIN node to Idle state This function changes current node state to LIN_NODE_STATE_IDLE.

Parameters:

base – LPUART peripheral base address

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_SendWakeupSignal(LPUART_Type *base)

Sends a wakeup signal through the LIN_LPUART interface.

Parameters:

base – LPUART peripheral base address

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_MasterSendHeader(LPUART_Type *base, uint8_t id)

Sends frame header out through the LIN_LPUART module using a non-blocking method. This function sends LIN Break field, sync field then the ID with correct parity.

Parameters:

base – LPUART peripheral base address
id – Frame Identifier

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_EnableIRQ(LPUART_Type *base)

Enables LIN_LPUART hardware interrupts.

Parameters:

base – LPUART peripheral base address

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_DisableIRQ(LPUART_Type *base)

Disables LIN_LPUART hardware interrupts.

Parameters:

base – LPUART peripheral base address

Returns:

An error code or lin_status_t

lin_status_t LIN_LPUART_AutoBaudCapture(uint32_t instance)

Parameters:

instance – LPUART instance

Returns:

lin_status_t

void LIN_LPUART_IRQHandler(LPUART_Type *base)

LIN_LPUART RX TX interrupt handler.

Parameters:

base – LPUART peripheral base address

LIN_LPUART_TRANSMISSION_COMPLETE_TIMEOUT

Max loops to wait for LPUART transmission complete.

When de-initializing the LIN LPUART module, the program shall wait for the previous transmission to complete. This parameter defines how many loops to check completion before return error. If defined as 0, driver will wait forever until completion.

AUTOBAUD_BAUDRATE_TOLERANCE

BIT_RATE_TOLERANCE_UNSYNC

BIT_DURATION_MAX_19200

BIT_DURATION_MIN_19200

BIT_DURATION_MAX_14400

BIT_DURATION_MIN_14400

BIT_DURATION_MAX_9600

BIT_DURATION_MIN_9600

BIT_DURATION_MAX_4800

BIT_DURATION_MIN_4800

BIT_DURATION_MAX_2400

BIT_DURATION_MIN_2400

TWO_BIT_DURATION_MAX_19200

TWO_BIT_DURATION_MIN_19200

TWO_BIT_DURATION_MAX_14400

TWO_BIT_DURATION_MIN_14400

TWO_BIT_DURATION_MAX_9600

TWO_BIT_DURATION_MIN_9600

TWO_BIT_DURATION_MAX_4800

TWO_BIT_DURATION_MIN_4800

TWO_BIT_DURATION_MAX_2400

TWO_BIT_DURATION_MIN_2400

AUTOBAUD_BREAK_TIME_MIN

LPADC: 12-bit SAR Analog-to-Digital Converter Driver#

enum _lpadc_status_flags

Define hardware flags of the module.

Values:

enumerator kLPADC_ResultFIFO0OverflowFlag: Indicates that more data has been written to the Result FIFO 0 than it can hold.

enumerator kLPADC_ResultFIFO0ReadyFlag: Indicates when the number of valid datawords in the result FIFO 0 is greater than the setting watermark level.

enumerator kLPADC_TriggerExceptionFlag: Indicates that a trigger exception event has occurred.

enumerator kLPADC_TriggerCompletionFlag: Indicates that a trigger completion event has occurred.

enumerator kLPADC_CalibrationReadyFlag: Indicates that the calibration process is done.

enumerator kLPADC_ActiveFlag: Indicates that the ADC is in active state.

enumerator kLPADC_ResultFIFOOverflowFlag: To compilitable with old version, do not recommend using this, please use kLPADC_ResultFIFO0OverflowFlag as instead.

enumerator kLPADC_ResultFIFOReadyFlag: To compilitable with old version, do not recommend using this, please use kLPADC_ResultFIFO0ReadyFlag as instead.

enum _lpadc_interrupt_enable

Define interrupt switchers of the module.

Note: LPADC of different chips supports different number of trigger sources, please check the Reference Manual for details.

Values:

enumerator kLPADC_ResultFIFO0OverflowInterruptEnable: Configures ADC to generate overflow interrupt requests when FOF0 flag is asserted.

enumerator kLPADC_FIFO0WatermarkInterruptEnable: Configures ADC to generate watermark interrupt requests when RDY0 flag is asserted.

enumerator kLPADC_ResultFIFOOverflowInterruptEnable: To compilitable with old version, do not recommend using this, please use kLPADC_ResultFIFO0OverflowInterruptEnable as instead.

enumerator kLPADC_FIFOWatermarkInterruptEnable: To compilitable with old version, do not recommend using this, please use kLPADC_FIFO0WatermarkInterruptEnable as instead.

enumerator kLPADC_TriggerExceptionInterruptEnable: Configures ADC to generate trigger exception interrupt.

enumerator kLPADC_Trigger0CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 0 completion.

enumerator kLPADC_Trigger1CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 1 completion.

enumerator kLPADC_Trigger2CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 2 completion.

enumerator kLPADC_Trigger3CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 3 completion.

enumerator kLPADC_Trigger4CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 4 completion.

enumerator kLPADC_Trigger5CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 5 completion.

enumerator kLPADC_Trigger6CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 6 completion.

enumerator kLPADC_Trigger7CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 7 completion.

enumerator kLPADC_Trigger8CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 8 completion.

enumerator kLPADC_Trigger9CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 9 completion.

enumerator kLPADC_Trigger10CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 10 completion.

enumerator kLPADC_Trigger11CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 11 completion.

enumerator kLPADC_Trigger12CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 12 completion.

enumerator kLPADC_Trigger13CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 13 completion.

enumerator kLPADC_Trigger14CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 14 completion.

enumerator kLPADC_Trigger15CompletionInterruptEnable: Configures ADC to generate interrupt when trigger 15 completion.

enum _lpadc_trigger_status_flags

The enumerator of lpadc trigger status flags, including interrupted flags and completed flags.

Note: LPADC of different chips supports different number of trigger sources, please check the Reference Manual for details.

Values:

enumerator kLPADC_Trigger0InterruptedFlag: Trigger 0 is interrupted by a high priority exception.

enumerator kLPADC_Trigger1InterruptedFlag: Trigger 1 is interrupted by a high priority exception.

enumerator kLPADC_Trigger2InterruptedFlag: Trigger 2 is interrupted by a high priority exception.

enumerator kLPADC_Trigger3InterruptedFlag: Trigger 3 is interrupted by a high priority exception.

enumerator kLPADC_Trigger4InterruptedFlag: Trigger 4 is interrupted by a high priority exception.

enumerator kLPADC_Trigger5InterruptedFlag: Trigger 5 is interrupted by a high priority exception.

enumerator kLPADC_Trigger6InterruptedFlag: Trigger 6 is interrupted by a high priority exception.

enumerator kLPADC_Trigger7InterruptedFlag: Trigger 7 is interrupted by a high priority exception.

enumerator kLPADC_Trigger8InterruptedFlag: Trigger 8 is interrupted by a high priority exception.

enumerator kLPADC_Trigger9InterruptedFlag: Trigger 9 is interrupted by a high priority exception.

enumerator kLPADC_Trigger10InterruptedFlag: Trigger 10 is interrupted by a high priority exception.

enumerator kLPADC_Trigger11InterruptedFlag: Trigger 11 is interrupted by a high priority exception.

enumerator kLPADC_Trigger12InterruptedFlag: Trigger 12 is interrupted by a high priority exception.

enumerator kLPADC_Trigger13InterruptedFlag: Trigger 13 is interrupted by a high priority exception.

enumerator kLPADC_Trigger14InterruptedFlag: Trigger 14 is interrupted by a high priority exception.

enumerator kLPADC_Trigger15InterruptedFlag: Trigger 15 is interrupted by a high priority exception.

enumerator kLPADC_Trigger0CompletedFlag: Trigger 0 is completed and trigger 0 has enabled completion interrupts.

enumerator kLPADC_Trigger1CompletedFlag: Trigger 1 is completed and trigger 1 has enabled completion interrupts.

enumerator kLPADC_Trigger2CompletedFlag: Trigger 2 is completed and trigger 2 has enabled completion interrupts.

enumerator kLPADC_Trigger3CompletedFlag: Trigger 3 is completed and trigger 3 has enabled completion interrupts.

enumerator kLPADC_Trigger4CompletedFlag: Trigger 4 is completed and trigger 4 has enabled completion interrupts.

enumerator kLPADC_Trigger5CompletedFlag: Trigger 5 is completed and trigger 5 has enabled completion interrupts.

enumerator kLPADC_Trigger6CompletedFlag: Trigger 6 is completed and trigger 6 has enabled completion interrupts.

enumerator kLPADC_Trigger7CompletedFlag: Trigger 7 is completed and trigger 7 has enabled completion interrupts.

enumerator kLPADC_Trigger8CompletedFlag: Trigger 8 is completed and trigger 8 has enabled completion interrupts.

enumerator kLPADC_Trigger9CompletedFlag: Trigger 9 is completed and trigger 9 has enabled completion interrupts.

enumerator kLPADC_Trigger10CompletedFlag: Trigger 10 is completed and trigger 10 has enabled completion interrupts.

enumerator kLPADC_Trigger11CompletedFlag: Trigger 11 is completed and trigger 11 has enabled completion interrupts.

enumerator kLPADC_Trigger12CompletedFlag: Trigger 12 is completed and trigger 12 has enabled completion interrupts.

enumerator kLPADC_Trigger13CompletedFlag: Trigger 13 is completed and trigger 13 has enabled completion interrupts.

enumerator kLPADC_Trigger14CompletedFlag: Trigger 14 is completed and trigger 14 has enabled completion interrupts.

enumerator kLPADC_Trigger15CompletedFlag: Trigger 15 is completed and trigger 15 has enabled completion interrupts.

enum _lpadc_sample_scale_mode

Define enumeration of sample scale mode.

The sample scale mode is used to reduce the selected ADC analog channel input voltage level by a factor. The maximum possible voltage on the ADC channel input should be considered when selecting a scale mode to ensure that the reducing factor always results voltage level at or below the VREFH reference. This reducing capability allows conversion of analog inputs higher than VREFH. A-side and B-side channel inputs are both scaled using the scale mode.

Values:

enumerator kLPADC_SamplePartScale: Use divided input voltage signal. (For scale select,please refer to the reference manual).

enumerator kLPADC_SampleFullScale: Full scale (Factor of 1).

enum _lpadc_sample_channel_mode

Define enumeration of channel sample mode.

The channel sample mode configures the channel with single-end/differential/dual-single-end, side A/B.

Values:

enumerator kLPADC_SampleChannelSingleEndSideA: Single-end mode, only A-side channel is converted.

enumerator kLPADC_SampleChannelSingleEndSideB: Single-end mode, only B-side channel is converted.

enumerator kLPADC_SampleChannelDiffBothSideAB: Differential mode, the ADC result is (CHnA-CHnB).

enumerator kLPADC_SampleChannelDiffBothSideBA: Differential mode, the ADC result is (CHnB-CHnA).

enumerator kLPADC_SampleChannelDiffBothSide: Differential mode, the ADC result is (CHnA-CHnB).

enumerator kLPADC_SampleChannelDualSingleEndBothSide: Dual-Single-Ended Mode. Both A side and B side channels are converted independently.

enum _lpadc_hardware_average_mode

Define enumeration of hardware average selection.

It Selects how many ADC conversions are averaged to create the ADC result. An internal storage buffer is used to capture temporary results while the averaging iterations are executed.

Note

Some enumerator values are not available on some devices, mainly depends on the size of AVGS field in CMDH register.

Values:

enumerator kLPADC_HardwareAverageCount1: Single conversion.

enumerator kLPADC_HardwareAverageCount2: 2 conversions averaged.

enumerator kLPADC_HardwareAverageCount4: 4 conversions averaged.

enumerator kLPADC_HardwareAverageCount8: 8 conversions averaged.

enumerator kLPADC_HardwareAverageCount16: 16 conversions averaged.

enumerator kLPADC_HardwareAverageCount32: 32 conversions averaged.

enumerator kLPADC_HardwareAverageCount64: 64 conversions averaged.

enumerator kLPADC_HardwareAverageCount128: 128 conversions averaged.

enum _lpadc_sample_time_mode

Define enumeration of sample time selection.

The shortest sample time maximizes conversion speed for lower impedance inputs. Extending sample time allows higher impedance inputs to be accurately sampled. Longer sample times can also be used to lower overall power consumption when command looping and sequencing is configured and high conversion rates are not required.

Values:

enumerator kLPADC_SampleTimeADCK3: 3 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK5: 5 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK7: 7 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK11: 11 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK19: 19 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK35: 35 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK67: 69 ADCK cycles total sample time.

enumerator kLPADC_SampleTimeADCK131: 131 ADCK cycles total sample time.

enum _lpadc_hardware_compare_mode

Define enumeration of hardware compare mode.

After an ADC channel input is sampled and converted and any averaging iterations are performed, this mode setting guides operation of the automatic compare function to optionally only store when the compare operation is true. When compare is enabled, the conversion result is compared to the compare values.

Values:

enumerator kLPADC_HardwareCompareDisabled: Compare disabled.

enumerator kLPADC_HardwareCompareStoreOnTrue: Compare enabled. Store on true.

enumerator kLPADC_HardwareCompareRepeatUntilTrue: Compare enabled. Repeat channel acquisition until true.

enum _lpadc_conversion_resolution_mode

Define enumeration of conversion resolution mode.

Configure the resolution bit in specific conversion type. For detailed resolution accuracy, see to lpadc_sample_channel_mode_t

Values:

enumerator kLPADC_ConversionResolutionStandard: Standard resolution. Single-ended 12-bit conversion, Differential 13-bit conversion with 2’s complement output.

enumerator kLPADC_ConversionResolutionHigh: High resolution. Single-ended 16-bit conversion; Differential 16-bit conversion with 2’s complement output.

enum _lpadc_conversion_average_mode

Define enumeration of conversion averages mode.

Configure the converion average number for auto-calibration.

Note

Some enumerator values are not available on some devices, mainly depends on the size of CAL_AVGS field in CTRL register.

Values:

enumerator kLPADC_ConversionAverage1: Single conversion.

enumerator kLPADC_ConversionAverage2: 2 conversions averaged.

enumerator kLPADC_ConversionAverage4: 4 conversions averaged.

enumerator kLPADC_ConversionAverage8: 8 conversions averaged.

enumerator kLPADC_ConversionAverage16: 16 conversions averaged.

enumerator kLPADC_ConversionAverage32: 32 conversions averaged.

enumerator kLPADC_ConversionAverage64: 64 conversions averaged.

enumerator kLPADC_ConversionAverage128: 128 conversions averaged.

enumerator kLPADC_ConversionAverageMax

enum _lpadc_reference_voltage_mode

Define enumeration of reference voltage source.

For detail information, need to check the SoC’s specification.

Values:

enumerator kLPADC_ReferenceVoltageAlt1: Option 1 setting.

enumerator kLPADC_ReferenceVoltageAlt2: Option 2 setting.

enumerator kLPADC_ReferenceVoltageAlt3: Option 3 setting.

enum _lpadc_power_level_mode

Define enumeration of power configuration.

Configures the ADC for power and performance. In the highest power setting the highest conversion rates will be possible. Refer to the device data sheet for power and performance capabilities for each setting.

Values:

enumerator kLPADC_PowerLevelAlt1: Lowest power setting.

enumerator kLPADC_PowerLevelAlt2: Next lowest power setting.

enumerator kLPADC_PowerLevelAlt3: …

enumerator kLPADC_PowerLevelAlt4: Highest power setting.

enum _lpadc_offset_calibration_mode

Define enumeration of offset calibration mode.

Values:

enumerator kLPADC_OffsetCalibration12bitMode: 12 bit offset calibration mode.

enumerator kLPADC_OffsetCalibration16bitMode: 16 bit offset calibration mode.

enum _lpadc_trigger_priority_policy

Define enumeration of trigger priority policy.

This selection controls how higher priority triggers are handled.

Note

kLPADC_TriggerPriorityPreemptSubsequently is not available on some devices, mainly depends on the size of TPRICTRL field in CFG register.

Values:

enumerator kLPADC_ConvPreemptImmediatelyNotAutoResumed: If a higher priority trigger is detected during command processing, the current conversion is aborted and the new command specified by the trigger is started, when higher priority conversion finishes, the preempted conversion is not automatically resumed or restarted.

enumerator kLPADC_ConvPreemptSoftlyNotAutoResumed: If a higher priority trigger is received during command processing, the current conversion is completed (including averaging iterations and compare function if enabled) and stored to the result FIFO before the higher priority trigger/command is initiated, when higher priority conversion finishes, the preempted conversion is not resumed or restarted.

enumerator kLPADC_ConvPreemptImmediatelyAutoRestarted: If a higher priority trigger is detected during command processing, the current conversion is aborted and the new command specified by the trigger is started, when higher priority conversion finishes, the preempted conversion will automatically be restarted.

enumerator kLPADC_ConvPreemptSoftlyAutoRestarted: If a higher priority trigger is received during command processing, the current conversion is completed (including averaging iterations and compare function if enabled) and stored to the result FIFO before the higher priority trigger/command is initiated, when higher priority conversion finishes, the preempted conversion will automatically be restarted.

enumerator kLPADC_ConvPreemptImmediatelyAutoResumed: If a higher priority trigger is detected during command processing, the current conversion is aborted and the new command specified by the trigger is started, when higher priority conversion finishes, the preempted conversion will automatically be resumed.

enumerator kLPADC_ConvPreemptSoftlyAutoResumed: If a higher priority trigger is received during command processing, the current conversion is completed (including averaging iterations and compare function if enabled) and stored to the result FIFO before the higher priority trigger/command is initiated, when higher priority conversion finishes, the preempted conversion will be automatically be resumed.

enumerator kLPADC_TriggerPriorityPreemptImmediately: Legacy support is not recommended as it only ensures compatibility with older versions.

enumerator kLPADC_TriggerPriorityPreemptSoftly: Legacy support is not recommended as it only ensures compatibility with older versions.

enumerator kLPADC_TriggerPriorityExceptionDisabled: High priority trigger exception disabled.

enum _lpadc_tune_value

Define enumeration of tune value.

Values:

enumerator kLPADC_TuneValue0: Tune value 0.

enumerator kLPADC_TuneValue1: Tune value 1.

enumerator kLPADC_TuneValue2: Tune value 2.

enumerator kLPADC_TuneValue3: Tune value 3.

typedef enum _lpadc_sample_scale_mode lpadc_sample_scale_mode_t

Define enumeration of sample scale mode.

typedef enum _lpadc_sample_channel_mode lpadc_sample_channel_mode_t

Define enumeration of channel sample mode.

The channel sample mode configures the channel with single-end/differential/dual-single-end, side A/B.

typedef enum _lpadc_hardware_average_mode lpadc_hardware_average_mode_t

Define enumeration of hardware average selection.

It Selects how many ADC conversions are averaged to create the ADC result. An internal storage buffer is used to capture temporary results while the averaging iterations are executed.

Note

Some enumerator values are not available on some devices, mainly depends on the size of AVGS field in CMDH register.

typedef enum _lpadc_sample_time_mode lpadc_sample_time_mode_t

Define enumeration of sample time selection.

typedef enum _lpadc_hardware_compare_mode lpadc_hardware_compare_mode_t

Define enumeration of hardware compare mode.

typedef enum _lpadc_conversion_resolution_mode lpadc_conversion_resolution_mode_t

Define enumeration of conversion resolution mode.

Configure the resolution bit in specific conversion type. For detailed resolution accuracy, see to lpadc_sample_channel_mode_t

typedef enum _lpadc_conversion_average_mode lpadc_conversion_average_mode_t

Define enumeration of conversion averages mode.

Configure the converion average number for auto-calibration.

Note

Some enumerator values are not available on some devices, mainly depends on the size of CAL_AVGS field in CTRL register.

typedef enum _lpadc_reference_voltage_mode lpadc_reference_voltage_source_t

Define enumeration of reference voltage source.

For detail information, need to check the SoC’s specification.

typedef enum _lpadc_power_level_mode lpadc_power_level_mode_t

Define enumeration of power configuration.

typedef enum _lpadc_offset_calibration_mode lpadc_offset_calibration_mode_t: Define enumeration of offset calibration mode.

typedef enum _lpadc_trigger_priority_policy lpadc_trigger_priority_policy_t

Define enumeration of trigger priority policy.

This selection controls how higher priority triggers are handled.

Note

kLPADC_TriggerPriorityPreemptSubsequently is not available on some devices, mainly depends on the size of TPRICTRL field in CFG register.

typedef enum _lpadc_tune_value lpadc_tune_value_t: Define enumeration of tune value.

typedef struct _lpadc_calibration_value lpadc_calibration_value_t: A structure of calibration value.

LPADC_CONVERSION_COMPLETE_TIMEOUT

Max loops to wait for LPADC conversion complete.

When doing calibration, driver will wait for the completion of conversion. This parameter defines how many loops to check completion before return timeout. If defined as 0, driver will wait forever until completion.

LPADC_CALIBRATION_READY_TIMEOUT

Max loops to wait for LPADC calibration ready.

Before doing calibration, driver will wait for the calibration ready. This parameter defines how many loops to check the calibration ready. If defined as 0, driver will wait forever until ready.

LPADC_GAIN_CAL_READY_TIMEOUT

Max loops to wait for LPADC gain calibration GAIN_CAL ready.

Before doing calibration, driver will wait for the gain calibration GAIN_CAL ready. This parameter defines how many loops to check the gain calibration GAIN_CAL ready. If defined as 0, driver will wait forever until ready.

ADC_OFSTRIM_OFSTRIM_MAX

ADC_OFSTRIM_OFSTRIM_SIGN

LPADC_GET_ACTIVE_COMMAND_STATUS(statusVal)

Define the MACRO function to get command status from status value.

The statusVal is the return value from LPADC_GetStatusFlags().

LPADC_GET_ACTIVE_TRIGGER_STATUE(statusVal)

Define the MACRO function to get trigger status from status value.

The statusVal is the return value from LPADC_GetStatusFlags().

void LPADC_Init(ADC_Type *base, const lpadc_config_t *config)

Initializes the LPADC module.

Parameters:

base – LPADC peripheral base address.
config – Pointer to configuration structure. See “lpadc_config_t”.

void LPADC_GetDefaultConfig(lpadc_config_t *config)

Gets an available pre-defined settings for initial configuration.

This function initializes the converter configuration structure with an available settings. The default values are:

config->enableInDozeMode        = true;
config->enableAnalogPreliminary = false;
config->powerUpDelay            = 0x80;
config->referenceVoltageSource  = kLPADC_ReferenceVoltageAlt1;
config->powerLevelMode          = kLPADC_PowerLevelAlt1;
config->triggerPriorityPolicy   = kLPADC_TriggerPriorityPreemptImmediately;
config->enableConvPause         = false;
config->convPauseDelay          = 0U;
config->FIFOWatermark           = 0U;

Parameters:

config – Pointer to configuration structure.

void LPADC_Deinit(ADC_Type *base)

De-initializes the LPADC module.

Parameters:

base – LPADC peripheral base address.

static inline void LPADC_Enable(ADC_Type *base, bool enable)

Switch on/off the LPADC module.

Parameters:

base – LPADC peripheral base address.
enable – switcher to the module.

static inline void LPADC_DoResetFIFO(ADC_Type *base)

Do reset the conversion FIFO.

Parameters:

base – LPADC peripheral base address.

static inline void LPADC_DoResetConfig(ADC_Type *base)

Do reset the module’s configuration.

Reset all ADC internal logic and registers, except the Control Register (ADCx_CTRL).

Parameters:

base – LPADC peripheral base address.

static inline uint32_t LPADC_GetStatusFlags(ADC_Type *base)

Get status flags.

Parameters:

base – LPADC peripheral base address.

Returns:

status flags’ mask. See to _lpadc_status_flags.

static inline void LPADC_ClearStatusFlags(ADC_Type *base, uint32_t mask)

Clear status flags.

Only the flags can be cleared by writing ADCx_STATUS register would be cleared by this API.

Parameters:

base – LPADC peripheral base address.
mask – Mask value for flags to be cleared. See to _lpadc_status_flags.

static inline uint32_t LPADC_GetTriggerStatusFlags(ADC_Type *base)

Get trigger status flags to indicate which trigger sequences have been completed or interrupted by a high priority trigger exception.

Note

On some devices, the trigger completion status may be asserted before the final command in a chained trigger sequence starts to execute. When using chained commands, do not rely on trigger completion status alone to guarantee that all conversion results are already available in the FIFO. Use FIFO ready indication together with result tags, or stall the last command with WAIT_TRIG when that sequencing model is acceptable for the application.

Parameters:

base – LPADC peripheral base address.

Returns:

The OR’ed value of _lpadc_trigger_status_flags.

static inline void LPADC_ClearTriggerStatusFlags(ADC_Type *base, uint32_t mask)

Clear trigger status flags.

Parameters:

base – LPADC peripheral base address.
mask – The mask of trigger status flags to be cleared, should be the OR’ed value of _lpadc_trigger_status_flags.

static inline void LPADC_EnableInterrupts(ADC_Type *base, uint32_t mask)

Enable interrupts.

Note

When enabling trigger completion interrupts (kLPADC_TriggerXCompletionInterruptEnable) on some devices, the interrupt may occur before the final command in a chained trigger sequence starts to execute. For multi-command trigger sequences, do not use the trigger completion interrupt alone as the indication that all expected results are already stored in the FIFO.

Parameters:

base – LPADC peripheral base address.
mask – Mask value for interrupt events. See to _lpadc_interrupt_enable.

static inline void LPADC_DisableInterrupts(ADC_Type *base, uint32_t mask)

Disable interrupts.

Parameters:

base – LPADC peripheral base address.
mask – Mask value for interrupt events. See to _lpadc_interrupt_enable.

static inline void LPADC_EnableFIFOWatermarkDMA(ADC_Type *base, bool enable)

Switch on/off the DMA trigger for FIFO watermark event.

Parameters:

base – LPADC peripheral base address.
enable – Switcher to the event.

static inline uint32_t LPADC_GetConvResultCount(ADC_Type *base)

Get the count of result kept in conversion FIFO.

Parameters:

base – LPADC peripheral base address.

Returns:

The count of result kept in conversion FIFO.

bool LPADC_GetConvResult(ADC_Type *base, lpadc_conv_result_t *result)

Get the result in conversion FIFO.

Parameters:

base – LPADC peripheral base address.
result – Pointer to structure variable that keeps the conversion result in conversion FIFO.

Returns:

Status whether FIFO entry is valid.

void LPADC_GetConvResultBlocking(ADC_Type *base, lpadc_conv_result_t *result)

Get the result in conversion FIFO using blocking method.

Parameters:

base – LPADC peripheral base address.
result – Pointer to structure variable that keeps the conversion result in conversion FIFO.

void LPADC_SetConvTriggerConfig(ADC_Type *base, uint32_t triggerId, const lpadc_conv_trigger_config_t *config)

Configure the conversion trigger source.

Each programmable trigger can launch the conversion command in command buffer.

Parameters:

base – LPADC peripheral base address.
triggerId – ID for each trigger. Typically, the available value range is from 0.
config – Pointer to configuration structure. See to lpadc_conv_trigger_config_t.

void LPADC_GetDefaultConvTriggerConfig(lpadc_conv_trigger_config_t *config)

Gets an available pre-defined settings for trigger’s configuration.

This function initializes the trigger’s configuration structure with an available settings. The default values are:

config->targetCommandId        = 0U;
config->delayPower             = 0U;
config->priority               = 0U;
config->channelAFIFOSelect     = 0U;
config->channelBFIFOSelect     = 0U;
config->enableHardwareTrigger  = false;

Parameters:

config – Pointer to configuration structure.

static inline void LPADC_DoSoftwareTrigger(ADC_Type *base, uint32_t triggerIdMask)

Do software trigger to conversion command.

Parameters:

base – LPADC peripheral base address.
triggerIdMask – Mask value for software trigger indexes, which count from zero.

static inline void LPADC_EnableHardwareTriggerCommandSelection(ADC_Type *base, uint32_t triggerId, bool enable)

Enable hardware trigger command selection.

This function will use the hardware trigger command from ADC_ETC.The trigger command is then defined by ADC hardware trigger command selection field in ADC_ETC- >TRIGx_CHAINy_z_n[CSEL].

Parameters:

base – LPADC peripheral base address.
triggerId – ID for each trigger. Typically, the available value range is from 0.
enable – True to enable or flase to disable.

void LPADC_SetConvCommandConfig(ADC_Type *base, uint32_t commandId, const lpadc_conv_command_config_t *config)

Configure conversion command.

Note

The number of compare value register on different chips is different, that is mean in some chips, some command buffers do not have the compare functionality.

Parameters:

base – LPADC peripheral base address.
commandId – ID for command in command buffer. Typically, the available value range is 1 - 15.
config – Pointer to configuration structure. See to lpadc_conv_command_config_t.

void LPADC_GetDefaultConvCommandConfig(lpadc_conv_command_config_t *config)

Gets an available pre-defined settings for conversion command’s configuration.

This function initializes the conversion command’s configuration structure with an available settings. The default values are:

config->sampleScaleMode            = kLPADC_SampleFullScale;
config->channelBScaleMode          = kLPADC_SampleFullScale;
config->sampleChannelMode          = kLPADC_SampleChannelSingleEndSideA;
config->channelNumber              = 0U;
config->channelBNumber             = 0U;
config->chainedNextCommandNumber   = 0U;
config->enableAutoChannelIncrement = false;
config->loopCount                  = 0U;
config->hardwareAverageMode        = kLPADC_HardwareAverageCount1;
config->sampleTimeMode             = kLPADC_SampleTimeADCK3;
config->hardwareCompareMode        = kLPADC_HardwareCompareDisabled;
config->hardwareCompareValueHigh   = 0U;
config->hardwareCompareValueLow    = 0U;
config->conversionResolutionMode   = kLPADC_ConversionResolutionStandard;
config->enableWaitTrigger          = false;
config->enableChannelB             = false;

Parameters:

config – Pointer to configuration structure.

void LPADC_EnableCalibration(ADC_Type *base, bool enable)

Enable the calibration function.

When CALOFS is set, the ADC is configured to perform a calibration function anytime the ADC executes a conversion. Any channel selected is ignored and the value returned in the RESFIFO is a signed value between -31 and 31. -32 is not a valid and is never a returned value. Software should copy the lower 6- bits of the conversion result stored in the RESFIFO after a completed calibration conversion to the OFSTRIM field. The OFSTRIM field is used in normal operation for offset correction.

Parameters:

base – LPADC peripheral base address.
enable – switcher to the calibration function.

static inline void LPADC_SetOffsetValue(ADC_Type *base, uint32_t value)

Set proper offset value to trim ADC.

To minimize the offset during normal operation, software should read the conversion result from the RESFIFO calibration operation and write the lower 6 bits to the OFSTRIM register.

Parameters:

base – LPADC peripheral base address.
value – Setting offset value.

status_t LPADC_DoAutoCalibration(ADC_Type *base)

Do auto calibration.

Calibration function should be executed before using converter in application. It used the software trigger and a dummy conversion, get the offset and write them into the OFSTRIM register. It called some of functional API including:

LPADC_EnableCalibration(…)
LPADC_SetOffsetValue(…)
LPADC_SetConvCommandConfig(…)
LPADC_SetConvTriggerConfig(…)

Parameters:

base – LPADC peripheral base address.
base – LPADC peripheral base address.

Return values:

kStatus_Success – Successfully configured.
kStatus_Timeout – Timeout occurs while waiting completion.

static inline void LPADC_SetOffsetValue(ADC_Type *base, int16_t value)

Set trim value for offset.

Note

For 16-bit conversions, each increment is 1/2 LSB resulting in a programmable offset range of -256 LSB to 255.5 LSB; For 12-bit conversions, each increment is 1/32 LSB resulting in a programmable offset range of -16 LSB to 15.96875 LSB.

Parameters:

base – LPADC peripheral base address.
value – Offset trim value, is a 10-bit signed value between -512 and 511.

static inline void LPADC_GetOffsetValue(ADC_Type *base, int16_t *pValue)

Get trim value of offset.

Parameters:

base – LPADC peripheral base address.
pValue – Pointer to the variable in type of int16_t to store offset value.

static inline void LPADC_EnableOffsetCalibration(ADC_Type *base, bool enable)

Enable the offset calibration function.

Parameters:

base – LPADC peripheral base address.
enable – switcher to the calibration function.

static inline void LPADC_SetOffsetCalibrationMode(ADC_Type *base, lpadc_offset_calibration_mode_t mode)

Set offset calibration mode.

Parameters:

base – LPADC peripheral base address.
mode – set offset calibration mode.see to lpadc_offset_calibration_mode_t .

status_t LPADC_DoOffsetCalibration(ADC_Type *base)

Do offset calibration.

Parameters:

base – LPADC peripheral base address.

Return values:

kStatus_Success – Successfully configured.
kStatus_Timeout – Timeout occurs while waiting completion.

void LPADC_PrepareAutoCalibration(ADC_Type *base)

Prepare auto calibration, LPADC_FinishAutoCalibration has to be called before using the LPADC. LPADC_DoAutoCalibration has been split in two API to avoid to be stuck too long in the function.

Parameters:

base – LPADC peripheral base address.

status_t LPADC_FinishAutoCalibration(ADC_Type *base)

Finish auto calibration start with LPADC_PrepareAutoCalibration.

Note

This feature is used for LPADC with CTRL[CALOFSMODE].

Parameters:

base – LPADC peripheral base address.

Return values:

kStatus_Success – Successfully configured.
kStatus_Timeout – Timeout occurs while waiting completion.

void LPADC_GetCalibrationValue(ADC_Type *base, lpadc_calibration_value_t *ptrCalibrationValue)

Get calibration value into the memory which is defined by invoker.

Note

Please note the ADC will be disabled temporary.

Note

This function should be used after finish calibration.

Parameters:

base – LPADC peripheral base address.
ptrCalibrationValue – Pointer to lpadc_calibration_value_t structure, this memory block should be always powered on even in low power modes.

status_t LPADC_SetCalibrationValue(ADC_Type *base, const lpadc_calibration_value_t *ptrCalibrationValue)

Set calibration value into ADC calibration registers.

Note

Please note the ADC will be disabled temporary.

Parameters:

base – LPADC peripheral base address.
ptrCalibrationValue – Pointer to lpadc_calibration_value_t structure which contains ADC’s calibration value.

Return values:

kStatus_Success – Successfully configured.
kStatus_Timeout – Timeout occurs while waiting completion.

static inline void LPADC_RequestHighSpeedModeTrim(ADC_Type *base)

Request high speed mode trim calculation.

Parameters:

base – LPADC peripheral base address.

static inline int8_t LPADC_GetHighSpeedTrimValue(ADC_Type *base)

Get high speed mode trim value, the result is a 5-bit signed value between -16 and 15.

Note

The high speed mode trim value is used to minimize offset for high speed conversion.

Parameters:

base – LPADC peripheral base address.

Returns:

The calculated high speed mode trim value.

static inline void LPADC_SetHighSpeedTrimValue(ADC_Type *base, int8_t trimValue)

Set high speed mode trim value.

Note

If is possible to set the trim value manually, but it is recommended to use the LPADC_RequestHighSpeedModeTrim.

Parameters:

base – LPADC peripheral base address.
trimValue – The trim value to be set.

static inline void LPADC_EnableHighSpeedConversionMode(ADC_Type *base, bool enable)

Enable/disable high speed conversion mode, if enabled conversions complete 2 or 3 ADCK cycles sooner compared to conversion cycle counts when high speed mode is disabled.

Parameters:

base – LPADC peripheral base address.
enable – Used to enable/disable high speed conversion mode:
- true Enable high speed conversion mode;
- false Disable high speed conversion mode.

static inline void LPADC_EnableExtraCycle(ADC_Type *base, bool enable)

Enable/disable an additional ADCK cycle to conversion.

Parameters:

base – LPADC peripheral base address.
enable – Used to enable/disable an additional ADCK cycle to conversion:
- true Enable an additional ADCK cycle to conversion;
- false Disable an additional ADCK cycle to conversion.

static inline void LPADC_SetTuneValue(ADC_Type *base, lpadc_tune_value_t tuneValue)

Set tune value which provides some variability in how many cycles are needed to complete a conversion.

Parameters:

base – LPADC peripheral base address.
tuneValue – The tune value to be set, please refer to lpadc_tune_value_t.

static inline lpadc_tune_value_t LPADC_GetTuneValue(ADC_Type *base)

Get tune value which provides some variability in how many cycles are needed to complete a conversion.

Parameters:

base – LPADC peripheral base address.

Returns:

The tune value, please refer to lpadc_tune_value_t.

static inline void LPADC_EnableJustifiedLeft(ADC_Type *base, bool enable)

Enable/disable left-justify format in 12-bit single-end mode.

Parameters:

base – LPADC peripheral base address.
enable – Used to enable/disable left-justify format in 12-bit single-end mode:
- true Enable left-justify format in 12-bit single-end mode;
- false Disable left-justify format in 12-bit single-end mode.

FSL_LPADC_DRIVER_VERSION: LPADC driver version 2.9.5.

struct lpadc_config_t

#include <fsl_lpadc.h>

LPADC global configuration.

This structure would used to keep the settings for initialization.

Public Members

bool enableInternalClock: Enables the internally generated clock source. The clock source is used in clock selection logic at the chip level and is optionally used for the ADC clock source.

bool enableVref1LowVoltage: If voltage reference option1 input is below 1.8V, it should be “true”. If voltage reference option1 input is above 1.8V, it should be “false”.

bool enableInDozeMode: Control system transition to Stop and Wait power modes while ADC is converting. When enabled in Doze mode, immediate entries to Wait or Stop are allowed. When disabled, the ADC will wait for the current averaging iteration/FIFO storage to complete before acknowledging stop or wait mode entry.

lpadc_conversion_average_mode_t conversionAverageMode: Auto-Calibration Averages.

bool enableAnalogPreliminary: ADC analog circuits are pre-enabled and ready to execute conversions without startup delays(at the cost of higher DC current consumption).

uint32_t powerUpDelay: When the analog circuits are not pre-enabled, the ADC analog circuits are only powered while the ADC is active and there is a counted delay defined by this field after an initial trigger transitions the ADC from its Idle state to allow time for the analog circuits to stabilize. The startup delay count of (powerUpDelay * 4) ADCK cycles must result in a longer delay than the analog startup time.

lpadc_reference_voltage_source_t referenceVoltageSource: Selects the voltage reference high used for conversions.

lpadc_power_level_mode_t powerLevelMode: Power Configuration Selection.

lpadc_trigger_priority_policy_t triggerPriorityPolicy: Control how higher priority triggers are handled, see to lpadc_trigger_priority_policy_t.

bool enableConvPause: Enables the ADC pausing function. When enabled, a programmable delay is inserted during command execution sequencing between LOOP iterations, between commands in a sequence, and between conversions when command is executing in “Compare Until True” configuration.

uint32_t convPauseDelay: Controls the duration of pausing during command execution sequencing. The pause delay is a count of (convPauseDelay*4) ADCK cycles. Only available when ADC pausing function is enabled. The available value range is in 9-bit.

uint32_t FIFOWatermark: FIFOWatermark is a programmable threshold setting. When the number of datawords stored in the ADC Result FIFO is greater than the value in this field, the ready flag would be asserted to indicate stored data has reached the programmable threshold.

struct lpadc_conv_command_config_t

#include <fsl_lpadc.h>

Define structure to keep the configuration for conversion command.

Public Members

lpadc_sample_scale_mode_t sampleScaleMode: Sample scale mode.

lpadc_sample_scale_mode_t channelBScaleMode: Alternate channe B Scale mode.

lpadc_sample_channel_mode_t sampleChannelMode: Channel sample mode.

uint32_t channelNumber: Channel number, select the channel or channel pair.

uint32_t channelBNumber: Alternate Channel B number, select the channel.

uint32_t chainedNextCommandNumber: Selects the next command to be executed after this command completes. 1-15 is available, 0 is to terminate the chain after this command.

bool enableAutoChannelIncrement: Loop with increment: when disabled, the “loopCount” field selects the number of times the selected channel is converted consecutively; when enabled, the “loopCount” field defines how many consecutive channels are converted as part of the command execution.

uint32_t loopCount: Selects how many times this command executes before finish and transition to the next command or Idle state. Command executes LOOP+1 times. 0-15 is available.

lpadc_hardware_average_mode_t hardwareAverageMode: Hardware average selection.

lpadc_sample_time_mode_t sampleTimeMode: Sample time selection.

lpadc_hardware_compare_mode_t hardwareCompareMode: Hardware compare selection.

uint32_t hardwareCompareValueHigh: Compare Value High. The available value range is in 16-bit.

uint32_t hardwareCompareValueLow: Compare Value Low. The available value range is in 16-bit.

lpadc_conversion_resolution_mode_t conversionResolutionMode: Conversion resolution mode.

bool enableWaitTrigger: Wait for trigger assertion before execution: when disabled, this command will be automatically executed; when enabled, the active trigger must be asserted again before executing this command.

struct lpadc_conv_trigger_config_t

#include <fsl_lpadc.h>

Define structure to keep the configuration for conversion trigger.

Public Members

uint32_t targetCommandId: Select the command from command buffer to execute upon detect of the associated trigger event.

uint32_t delayPower: Select the trigger delay duration to wait at the start of servicing a trigger event. When this field is clear, then no delay is incurred. When this field is set to a non-zero value, the duration for the delay is 2^delayPower ADCK cycles. The available value range is 4-bit.

uint32_t priority: Sets the priority of the associated trigger source. If two or more triggers have the same priority level setting, the lower order trigger event has the higher priority. The lower value for this field is for the higher priority, the available value range is 1-bit.

bool enableHardwareTrigger: Enable hardware trigger source to initiate conversion on the rising edge of the input trigger source or not. THe software trigger is always available.

struct lpadc_conv_result_t

#include <fsl_lpadc.h>

Define the structure to keep the conversion result.

Public Members

uint32_t commandIdSource: Indicate the command buffer being executed that generated this result.

uint32_t loopCountIndex: Indicate the loop count value during command execution that generated this result.

uint32_t triggerIdSource: Indicate the trigger source that initiated a conversion and generated this result.

uint16_t convValue: Data result.

struct _lpadc_calibration_value: #include <fsl_lpadc.h>

A structure of calibration value.

LPCMP: Low Power Analog Comparator Driver#

void LPCMP_Init(LPCMP_Type *base, const lpcmp_config_t *config)

Initialize the LPCMP.

This function initializes the LPCMP module. The operations included are:

Enabling the clock for LPCMP module.
Configuring the comparator.
Enabling the LPCMP module. Note: For some devices, multiple LPCMP instance share the same clock gate. In this case, to enable the clock for any instance enables all the LPCMPs. Check the chip reference manual for the clock assignment of the LPCMP.

Parameters:

base – LPCMP peripheral base address.
config – Pointer to “lpcmp_config_t” structure.

void LPCMP_Deinit(LPCMP_Type *base)

De-initializes the LPCMP module.

This function de-initializes the LPCMP module. The operations included are:

Disabling the LPCMP module.
Disabling the clock for LPCMP module.

This function disables the clock for the LPCMP. Note: For some devices, multiple LPCMP instance shares the same clock gate. In this case, before disabling the clock for the LPCMP, ensure that all the LPCMP instances are not used.

Parameters:

base – LPCMP peripheral base address.

void LPCMP_GetDefaultConfig(lpcmp_config_t *config)

Gets an available pre-defined settings for the comparator’s configuration.

This function initializes the comparator configuration structure to these default values:

config->enableStopMode      = false;
config->enableOutputPin     = false;
config->enableCmpToDacLink  = false;
config->useUnfilteredOutput = false;
config->enableInvertOutput  = false;
config->hysteresisMode      = kLPCMP_HysteresisLevel0;
config->powerMode           = kLPCMP_LowSpeedPowerMode;
config->functionalSourceClock = kLPCMP_FunctionalClockSource0;
config->plusInputSrc          = kLPCMP_PlusInputSrcMux;
config->minusInputSrc         = kLPCMP_MinusInputSrcMux;

Parameters:

config – Pointer to “lpcmp_config_t” structure.

static inline void LPCMP_Enable(LPCMP_Type *base, bool enable)

Enable/Disable LPCMP module.

Parameters:

base – LPCMP peripheral base address.
enable – “true” means enable the module, and “false” means disable the module.

void LPCMP_SetInputChannels(LPCMP_Type *base, uint32_t positiveChannel, uint32_t negativeChannel)

Select the input channels for LPCMP. This function determines which input is selected for the negative and positive mux.

Parameters:

base – LPCMP peripheral base address.
positiveChannel – Positive side input channel number. Available range is 0-7.
negativeChannel – Negative side input channel number. Available range is 0-7.

static inline void LPCMP_EnableDMA(LPCMP_Type *base, bool enable)

Enables/disables the DMA request for rising/falling events. Normally, the LPCMP generates a CPU interrupt if there is a rising/falling event. When DMA support is enabled and the rising/falling interrupt is enabled , the rising/falling event forces a DMA transfer request rather than a CPU interrupt instead.

Parameters:

base – LPCMP peripheral base address.
enable – “true” means enable DMA support, and “false” means disable DMA support.

void LPCMP_SetFilterConfig(LPCMP_Type *base, const lpcmp_filter_config_t *config)

Configures the filter.

Parameters:

base – LPCMP peripheral base address.
config – Pointer to “lpcmp_filter_config_t” structure.

void LPCMP_SetDACConfig(LPCMP_Type *base, const lpcmp_dac_config_t *config)

Configure the internal DAC module.

Parameters:

base – LPCMP peripheral base address.
config – Pointer to “lpcmp_dac_config_t” structure. If config is “NULL”, disable internal DAC.

static inline void LPCMP_EnableInterrupts(LPCMP_Type *base, uint32_t mask)

Enable the interrupts.

Parameters:

base – LPCMP peripheral base address.
mask – Mask value for interrupts. See “_lpcmp_interrupt_enable”.

static inline void LPCMP_DisableInterrupts(LPCMP_Type *base, uint32_t mask)

Disable the interrupts.

Parameters:

base – LPCMP peripheral base address.
mask – Mask value for interrupts. See “_lpcmp_interrupt_enable”.

static inline uint32_t LPCMP_GetStatusFlags(LPCMP_Type *base)

Get the LPCMP status flags.

Parameters:

base – LPCMP peripheral base address.

Returns:

Mask value for the asserted flags. See “_lpcmp_status_flags”.

static inline void LPCMP_ClearStatusFlags(LPCMP_Type *base, uint32_t mask)

Clear the LPCMP status flags.

Parameters:

base – LPCMP peripheral base address.
mask – Mask value for the flags. See “_lpcmp_status_flags”.

static inline void LPCMP_EnableWindowMode(LPCMP_Type *base, bool enable)

Enable/Disable window mode.When any windowed mode is active, COUTA is clocked by the bus clock whenever WINDOW = 1. The last latched value is held when WINDOW = 0. The optionally inverted comparator output COUT_RAW is sampled on every bus clock when WINDOW=1 to generate COUTA.

Parameters:

base – LPCMP peripheral base address.
enable – “true” means enable window mode, and “false” means disable window mode.

void LPCMP_SetWindowControl(LPCMP_Type *base, const lpcmp_window_control_config_t *config)

Configure the window control, users can use this API to implement operations on the window, such as inverting the window signal, setting the window closing event(only valid in windowing mode), and setting the COUTA signal after the window is closed(only valid in windowing mode).

Parameters:

base – LPCMP peripheral base address.
config – Pointer “lpcmp_window_control_config_t” structure.

void LPCMP_SetRoundRobinConfig(LPCMP_Type *base, const lpcmp_roundrobin_config_t *config)

Configure the roundrobin mode.

Parameters:

base – LPCMP peripheral base address.
config – Pointer “lpcmp_roundrobin_config_t” structure.

static inline void LPCMP_EnableRoundRobinMode(LPCMP_Type *base, bool enable)

Enable/Disable roundrobin mode.

Parameters:

base – LPCMP peripheral base address.
enable – “true” means enable roundrobin mode, and “false” means disable roundrobin mode.

void LPCMP_SetRoundRobinInternalTimer(LPCMP_Type *base, uint32_t value)

brief Configure the roundrobin internal timer reload value.

param base LPCMP peripheral base address. param value RoundRobin internal timer reload value, allowed range:0x0UL-0xFFFFFFFUL.

static inline void LPCMP_EnableRoundRobinInternalTimer(LPCMP_Type *base, bool enable)

Enable/Disable roundrobin internal timer, note that this function is only valid when using the internal trigger source.

Parameters:

base – LPCMP peripheral base address.
enable – “true” means enable roundrobin internal timer, and “false” means disable roundrobin internal timer.

static inline void LPCMP_SetPreSetValue(LPCMP_Type *base, uint8_t mask)

Set preset value for all channels, users can set all channels’ preset vaule through this API, for example, if the mask set to 0x03U means channel0 and channel2’s preset value set to 1U and other channels’ preset value set to 0U.

Parameters:

base – LPCMP peripheral base address.
mask – Mask of channel index.

static inline uint8_t LPCMP_GetComparisonResult(LPCMP_Type *base)

Get comparison results for all channels, users can get all channels’ comparison results through this API.

Parameters:

base – LPCMP peripheral base address.

Returns:

return All channels’ comparison result.

static inline void LPCMP_ClearInputChangedFlags(LPCMP_Type *base, uint8_t mask)

Clear input changed flags for single channel or multiple channels, users can clear input changed flag of a single channel or multiple channels through this API, for example, if the mask set to 0x03U means clear channel0 and channel2’s input changed flags.

Parameters:

base – LPCMP peripheral base address.
mask – Mask of channel index.

static inline uint8_t LPCMP_GetInputChangedFlags(LPCMP_Type *base)

Get input changed flags for all channels, Users can get all channels’ input changed flags through this API.

Parameters:

base – LPCMP peripheral base address.

Returns:

return All channels’ changed flag.

FSL_LPCMP_DRIVER_VERSION: LPCMP driver version 2.3.2.

enum _lpcmp_status_flags

LPCMP status falgs mask.

Values:

enumerator kLPCMP_OutputRisingEventFlag: Rising-edge on the comparison output has occurred.

enumerator kLPCMP_OutputFallingEventFlag: Falling-edge on the comparison output has occurred.

enumerator kLPCMP_OutputRoundRobinEventFlag: Detects when any channel’s last comparison result is different from the pre-set value in trigger mode.

enumerator kLPCMP_OutputAssertEventFlag: Return the current value of the analog comparator output. The flag does not support W1C.

enum _lpcmp_interrupt_enable

LPCMP interrupt enable/disable mask.

Values:

enumerator kLPCMP_OutputRisingInterruptEnable: Comparator interrupt enable rising.

enumerator kLPCMP_OutputFallingInterruptEnable: Comparator interrupt enable falling.

enumerator kLPCMP_RoundRobinInterruptEnable: Comparator round robin mode interrupt occurred when the comparison result changes for a given channel.

enum _lpcmp_hysteresis_mode

LPCMP hysteresis mode. See chip data sheet to get the actual hystersis value with each level.

Values:

enumerator kLPCMP_HysteresisLevel0: The hard block output has level 0 hysteresis internally.

enumerator kLPCMP_HysteresisLevel1: The hard block output has level 1 hysteresis internally.

enumerator kLPCMP_HysteresisLevel2: The hard block output has level 2 hysteresis internally.

enumerator kLPCMP_HysteresisLevel3: The hard block output has level 3 hysteresis internally.

enum _lpcmp_power_mode

LPCMP nano mode.

Values:

enumerator kLPCMP_LowSpeedPowerMode: Low speed comparison mode is selected.

enumerator kLPCMP_HighSpeedPowerMode: High speed comparison mode is selected.

enumerator kLPCMP_NanoPowerMode: Nano power comparator is enabled.

enum _lpcmp_dac_reference_voltage_source

Internal DAC reference voltage source.

Values:

enumerator kLPCMP_VrefSourceVin1: vrefh_int is selected as resistor ladder network supply reference Vin.

enumerator kLPCMP_VrefSourceVin2: vrefh_ext is selected as resistor ladder network supply reference Vin.

enum _lpcmp_functional_source_clock

LPCMP functional mode clock source selection.

Note: In different devices, the functional mode clock source selection is different, please refer to specific device Reference Manual for details.

Values:

enumerator kLPCMP_FunctionalClockSource0: Select functional mode clock source0.

enumerator kLPCMP_FunctionalClockSource1: Select functional mode clock source1.

enumerator kLPCMP_FunctionalClockSource2: Select functional mode clock source2.

enumerator kLPCMP_FunctionalClockSource3: Select functional mode clock source3.

enum _lpcmp_couta_signal

Set the COUTA signal value when the window is closed.

Values:

enumerator kLPCMP_COUTASignalNoSet: NO set the COUTA signal value when the window is closed.

enumerator kLPCMP_COUTASignalLow: Set COUTA signal low(0) when the window is closed.

enumerator kLPCMP_COUTASignalHigh: Set COUTA signal high(1) when the window is closed.

enum _lpcmp_close_window_event

Set COUT event, which can close the active window in window mode.

Values:

enumerator kLPCMP_CLoseWindowEventNoSet: No Set COUT event, which can close the active window in window mode.

enumerator kLPCMP_CloseWindowEventRisingEdge: Set rising edge COUT signal as COUT event.

enumerator kLPCMP_CloseWindowEventFallingEdge: Set falling edge COUT signal as COUT event.

enumerator kLPCMP_CLoseWindowEventBothEdge: Set both rising and falling edge COUT signal as COUT event.

enum _lpcmp_roundrobin_fixedmuxport

LPCMP round robin mode fixed mux port.

Values:

enumerator kLPCMP_FixedPlusMuxPort: Fixed plus mux port.

enumerator kLPCMP_FixedMinusMuxPort: Fixed minus mux port.

enum _lpcmp_roundrobin_clock_source

LPCMP round robin mode clock source selection.

Note: In different devices,the round robin mode clock source selection is different, please refer to the specific device Reference Manual for details.

Values:

enumerator kLPCMP_RoundRobinClockSource0: Select roundrobin mode clock source0.

enumerator kLPCMP_RoundRobinClockSource1: Select roundrobin mode clock source1.

enumerator kLPCMP_RoundRobinClockSource2: Select roundrobin mode clock source2.

enumerator kLPCMP_RoundRobinClockSource3: Select roundrobin mode clock source3.

enum _lpcmp_roundrobin_trigger_source

LPCMP round robin mode trigger source.

Values:

enumerator kLPCMP_TriggerSourceExternally: Select external trigger source.

enumerator kLPCMP_TriggerSourceInternally: Select internal trigger source.

enum _lpcmp_plus_input_src

LPCMP plus input source.

Values:

enumerator kLPCMP_PlusInputSrcDac: LPCMP plus input source from the internal 8-bit DAC output.

enumerator kLPCMP_PlusInputSrcMux: LPCMP plus input source from the analog 8-1 mux.

enum _lpcmp_minus_input_src

LPCMP minus input source.

Values:

enumerator kLPCMP_MinusInputSrcDac: LPCMP minus input source from the internal 8-bit DAC output.

enumerator kLPCMP_MinusInputSrcMux: LPCMP minus input source from the analog 8-1 mux.

typedef enum _lpcmp_hysteresis_mode lpcmp_hysteresis_mode_t: LPCMP hysteresis mode. See chip data sheet to get the actual hystersis value with each level.

typedef enum _lpcmp_power_mode lpcmp_power_mode_t: LPCMP nano mode.

typedef enum _lpcmp_dac_reference_voltage_source lpcmp_dac_reference_voltage_source_t: Internal DAC reference voltage source.

typedef enum _lpcmp_functional_source_clock lpcmp_functional_source_clock_t

LPCMP functional mode clock source selection.

Note: In different devices, the functional mode clock source selection is different, please refer to specific device Reference Manual for details.

typedef enum _lpcmp_couta_signal lpcmp_couta_signal_t: Set the COUTA signal value when the window is closed.

typedef enum _lpcmp_close_window_event lpcmp_close_window_event_t: Set COUT event, which can close the active window in window mode.

typedef enum _lpcmp_roundrobin_fixedmuxport lpcmp_roundrobin_fixedmuxport_t: LPCMP round robin mode fixed mux port.

typedef enum _lpcmp_roundrobin_clock_source lpcmp_roundrobin_clock_source_t

LPCMP round robin mode clock source selection.

Note: In different devices,the round robin mode clock source selection is different, please refer to the specific device Reference Manual for details.

typedef enum _lpcmp_roundrobin_trigger_source lpcmp_roundrobin_trigger_source_t: LPCMP round robin mode trigger source.

typedef struct _lpcmp_filter_config lpcmp_filter_config_t: Configure the filter.

typedef enum _lpcmp_plus_input_src lpcmp_plus_input_src_t: LPCMP plus input source.

typedef enum _lpcmp_minus_input_src lpcmp_minus_input_src_t: LPCMP minus input source.

typedef struct _lpcmp_dac_config lpcmp_dac_config_t: configure the internal DAC.

typedef struct _lpcmp_config lpcmp_config_t: Configures the comparator.

typedef struct _lpcmp_window_control_config lpcmp_window_control_config_t: Configure the window mode control.

typedef struct _lpcmp_roundrobin_config lpcmp_roundrobin_config_t: Configure the round robin mode.

LPCMP_CCR1_COUTA_CFG_MASK

LPCMP_CCR1_COUTA_CFG_SHIFT

LPCMP_CCR1_COUTA_CFG(x)

LPCMP_CCR1_EVT_SEL_CFG_MASK

LPCMP_CCR1_EVT_SEL_CFG_SHIFT

LPCMP_CCR1_EVT_SEL_CFG(x)

struct _lpcmp_filter_config

#include <fsl_lpcmp.h>

Configure the filter.

Public Members

bool enableSample: Decide whether to use the external SAMPLE as a sampling clock input.

uint8_t filterSampleCount: Filter Sample Count. Available range is 1-7; 0 disables the filter.

uint8_t filterSamplePeriod: Filter Sample Period. The divider to the bus clock. Available range is 0-255. The sampling clock must be at least 4 times slower than the system clock to the comparator. So if enableSample is “false”, filterSamplePeriod should be set greater than 4.

struct _lpcmp_dac_config

#include <fsl_lpcmp.h>

configure the internal DAC.

Public Members

bool enableLowPowerMode: Decide whether to enable DAC low power mode.

lpcmp_dac_reference_voltage_source_t referenceVoltageSource: Internal DAC supply voltage reference source.

uint8_t DACValue: Value for the DAC Output Voltage. Different devices has different available range, for specific values, please refer to the reference manual.

struct _lpcmp_config

#include <fsl_lpcmp.h>

Configures the comparator.

Public Members

bool enableStopMode: Decide whether to enable the comparator when in STOP modes.

bool enableCmpToDacLink: Controls the link from the CMP enable to the DAC enable.

bool enableOutputPin: Decide whether to enable the comparator is available in selected pin.

bool useUnfilteredOutput: Decide whether to use unfiltered output.

bool enableInvertOutput: Decide whether to inverts the comparator output.

lpcmp_hysteresis_mode_t hysteresisMode: LPCMP hysteresis mode.

lpcmp_power_mode_t powerMode: LPCMP power mode.

lpcmp_functional_source_clock_t functionalSourceClock: Select LPCMP functional mode clock source.

lpcmp_plus_input_src_t plusInputSrc: Select LPCMP plus input source.

lpcmp_minus_input_src_t minusInputSrc: Select LPCMP minus input source.

struct _lpcmp_window_control_config

#include <fsl_lpcmp.h>

Configure the window mode control.

Public Members

bool enableInvertWindowSignal: True: enable invert window signal, False: disable invert window signal.

lpcmp_couta_signal_t COUTASignal: Decide whether to define the COUTA signal value when the window is closed.

lpcmp_close_window_event_t closeWindowEvent: Decide whether to select COUT event signal edge defines a COUT event to close window.

struct _lpcmp_roundrobin_config

#include <fsl_lpcmp.h>

Configure the round robin mode.

Public Members

uint8_t initDelayModules: Comparator and DAC initialization delay modulus, See Reference Manual and DataSheet for specific value.

uint8_t sampleClockNumbers: Specify the number of the round robin clock cycles(0~3) to wait after scanning the active channel before sampling the channel’s comparison result.

uint8_t channelSampleNumbers: Specify the number of samples for one channel, note that channelSampleNumbers must not smaller than sampleTimeThreshhold.

uint8_t sampleTimeThreshhold: Specify that for one channel, when (sampleTimeThreshhold + 1) sample results are “1”,the final result is “1”, otherwise the final result is “0”, note that the sampleTimeThreshhold must not be larger than channelSampleNumbers.

lpcmp_roundrobin_clock_source_t roundrobinClockSource: Decide which clock source to choose in round robin mode.

lpcmp_roundrobin_trigger_source_t roundrobinTriggerSource: Decide which trigger source to choose in round robin mode.

lpcmp_roundrobin_fixedmuxport_t fixedMuxPort: Decide which mux port to choose as fixed channel in round robin mode.

uint8_t fixedChannel: Indicate which channel of the fixed mux port is used in round robin mode.

uint8_t checkerChannelMask: Indicate which channel of the non-fixed mux port to check its voltage value in round robin mode, for example, if checkerChannelMask set to 0x11U means select channel 0 and channel 4 as checker channel.

LPI2C: Low Power Inter-Integrated Circuit Driver#

void LPI2C_DriverIRQHandler(uint32_t instance)

LPI2C driver IRQ handler common entry.

This function provides the common IRQ request entry for LPI2C.

Parameters:

instance – LPI2C instance.

FSL_LPI2C_DRIVER_VERSION: LPI2C driver version.

LPI2C status return codes.

Values:

enumerator kStatus_LPI2C_Busy: The master is already performing a transfer.

enumerator kStatus_LPI2C_Idle: The slave driver is idle.

enumerator kStatus_LPI2C_Nak: The slave device sent a NAK in response to a byte.

enumerator kStatus_LPI2C_FifoError: FIFO under run or overrun.

enumerator kStatus_LPI2C_BitError: Transferred bit was not seen on the bus.

enumerator kStatus_LPI2C_ArbitrationLost: Arbitration lost error.

enumerator kStatus_LPI2C_PinLowTimeout: SCL or SDA were held low longer than the timeout.

enumerator kStatus_LPI2C_NoTransferInProgress: Attempt to abort a transfer when one is not in progress.

enumerator kStatus_LPI2C_DmaRequestFail: DMA request failed.

enumerator kStatus_LPI2C_Timeout: Timeout polling status flags.

IRQn_Type const kLpi2cMasterIrqs[]: Array to map LPI2C instance number to IRQ number, used internally for LPI2C master interrupt and EDMA transactional APIs.

IRQn_Type const kLpi2cSlaveIrqs[]

lpi2c_master_isr_t s_lpi2cMasterIsr: Pointer to master IRQ handler for each instance, used internally for LPI2C master interrupt and EDMA transactional APIs.

void *s_lpi2cMasterHandle[]: Pointers to master handles for each instance, used internally for LPI2C master interrupt and EDMA transactional APIs.

uint32_t LPI2C_GetInstance(LPI2C_Type *base)

Returns an instance number given a base address.

If an invalid base address is passed, debug builds will assert. Release builds will just return instance number 0.

Parameters:

base – The LPI2C peripheral base address.

Returns:

LPI2C instance number starting from 0.

I2C_RETRY_TIMES: Retry times for waiting flag.

LPI2C Master Driver#

void LPI2C_MasterGetDefaultConfig(lpi2c_master_config_t *masterConfig)

Provides a default configuration for the LPI2C master peripheral.

This function provides the following default configuration for the LPI2C master peripheral:

masterConfig->enableMaster            = true;
masterConfig->debugEnable             = false;
masterConfig->ignoreAck               = false;
masterConfig->pinConfig               = kLPI2C_2PinOpenDrain;
masterConfig->baudRate_Hz             = 100000U;
masterConfig->busIdleTimeout_ns       = 0;
masterConfig->pinLowTimeout_ns        = 0;
masterConfig->sdaGlitchFilterWidth_ns = 0;
masterConfig->sclGlitchFilterWidth_ns = 0;
masterConfig->hostRequest.enable      = false;
masterConfig->hostRequest.source      = kLPI2C_HostRequestExternalPin;
masterConfig->hostRequest.polarity    = kLPI2C_HostRequestPinActiveHigh;

After calling this function, you can override any settings in order to customize the configuration, prior to initializing the master driver with LPI2C_MasterInit().

Parameters:

masterConfig – [out] User provided configuration structure for default values. Refer to lpi2c_master_config_t.

void LPI2C_MasterInit(LPI2C_Type *base, const lpi2c_master_config_t *masterConfig, uint32_t sourceClock_Hz)

Initializes the LPI2C master peripheral.

This function enables the peripheral clock and initializes the LPI2C master peripheral as described by the user provided configuration. A software reset is performed prior to configuration.

Parameters:

base – The LPI2C peripheral base address.
masterConfig – User provided peripheral configuration. Use LPI2C_MasterGetDefaultConfig() to get a set of defaults that you can override.
sourceClock_Hz – Frequency in Hertz of the LPI2C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods.

void LPI2C_MasterDeinit(LPI2C_Type *base)

Deinitializes the LPI2C master peripheral.

This function disables the LPI2C master peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The LPI2C peripheral base address.

void LPI2C_MasterConfigureDataMatch(LPI2C_Type *base, const lpi2c_data_match_config_t *matchConfig)

Configures LPI2C master data match feature.

Parameters:

base – The LPI2C peripheral base address.
matchConfig – Settings for the data match feature.

status_t LPI2C_MasterCheckAndClearError(LPI2C_Type *base, uint32_t status)

Convert provided flags to status code, and clear any errors if present.

Parameters:

base – The LPI2C peripheral base address.
status – Current status flags value that will be checked.

Return values:

kStatus_Success –
kStatus_LPI2C_PinLowTimeout –
kStatus_LPI2C_ArbitrationLost –
kStatus_LPI2C_Nak –
kStatus_LPI2C_FifoError –

status_t LPI2C_CheckForBusyBus(LPI2C_Type *base)

Make sure the bus isn’t already busy.

A busy bus is allowed if we are the one driving it.

Parameters:

base – The LPI2C peripheral base address.

Return values:

kStatus_Success –
kStatus_LPI2C_Busy –

static inline void LPI2C_MasterReset(LPI2C_Type *base)

Performs a software reset.

Restores the LPI2C master peripheral to reset conditions.

Parameters:

base – The LPI2C peripheral base address.

static inline void LPI2C_MasterEnable(LPI2C_Type *base, bool enable)

Enables or disables the LPI2C module as master.

Parameters:

base – The LPI2C peripheral base address.
enable – Pass true to enable or false to disable the specified LPI2C as master.

static inline uint32_t LPI2C_MasterGetStatusFlags(LPI2C_Type *base)

Gets the LPI2C master status flags.

A bit mask with the state of all LPI2C master status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also

_lpi2c_master_flags

Parameters:

base – The LPI2C peripheral base address.

Returns:

State of the status flags:

1: related status flag is set.
0: related status flag is not set.

static inline void LPI2C_MasterClearStatusFlags(LPI2C_Type *base, uint32_t statusMask)

Clears the LPI2C master status flag state.

The following status register flags can be cleared:

kLPI2C_MasterEndOfPacketFlag
kLPI2C_MasterStopDetectFlag
kLPI2C_MasterNackDetectFlag
kLPI2C_MasterArbitrationLostFlag
kLPI2C_MasterFifoErrFlag
kLPI2C_MasterPinLowTimeoutFlag
kLPI2C_MasterDataMatchFlag

Attempts to clear other flags has no effect.

See also

_lpi2c_master_flags.

Parameters:

base – The LPI2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _lpi2c_master_flags enumerators OR’d together. You may pass the result of a previous call to LPI2C_MasterGetStatusFlags().

static inline void LPI2C_MasterEnableInterrupts(LPI2C_Type *base, uint32_t interruptMask)

Enables the LPI2C master interrupt requests.

All flags except kLPI2C_MasterBusyFlag and kLPI2C_MasterBusBusyFlag can be enabled as interrupts.

Parameters:

base – The LPI2C peripheral base address.
interruptMask – Bit mask of interrupts to enable. See _lpi2c_master_flags for the set of constants that should be OR’d together to form the bit mask.

static inline void LPI2C_MasterDisableInterrupts(LPI2C_Type *base, uint32_t interruptMask)

Disables the LPI2C master interrupt requests.

All flags except kLPI2C_MasterBusyFlag and kLPI2C_MasterBusBusyFlag can be enabled as interrupts.

Parameters:

base – The LPI2C peripheral base address.
interruptMask – Bit mask of interrupts to disable. See _lpi2c_master_flags for the set of constants that should be OR’d together to form the bit mask.

static inline uint32_t LPI2C_MasterGetEnabledInterrupts(LPI2C_Type *base)

Returns the set of currently enabled LPI2C master interrupt requests.

Parameters:

base – The LPI2C peripheral base address.

Returns:

A bitmask composed of _lpi2c_master_flags enumerators OR’d together to indicate the set of enabled interrupts.

static inline void LPI2C_MasterEnableDMA(LPI2C_Type *base, bool enableTx, bool enableRx)

Enables or disables LPI2C master DMA requests.

Parameters:

base – The LPI2C peripheral base address.
enableTx – Enable flag for transmit DMA request. Pass true for enable, false for disable.
enableRx – Enable flag for receive DMA request. Pass true for enable, false for disable.

static inline uint32_t LPI2C_MasterGetTxFifoAddress(LPI2C_Type *base)

Gets LPI2C master transmit data register address for DMA transfer.

Parameters:

base – The LPI2C peripheral base address.

Returns:

The LPI2C Master Transmit Data Register address.

static inline uint32_t LPI2C_MasterGetRxFifoAddress(LPI2C_Type *base)

Gets LPI2C master receive data register address for DMA transfer.

Parameters:

base – The LPI2C peripheral base address.

Returns:

The LPI2C Master Receive Data Register address.

static inline void LPI2C_MasterSetWatermarks(LPI2C_Type *base, size_t txWords, size_t rxWords)

Sets the watermarks for LPI2C master FIFOs.

Parameters:

base – The LPI2C peripheral base address.
txWords – Transmit FIFO watermark value in words. The kLPI2C_MasterTxReadyFlag flag is set whenever the number of words in the transmit FIFO is equal or less than txWords. Writing a value equal or greater than the FIFO size is truncated.
rxWords – Receive FIFO watermark value in words. The kLPI2C_MasterRxReadyFlag flag is set whenever the number of words in the receive FIFO is greater than rxWords. Writing a value equal or greater than the FIFO size is truncated.

static inline void LPI2C_MasterGetFifoCounts(LPI2C_Type *base, size_t *rxCount, size_t *txCount)

Gets the current number of words in the LPI2C master FIFOs.

Parameters:

base – The LPI2C peripheral base address.
txCount – [out] Pointer through which the current number of words in the transmit FIFO is returned. Pass NULL if this value is not required.
rxCount – [out] Pointer through which the current number of words in the receive FIFO is returned. Pass NULL if this value is not required.

void LPI2C_MasterSetBaudRate(LPI2C_Type *base, uint32_t sourceClock_Hz, uint32_t baudRate_Hz)

Sets the I2C bus frequency for master transactions.

The LPI2C master is automatically disabled and re-enabled as necessary to configure the baud rate. Do not call this function during a transfer, or the transfer is aborted.

Note

Please note that the second parameter is the clock frequency of LPI2C module, the third parameter means user configured bus baudrate, this implementation is different from other I2C drivers which use baudrate configuration as second parameter and source clock frequency as third parameter.

Parameters:

base – The LPI2C peripheral base address.
sourceClock_Hz – LPI2C functional clock frequency in Hertz.
baudRate_Hz – Requested bus frequency in Hertz.

static inline bool LPI2C_MasterGetBusIdleState(LPI2C_Type *base)

Returns whether the bus is idle.

Requires the master mode to be enabled.

Parameters:

base – The LPI2C peripheral base address.

Return values:

true – Bus is busy.
false – Bus is idle.

status_t LPI2C_MasterStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t dir)

Sends a START signal and slave address on the I2C bus.

This function is used to initiate a new master mode transfer. First, the bus state is checked to ensure that another master is not occupying the bus. Then a START signal is transmitted, followed by the 7-bit address specified in the address parameter. Note that this function does not actually wait until the START and address are successfully sent on the bus before returning.

Parameters:

base – The LPI2C peripheral base address.
address – 7-bit slave device address, in bits [6:0].
dir – Master transfer direction, either kLPI2C_Read or kLPI2C_Write. This parameter is used to set the R/w bit (bit 0) in the transmitted slave address.

Return values:

kStatus_Success – START signal and address were successfully enqueued in the transmit FIFO.
kStatus_LPI2C_Busy – Another master is currently utilizing the bus.

static inline status_t LPI2C_MasterRepeatedStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t dir)

Sends a repeated START signal and slave address on the I2C bus.

This function is used to send a Repeated START signal when a transfer is already in progress. Like LPI2C_MasterStart(), it also sends the specified 7-bit address.

Note

This function exists primarily to maintain compatible APIs between LPI2C and I2C drivers, as well as to better document the intent of code that uses these APIs.

Parameters:

base – The LPI2C peripheral base address.
address – 7-bit slave device address, in bits [6:0].
dir – Master transfer direction, either kLPI2C_Read or kLPI2C_Write. This parameter is used to set the R/w bit (bit 0) in the transmitted slave address.

Return values:

kStatus_Success – Repeated START signal and address were successfully enqueued in the transmit FIFO.
kStatus_LPI2C_Busy – Another master is currently utilizing the bus.

status_t LPI2C_MasterSend(LPI2C_Type *base, void *txBuff, size_t txSize)

Performs a polling send transfer on the I2C bus.

Sends up to txSize number of bytes to the previously addressed slave device. The slave may reply with a NAK to any byte in order to terminate the transfer early. If this happens, this function returns kStatus_LPI2C_Nak.

Parameters:

base – The LPI2C peripheral base address.
txBuff – The pointer to the data to be transferred.
txSize – The length in bytes of the data to be transferred.

Return values:

kStatus_Success – Data was sent successfully.
kStatus_LPI2C_Busy – Another master is currently utilizing the bus.
kStatus_LPI2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_LPI2C_FifoError – FIFO under run or over run.
kStatus_LPI2C_ArbitrationLost – Arbitration lost error.
kStatus_LPI2C_PinLowTimeout – SCL or SDA were held low longer than the timeout.

status_t LPI2C_MasterReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize)

Performs a polling receive transfer on the I2C bus.

Parameters:

base – The LPI2C peripheral base address.
rxBuff – The pointer to the data to be transferred.
rxSize – The length in bytes of the data to be transferred.

Return values:

kStatus_Success – Data was received successfully.
kStatus_LPI2C_Busy – Another master is currently utilizing the bus.
kStatus_LPI2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_LPI2C_FifoError – FIFO under run or overrun.
kStatus_LPI2C_ArbitrationLost – Arbitration lost error.
kStatus_LPI2C_PinLowTimeout – SCL or SDA were held low longer than the timeout.

status_t LPI2C_MasterStop(LPI2C_Type *base)

Sends a STOP signal on the I2C bus.

This function does not return until the STOP signal is seen on the bus, or an error occurs.

Parameters:

base – The LPI2C peripheral base address.

Return values:

kStatus_Success – The STOP signal was successfully sent on the bus and the transaction terminated.
kStatus_LPI2C_Busy – Another master is currently utilizing the bus.
kStatus_LPI2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_LPI2C_FifoError – FIFO under run or overrun.
kStatus_LPI2C_ArbitrationLost – Arbitration lost error.
kStatus_LPI2C_PinLowTimeout – SCL or SDA were held low longer than the timeout.

status_t LPI2C_MasterTransferBlocking(LPI2C_Type *base, lpi2c_master_transfer_t *transfer)

Performs a master polling transfer on the I2C bus.

Note

The API does not return until the transfer succeeds or fails due to error happens during transfer.

Parameters:

base – The LPI2C peripheral base address.
transfer – Pointer to the transfer structure.

Return values:

kStatus_Success – Data was received successfully.
kStatus_LPI2C_Busy – Another master is currently utilizing the bus.
kStatus_LPI2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_LPI2C_FifoError – FIFO under run or overrun.
kStatus_LPI2C_ArbitrationLost – Arbitration lost error.
kStatus_LPI2C_PinLowTimeout – SCL or SDA were held low longer than the timeout.

void LPI2C_MasterTransferCreateHandle(LPI2C_Type *base, lpi2c_master_handle_t *handle, lpi2c_master_transfer_callback_t callback, void *userData)

Creates a new handle for the LPI2C master non-blocking APIs.

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the LPI2C_MasterTransferAbort() API shall be called.

Note

The function also enables the NVIC IRQ for the input LPI2C. Need to notice that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to enable the associated INTMUX IRQ in application.

Parameters:

base – The LPI2C peripheral base address.
handle – [out] Pointer to the LPI2C master driver handle.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.

status_t LPI2C_MasterTransferNonBlocking(LPI2C_Type *base, lpi2c_master_handle_t *handle, lpi2c_master_transfer_t *transfer)

Performs a non-blocking transaction on the I2C bus.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to the LPI2C master driver handle.
transfer – The pointer to the transfer descriptor.

Return values:

kStatus_Success – The transaction was started successfully.
kStatus_LPI2C_Busy – Either another master is currently utilizing the bus, or a non-blocking transaction is already in progress.

status_t LPI2C_MasterTransferGetCount(LPI2C_Type *base, lpi2c_master_handle_t *handle, size_t *count)

Returns number of bytes transferred so far.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to the LPI2C master driver handle.
count – [out] Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_Success –
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

void LPI2C_MasterTransferAbort(LPI2C_Type *base, lpi2c_master_handle_t *handle)

Terminates a non-blocking LPI2C master transmission early.

Note

It is not safe to call this function from an IRQ handler that has a higher priority than the LPI2C peripheral’s IRQ priority.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to the LPI2C master driver handle.

void LPI2C_MasterTransferHandleIRQ(LPI2C_Type *base, void *lpi2cMasterHandle)

Reusable routine to handle master interrupts.

Note

This function does not need to be called unless you are reimplementing the nonblocking API’s interrupt handler routines to add special functionality.

Parameters:

base – The LPI2C peripheral base address.
lpi2cMasterHandle – Pointer to the LPI2C master driver handle.

enum _lpi2c_master_flags

LPI2C master peripheral flags.

The following status register flags can be cleared:

kLPI2C_MasterEndOfPacketFlag
kLPI2C_MasterStopDetectFlag
kLPI2C_MasterNackDetectFlag
kLPI2C_MasterArbitrationLostFlag
kLPI2C_MasterFifoErrFlag
kLPI2C_MasterPinLowTimeoutFlag
kLPI2C_MasterDataMatchFlag

All flags except kLPI2C_MasterBusyFlag and kLPI2C_MasterBusBusyFlag can be enabled as interrupts.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kLPI2C_MasterTxReadyFlag: Transmit data flag

enumerator kLPI2C_MasterRxReadyFlag: Receive data flag

enumerator kLPI2C_MasterEndOfPacketFlag: End Packet flag

enumerator kLPI2C_MasterStopDetectFlag: Stop detect flag

enumerator kLPI2C_MasterNackDetectFlag: NACK detect flag

enumerator kLPI2C_MasterArbitrationLostFlag: Arbitration lost flag

enumerator kLPI2C_MasterFifoErrFlag: FIFO error flag

enumerator kLPI2C_MasterPinLowTimeoutFlag: Pin low timeout flag

enumerator kLPI2C_MasterDataMatchFlag: Data match flag

enumerator kLPI2C_MasterBusyFlag: Master busy flag

enumerator kLPI2C_MasterBusBusyFlag: Bus busy flag

enumerator kLPI2C_MasterClearFlags: All flags which are cleared by the driver upon starting a transfer.

enumerator kLPI2C_MasterIrqFlags: IRQ sources enabled by the non-blocking transactional API.

enumerator kLPI2C_MasterErrorFlags: Errors to check for.

enum _lpi2c_direction

Direction of master and slave transfers.

Values:

enumerator kLPI2C_Write: Master transmit.

enumerator kLPI2C_Read: Master receive.

enum _lpi2c_master_pin_config

LPI2C pin configuration.

Values:

enumerator kLPI2C_2PinOpenDrain: LPI2C Configured for 2-pin open drain mode

enumerator kLPI2C_2PinOutputOnly: LPI2C Configured for 2-pin output only mode (ultra-fast mode)

enumerator kLPI2C_2PinPushPull: LPI2C Configured for 2-pin push-pull mode

enumerator kLPI2C_4PinPushPull: LPI2C Configured for 4-pin push-pull mode

enumerator kLPI2C_2PinOpenDrainWithSeparateSlave: LPI2C Configured for 2-pin open drain mode with separate LPI2C slave

enumerator kLPI2C_2PinOutputOnlyWithSeparateSlave: LPI2C Configured for 2-pin output only mode(ultra-fast mode) with separate LPI2C slave

enumerator kLPI2C_2PinPushPullWithSeparateSlave: LPI2C Configured for 2-pin push-pull mode with separate LPI2C slave

enumerator kLPI2C_4PinPushPullWithInvertedOutput: LPI2C Configured for 4-pin push-pull mode(inverted outputs)

enum _lpi2c_host_request_source

LPI2C master host request selection.

Values:

enumerator kLPI2C_HostRequestExternalPin: Select the LPI2C_HREQ pin as the host request input

enumerator kLPI2C_HostRequestInputTrigger: Select the input trigger as the host request input

enum _lpi2c_host_request_polarity

LPI2C master host request pin polarity configuration.

Values:

enumerator kLPI2C_HostRequestPinActiveLow: Configure the LPI2C_HREQ pin active low

enumerator kLPI2C_HostRequestPinActiveHigh: Configure the LPI2C_HREQ pin active high

enum _lpi2c_data_match_config_mode

LPI2C master data match configuration modes.

Values:

enumerator kLPI2C_MatchDisabled: LPI2C Match Disabled

enumerator kLPI2C_1stWordEqualsM0OrM1: LPI2C Match Enabled and 1st data word equals MATCH0 OR MATCH1

enumerator kLPI2C_AnyWordEqualsM0OrM1: LPI2C Match Enabled and any data word equals MATCH0 OR MATCH1

enumerator kLPI2C_1stWordEqualsM0And2ndWordEqualsM1: LPI2C Match Enabled and 1st data word equals MATCH0, 2nd data equals MATCH1

enumerator kLPI2C_AnyWordEqualsM0AndNextWordEqualsM1: LPI2C Match Enabled and any data word equals MATCH0, next data equals MATCH1

enumerator kLPI2C_1stWordAndM1EqualsM0AndM1: LPI2C Match Enabled and 1st data word and MATCH0 equals MATCH0 and MATCH1

enumerator kLPI2C_AnyWordAndM1EqualsM0AndM1: LPI2C Match Enabled and any data word and MATCH0 equals MATCH0 and MATCH1

enum _lpi2c_master_transfer_flags

Transfer option flags.

Note

These enumerations are intended to be OR’d together to form a bit mask of options for the _lpi2c_master_transfer::flags field.

Values:

enumerator kLPI2C_TransferDefaultFlag: Transfer starts with a start signal, stops with a stop signal.

enumerator kLPI2C_TransferNoStartFlag: Don’t send a start condition, address, and sub address

enumerator kLPI2C_TransferNoStopFlag: Don’t send a stop condition.

typedef enum _lpi2c_direction lpi2c_direction_t: Direction of master and slave transfers.

typedef enum _lpi2c_master_pin_config lpi2c_master_pin_config_t: LPI2C pin configuration.

typedef enum _lpi2c_host_request_source lpi2c_host_request_source_t: LPI2C master host request selection.

typedef enum _lpi2c_host_request_polarity lpi2c_host_request_polarity_t: LPI2C master host request pin polarity configuration.

typedef struct _lpi2c_master_config lpi2c_master_config_t

Structure with settings to initialize the LPI2C master module.

This structure holds configuration settings for the LPI2C peripheral. To initialize this structure to reasonable defaults, call the LPI2C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

typedef enum _lpi2c_data_match_config_mode lpi2c_data_match_config_mode_t: LPI2C master data match configuration modes.

typedef struct _lpi2c_match_config lpi2c_data_match_config_t: LPI2C master data match configuration structure.

typedef struct _lpi2c_master_transfer lpi2c_master_transfer_t: LPI2C master descriptor of the transfer.

typedef struct _lpi2c_master_handle lpi2c_master_handle_t: LPI2C master handle of the transfer.

typedef void (*lpi2c_master_transfer_callback_t)(LPI2C_Type *base, lpi2c_master_handle_t *handle, status_t completionStatus, void *userData)

Master completion callback function pointer type.

This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use in the call to LPI2C_MasterTransferCreateHandle().

Param base:: The LPI2C peripheral base address.
Param handle:: Pointer to the LPI2C master driver handle.
Param completionStatus:: Either kStatus_Success or an error code describing how the transfer completed.
Param userData:: Arbitrary pointer-sized value passed from the application.

typedef void (*lpi2c_master_isr_t)(LPI2C_Type *base, void *handle): Typedef for master interrupt handler, used internally for LPI2C master interrupt and EDMA transactional APIs.

struct _lpi2c_master_config

#include <fsl_lpi2c.h>

Structure with settings to initialize the LPI2C master module.

The configuration structure can be made constant so it resides in flash.

Public Members

bool enableMaster: Whether to enable master mode.

bool enableDoze: Whether master is enabled in doze mode.

bool debugEnable: Enable transfers to continue when halted in debug mode.

bool ignoreAck: Whether to ignore ACK/NACK.

lpi2c_master_pin_config_t pinConfig: The pin configuration option.

uint32_t baudRate_Hz: Desired baud rate in Hertz.

uint32_t busIdleTimeout_ns: Bus idle timeout in nanoseconds. Set to 0 to disable.

uint32_t pinLowTimeout_ns: Pin low timeout in nanoseconds. Set to 0 to disable.

uint8_t sdaGlitchFilterWidth_ns: Width in nanoseconds of glitch filter on SDA pin. Set to 0 to disable.

uint8_t sclGlitchFilterWidth_ns: Width in nanoseconds of glitch filter on SCL pin. Set to 0 to disable.

struct _lpi2c_master_config hostRequest: Host request options.

struct _lpi2c_match_config

#include <fsl_lpi2c.h>

LPI2C master data match configuration structure.

Public Members

lpi2c_data_match_config_mode_t matchMode: Data match configuration setting.

bool rxDataMatchOnly: When set to true, received data is ignored until a successful match.

uint32_t match0: Match value 0.

uint32_t match1: Match value 1.

struct _lpi2c_master_transfer

#include <fsl_lpi2c.h>

Non-blocking transfer descriptor structure.

This structure is used to pass transaction parameters to the LPI2C_MasterTransferNonBlocking() API.

Public Members

uint32_t flags: Bit mask of options for the transfer. See enumeration _lpi2c_master_transfer_flags for available options. Set to 0 or kLPI2C_TransferDefaultFlag for normal transfers.

uint16_t slaveAddress: The 7-bit slave address.

lpi2c_direction_t direction: Either kLPI2C_Read or kLPI2C_Write.

uint32_t subaddress: Sub address. Transferred MSB first.

size_t subaddressSize: Length of sub address to send in bytes. Maximum size is 4 bytes.

void *data: Pointer to data to transfer.

size_t dataSize: Number of bytes to transfer.

struct _lpi2c_master_handle

#include <fsl_lpi2c.h>

Driver handle for master non-blocking APIs.

Note

The contents of this structure are private and subject to change.

Public Members

uint8_t state: Transfer state machine current state.

uint16_t remainingBytes: Remaining byte count in current state.

uint8_t *buf: Buffer pointer for current state.

uint16_t commandBuffer[6]: LPI2C command sequence. When all 6 command words are used: Start&addr&write[1 word] + subaddr[4 words] + restart&addr&read[1 word]

lpi2c_master_transfer_t transfer: Copy of the current transfer info.

lpi2c_master_transfer_callback_t completionCallback: Callback function pointer.

void *userData: Application data passed to callback.

uint16_t chunkSize: Remaining byte count in current chunk.

struct hostRequest

Public Members

bool enable: Enable host request.

lpi2c_host_request_source_t source: Host request source.

lpi2c_host_request_polarity_t polarity: Host request pin polarity.

LPI2C Master DMA Driver#

void LPI2C_MasterCreateEDMAHandle(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle, edma_handle_t *rxDmaHandle, edma_handle_t *txDmaHandle, lpi2c_master_edma_transfer_callback_t callback, void *userData)

Create a new handle for the LPI2C master DMA APIs.

The creation of a handle is for use with the DMA APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the LPI2C_MasterTransferAbortEDMA() API shall be called.

For devices where the LPI2C send and receive DMA requests are OR’d together, the txDmaHandle parameter is ignored and may be set to NULL.

Parameters:

base – The LPI2C peripheral base address.
handle – [out] Pointer to the LPI2C master driver handle.
rxDmaHandle – Handle for the eDMA receive channel. Created by the user prior to calling this function.
txDmaHandle – Handle for the eDMA transmit channel. Created by the user prior to calling this function.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.

status_t LPI2C_MasterTransferEDMA(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle, lpi2c_master_transfer_t *transfer)

Performs a non-blocking DMA-based transaction on the I2C bus.

The callback specified when the handle was created is invoked when the transaction has completed.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to the LPI2C master driver handle.
transfer – The pointer to the transfer descriptor.

Return values:

kStatus_Success – The transaction was started successfully.
kStatus_LPI2C_Busy – Either another master is currently utilizing the bus, or another DMA transaction is already in progress.

status_t LPI2C_MasterTransferGetCountEDMA(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle, size_t *count)

Returns number of bytes transferred so far.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to the LPI2C master driver handle.
count – [out] Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_Success –
kStatus_NoTransferInProgress – There is not a DMA transaction currently in progress.

status_t LPI2C_MasterTransferAbortEDMA(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle)

Terminates a non-blocking LPI2C master transmission early.

Note

It is not safe to call this function from an IRQ handler that has a higher priority than the eDMA peripheral’s IRQ priority.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to the LPI2C master driver handle.

Return values:

kStatus_Success – A transaction was successfully aborted.
kStatus_LPI2C_Idle – There is not a DMA transaction currently in progress.

typedef struct _lpi2c_master_edma_handle lpi2c_master_edma_handle_t: LPI2C master EDMA handle of the transfer.

typedef void (*lpi2c_master_edma_transfer_callback_t)(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle, status_t completionStatus, void *userData)

Master DMA completion callback function pointer type.

This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use in the call to LPI2C_MasterCreateEDMAHandle().

Param base:: The LPI2C peripheral base address.
Param handle:: Handle associated with the completed transfer.
Param completionStatus:: Either kStatus_Success or an error code describing how the transfer completed.
Param userData:: Arbitrary pointer-sized value passed from the application.

struct _lpi2c_master_edma_handle

#include <fsl_lpi2c_edma.h>

Driver handle for master DMA APIs.

Note

The contents of this structure are private and subject to change.

Public Members

LPI2C_Type *base: LPI2C base pointer.

bool isBusy: Transfer state machine current state.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

uint16_t commandBuffer[20]: LPI2C command sequence. When all 10 command words are used: Start&addr&write[1 word] + subaddr[4 words] + restart&addr&read[1 word] + receive&Size[4 words]

lpi2c_master_transfer_t transfer: Copy of the current transfer info.

lpi2c_master_edma_transfer_callback_t completionCallback: Callback function pointer.

void *userData: Application data passed to callback.

edma_handle_t *rx: Handle for receive DMA channel.

edma_handle_t *tx: Handle for transmit DMA channel.

edma_tcd_t tcds[3]: Software TCD. Three are allocated to provide enough room to align to 32-bytes.

LPI2C Slave Driver#

void LPI2C_SlaveGetDefaultConfig(lpi2c_slave_config_t *slaveConfig)

Provides a default configuration for the LPI2C slave peripheral.

This function provides the following default configuration for the LPI2C slave peripheral:

slaveConfig->enableSlave               = true;
slaveConfig->address0                  = 0U;
slaveConfig->address1                  = 0U;
slaveConfig->addressMatchMode          = kLPI2C_MatchAddress0;
slaveConfig->filterDozeEnable          = true;
slaveConfig->filterEnable              = true;
slaveConfig->enableGeneralCall         = false;
slaveConfig->sclStall.enableAck        = false;
slaveConfig->sclStall.enableTx         = true;
slaveConfig->sclStall.enableRx         = true;
slaveConfig->sclStall.enableAddress    = true;
slaveConfig->ignoreAck                 = false;
slaveConfig->enableReceivedAddressRead = false;
slaveConfig->sdaGlitchFilterWidth_ns   = 0;
slaveConfig->sclGlitchFilterWidth_ns   = 0;
slaveConfig->dataValidDelay_ns         = 0;
slaveConfig->clockHoldTime_ns          = 0;

After calling this function, override any settings to customize the configuration, prior to initializing the master driver with LPI2C_SlaveInit(). Be sure to override at least the address0 member of the configuration structure with the desired slave address.

Parameters:

slaveConfig – [out] User provided configuration structure that is set to default values. Refer to lpi2c_slave_config_t.

void LPI2C_SlaveInit(LPI2C_Type *base, const lpi2c_slave_config_t *slaveConfig, uint32_t sourceClock_Hz)

Initializes the LPI2C slave peripheral.

This function enables the peripheral clock and initializes the LPI2C slave peripheral as described by the user provided configuration.

Parameters:

base – The LPI2C peripheral base address.
slaveConfig – User provided peripheral configuration. Use LPI2C_SlaveGetDefaultConfig() to get a set of defaults that you can override.
sourceClock_Hz – Frequency in Hertz of the LPI2C functional clock. Used to calculate the filter widths, data valid delay, and clock hold time.

void LPI2C_SlaveDeinit(LPI2C_Type *base)

Deinitializes the LPI2C slave peripheral.

This function disables the LPI2C slave peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The LPI2C peripheral base address.

static inline void LPI2C_SlaveReset(LPI2C_Type *base)

Performs a software reset of the LPI2C slave peripheral.

Parameters:

base – The LPI2C peripheral base address.

static inline void LPI2C_SlaveEnable(LPI2C_Type *base, bool enable)

Enables or disables the LPI2C module as slave.

Parameters:

base – The LPI2C peripheral base address.
enable – Pass true to enable or false to disable the specified LPI2C as slave.

static inline uint32_t LPI2C_SlaveGetStatusFlags(LPI2C_Type *base)

Gets the LPI2C slave status flags.

A bit mask with the state of all LPI2C slave status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also

_lpi2c_slave_flags

Parameters:

base – The LPI2C peripheral base address.

Returns:

State of the status flags:

1: related status flag is set.
0: related status flag is not set.

static inline void LPI2C_SlaveClearStatusFlags(LPI2C_Type *base, uint32_t statusMask)

Clears the LPI2C status flag state.

The following status register flags can be cleared:

kLPI2C_SlaveRepeatedStartDetectFlag
kLPI2C_SlaveStopDetectFlag
kLPI2C_SlaveBitErrFlag
kLPI2C_SlaveFifoErrFlag

Attempts to clear other flags has no effect.

See also

_lpi2c_slave_flags.

Parameters:

base – The LPI2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _lpi2c_slave_flags enumerators OR’d together. You may pass the result of a previous call to LPI2C_SlaveGetStatusFlags().

static inline void LPI2C_SlaveEnableInterrupts(LPI2C_Type *base, uint32_t interruptMask)

Enables the LPI2C slave interrupt requests.

All flags except kLPI2C_SlaveBusyFlag and kLPI2C_SlaveBusBusyFlag can be enabled as interrupts.

Parameters:

base – The LPI2C peripheral base address.
interruptMask – Bit mask of interrupts to enable. See _lpi2c_slave_flags for the set of constants that should be OR’d together to form the bit mask.

static inline void LPI2C_SlaveDisableInterrupts(LPI2C_Type *base, uint32_t interruptMask)

Disables the LPI2C slave interrupt requests.

All flags except kLPI2C_SlaveBusyFlag and kLPI2C_SlaveBusBusyFlag can be enabled as interrupts.

Parameters:

base – The LPI2C peripheral base address.
interruptMask – Bit mask of interrupts to disable. See _lpi2c_slave_flags for the set of constants that should be OR’d together to form the bit mask.

static inline uint32_t LPI2C_SlaveGetEnabledInterrupts(LPI2C_Type *base)

Returns the set of currently enabled LPI2C slave interrupt requests.

Parameters:

base – The LPI2C peripheral base address.

Returns:

A bitmask composed of _lpi2c_slave_flags enumerators OR’d together to indicate the set of enabled interrupts.

static inline void LPI2C_SlaveEnableDMA(LPI2C_Type *base, bool enableAddressValid, bool enableRx, bool enableTx)

Enables or disables the LPI2C slave peripheral DMA requests.

Parameters:

base – The LPI2C peripheral base address.
enableAddressValid – Enable flag for the address valid DMA request. Pass true for enable, false for disable. The address valid DMA request is shared with the receive data DMA request.
enableRx – Enable flag for the receive data DMA request. Pass true for enable, false for disable.
enableTx – Enable flag for the transmit data DMA request. Pass true for enable, false for disable.

static inline bool LPI2C_SlaveGetBusIdleState(LPI2C_Type *base)

Returns whether the bus is idle.

Requires the slave mode to be enabled.

Parameters:

base – The LPI2C peripheral base address.

Return values:

true – Bus is busy.
false – Bus is idle.

static inline void LPI2C_SlaveTransmitAck(LPI2C_Type *base, bool ackOrNack)

Transmits either an ACK or NAK on the I2C bus in response to a byte from the master.

Use this function to send an ACK or NAK when the kLPI2C_SlaveTransmitAckFlag is asserted. This only happens if you enable the sclStall.enableAck field of the lpi2c_slave_config_t configuration structure used to initialize the slave peripheral.

Parameters:

base – The LPI2C peripheral base address.
ackOrNack – Pass true for an ACK or false for a NAK.

static inline void LPI2C_SlaveEnableAckStall(LPI2C_Type *base, bool enable)

Enables or disables ACKSTALL.

When enables ACKSTALL, software can transmit either an ACK or NAK on the I2C bus in response to a byte from the master.

Parameters:

base – The LPI2C peripheral base address.
enable – True will enable ACKSTALL,false will disable ACKSTALL.

static inline uint32_t LPI2C_SlaveGetReceivedAddress(LPI2C_Type *base)

Returns the slave address sent by the I2C master.

This function should only be called if the kLPI2C_SlaveAddressValidFlag is asserted.

Parameters:

base – The LPI2C peripheral base address.

Returns:

The 8-bit address matched by the LPI2C slave. Bit 0 contains the R/w direction bit, and the 7-bit slave address is in the upper 7 bits.

status_t LPI2C_SlaveSend(LPI2C_Type *base, void *txBuff, size_t txSize, size_t *actualTxSize)

Performs a polling send transfer on the I2C bus.

Parameters:

base – The LPI2C peripheral base address.
txBuff – The pointer to the data to be transferred.
txSize – The length in bytes of the data to be transferred.
actualTxSize – [out]

Returns:

Error or success status returned by API.

status_t LPI2C_SlaveReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize, size_t *actualRxSize)

Performs a polling receive transfer on the I2C bus.

Parameters:

base – The LPI2C peripheral base address.
rxBuff – The pointer to the data to be transferred.
rxSize – The length in bytes of the data to be transferred.
actualRxSize – [out]

Returns:

Error or success status returned by API.

void LPI2C_SlaveTransferCreateHandle(LPI2C_Type *base, lpi2c_slave_handle_t *handle, lpi2c_slave_transfer_callback_t callback, void *userData)

Creates a new handle for the LPI2C slave non-blocking APIs.

Note

Parameters:

base – The LPI2C peripheral base address.
handle – [out] Pointer to the LPI2C slave driver handle.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.

status_t LPI2C_SlaveTransferNonBlocking(LPI2C_Type *base, lpi2c_slave_handle_t *handle, uint32_t eventMask)

Starts accepting slave transfers.

Call this API after calling I2C_SlaveInit() and LPI2C_SlaveTransferCreateHandle() to start processing transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the callback that was passed into the call to LPI2C_SlaveTransferCreateHandle(). The callback is always invoked from the interrupt context.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of lpi2c_slave_transfer_event_t enumerators for the events you wish to receive. The kLPI2C_SlaveTransmitEvent and kLPI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kLPI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to lpi2c_slave_handle_t structure which stores the transfer state.
eventMask – Bit mask formed by OR’ing together lpi2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kLPI2C_SlaveAllEvents to enable all events.

Return values:

kStatus_Success – Slave transfers were successfully started.
kStatus_LPI2C_Busy – Slave transfers have already been started on this handle.

status_t LPI2C_SlaveTransferGetCount(LPI2C_Type *base, lpi2c_slave_handle_t *handle, size_t *count)

Gets the slave transfer status during a non-blocking transfer.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure.
count – [out] Pointer to a value to hold the number of bytes transferred. May be NULL if the count is not required.

Return values:

kStatus_Success –
kStatus_NoTransferInProgress –

void LPI2C_SlaveTransferAbort(LPI2C_Type *base, lpi2c_slave_handle_t *handle)

Aborts the slave non-blocking transfers.

Note

This API could be called at any time to stop slave for handling the bus events.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to lpi2c_slave_handle_t structure which stores the transfer state.

void LPI2C_SlaveTransferHandleIRQ(LPI2C_Type *base, lpi2c_slave_handle_t *handle)

Reusable routine to handle slave interrupts.

Note

This function does not need to be called unless you are reimplementing the non blocking API’s interrupt handler routines to add special functionality.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to lpi2c_slave_handle_t structure which stores the transfer state.

enum _lpi2c_slave_flags

LPI2C slave peripheral flags.

The following status register flags can be cleared:

kLPI2C_SlaveRepeatedStartDetectFlag
kLPI2C_SlaveStopDetectFlag
kLPI2C_SlaveBitErrFlag
kLPI2C_SlaveFifoErrFlag

All flags except kLPI2C_SlaveBusyFlag and kLPI2C_SlaveBusBusyFlag can be enabled as interrupts.

Note

These enumerations are meant to be OR’d together to form a bit mask.

Values:

enumerator kLPI2C_SlaveTxReadyFlag: Transmit data flag

enumerator kLPI2C_SlaveRxReadyFlag: Receive data flag

enumerator kLPI2C_SlaveAddressValidFlag: Address valid flag

enumerator kLPI2C_SlaveTransmitAckFlag: Transmit ACK flag

enumerator kLPI2C_SlaveRepeatedStartDetectFlag: Repeated start detect flag

enumerator kLPI2C_SlaveStopDetectFlag: Stop detect flag

enumerator kLPI2C_SlaveBitErrFlag: Bit error flag

enumerator kLPI2C_SlaveFifoErrFlag: FIFO error flag

enumerator kLPI2C_SlaveAddressMatch0Flag: Address match 0 flag

enumerator kLPI2C_SlaveAddressMatch1Flag: Address match 1 flag

enumerator kLPI2C_SlaveGeneralCallFlag: General call flag

enumerator kLPI2C_SlaveBusyFlag: Master busy flag

enumerator kLPI2C_SlaveBusBusyFlag: Bus busy flag

enumerator kLPI2C_SlaveClearFlags: All flags which are cleared by the driver upon starting a transfer.

enumerator kLPI2C_SlaveIrqFlags: IRQ sources enabled by the non-blocking transactional API.

enumerator kLPI2C_SlaveErrorFlags: Errors to check for.

enum _lpi2c_slave_address_match

LPI2C slave address match options.

Values:

enumerator kLPI2C_MatchAddress0: Match only address 0.

enumerator kLPI2C_MatchAddress0OrAddress1: Match either address 0 or address 1.

enumerator kLPI2C_MatchAddress0ThroughAddress1: Match a range of slave addresses from address 0 through address 1.

enum _lpi2c_slave_transfer_event

Set of events sent to the callback for non blocking slave transfers.

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to LPI2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

Values:

enumerator kLPI2C_SlaveAddressMatchEvent: Received the slave address after a start or repeated start.

enumerator kLPI2C_SlaveTransmitEvent: Callback is requested to provide data to transmit (slave-transmitter role).

enumerator kLPI2C_SlaveReceiveEvent: Callback is requested to provide a buffer in which to place received data (slave-receiver role).

enumerator kLPI2C_SlaveTransmitAckEvent: Callback needs to either transmit an ACK or NACK.

enumerator kLPI2C_SlaveRepeatedStartEvent: A repeated start was detected.

enumerator kLPI2C_SlaveCompletionEvent: A stop was detected, completing the transfer.

enumerator kLPI2C_SlaveAllEvents: Bit mask of all available events.

typedef enum _lpi2c_slave_address_match lpi2c_slave_address_match_t: LPI2C slave address match options.

typedef struct _lpi2c_slave_config lpi2c_slave_config_t

Structure with settings to initialize the LPI2C slave module.

This structure holds configuration settings for the LPI2C slave peripheral. To initialize this structure to reasonable defaults, call the LPI2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

typedef enum _lpi2c_slave_transfer_event lpi2c_slave_transfer_event_t

Set of events sent to the callback for non blocking slave transfers.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

typedef struct _lpi2c_slave_transfer lpi2c_slave_transfer_t: LPI2C slave transfer structure.

typedef struct _lpi2c_slave_handle lpi2c_slave_handle_t: LPI2C slave handle structure.

typedef void (*lpi2c_slave_transfer_callback_t)(LPI2C_Type *base, lpi2c_slave_transfer_t *transfer, void *userData)

Slave event callback function pointer type.

This callback is used only for the slave non-blocking transfer API. To install a callback, use the LPI2C_SlaveSetCallback() function after you have created a handle.

Param base:: Base address for the LPI2C instance on which the event occurred.
Param transfer:: Pointer to transfer descriptor containing values passed to and/or from the callback.
Param userData:: Arbitrary pointer-sized value passed from the application.

struct _lpi2c_slave_config

#include <fsl_lpi2c.h>

Structure with settings to initialize the LPI2C slave module.

The configuration structure can be made constant so it resides in flash.

Public Members

bool enableSlave: Enable slave mode.

uint8_t address0: Slave’s 7-bit address.

uint8_t address1: Alternate slave 7-bit address.

lpi2c_slave_address_match_t addressMatchMode: Address matching options.

bool filterDozeEnable: Enable digital glitch filter in doze mode.

bool filterEnable: Enable digital glitch filter.

bool enableGeneralCall: Enable general call address matching.

struct _lpi2c_slave_config sclStall: SCL stall enable options.

bool ignoreAck: Continue transfers after a NACK is detected.

bool enableReceivedAddressRead: Enable reading the address received address as the first byte of data.

uint32_t sdaGlitchFilterWidth_ns: Width in nanoseconds of the digital filter on the SDA signal. Set to 0 to disable.

uint32_t sclGlitchFilterWidth_ns: Width in nanoseconds of the digital filter on the SCL signal. Set to 0 to disable.

uint32_t dataValidDelay_ns: Width in nanoseconds of the data valid delay.

uint32_t clockHoldTime_ns: Width in nanoseconds of the clock hold time.

struct _lpi2c_slave_transfer

#include <fsl_lpi2c.h>

LPI2C slave transfer structure.

Public Members

lpi2c_slave_transfer_event_t event: Reason the callback is being invoked.

uint8_t receivedAddress: Matching address send by master.

uint8_t *data: Transfer buffer

size_t dataSize: Transfer size

status_t completionStatus: Success or error code describing how the transfer completed. Only applies for kLPI2C_SlaveCompletionEvent.

size_t transferredCount: Number of bytes actually transferred since start or last repeated start.

struct _lpi2c_slave_handle

#include <fsl_lpi2c.h>

LPI2C slave handle structure.

Note

The contents of this structure are private and subject to change.

Public Members

lpi2c_slave_transfer_t transfer: LPI2C slave transfer copy.

bool isBusy: Whether transfer is busy.

bool wasTransmit: Whether the last transfer was a transmit.

uint32_t eventMask: Mask of enabled events.

uint32_t transferredCount: Count of bytes transferred.

lpi2c_slave_transfer_callback_t callback: Callback function called at transfer event.

void *userData: Callback parameter passed to callback.

struct sclStall

Public Members

bool enableAck: Enables SCL clock stretching during slave-transmit address byte(s) and slave-receiver address and data byte(s) to allow software to write the Transmit ACK Register before the ACK or NACK is transmitted. Clock stretching occurs when transmitting the 9th bit. When enableAckSCLStall is enabled, there is no need to set either enableRxDataSCLStall or enableAddressSCLStall.

bool enableTx: Enables SCL clock stretching when the transmit data flag is set during a slave-transmit transfer.

bool enableRx: Enables SCL clock stretching when receive data flag is set during a slave-receive transfer.

bool enableAddress: Enables SCL clock stretching when the address valid flag is asserted.

LPIT: Low-Power Interrupt Timer#

void LPIT_Init(LPIT_Type *base, const lpit_config_t *config)

Ungates the LPIT clock and configures the peripheral for a basic operation.

This function issues a software reset to reset all channels and registers except the Module Control register.

Note

This API should be called at the beginning of the application using the LPIT driver.

Parameters:

base – LPIT peripheral base address.
config – Pointer to the user configuration structure.

void LPIT_Deinit(LPIT_Type *base)

Disables the module and gates the LPIT clock.

Parameters:

base – LPIT peripheral base address.

void LPIT_GetDefaultConfig(lpit_config_t *config)

Fills in the LPIT configuration structure with default settings.

The default values are:

config->enableRunInDebug = false;
config->enableRunInDoze = false;

Parameters:

config – Pointer to the user configuration structure.

status_t LPIT_SetupChannel(LPIT_Type *base, lpit_chnl_t channel, const lpit_chnl_params_t *chnlSetup)

Sets up an LPIT channel based on the user’s preference.

This function sets up the operation mode to one of the options available in the enumeration lpit_timer_modes_t. It sets the trigger source as either internal or external, trigger selection and the timers behaviour when a timeout occurs. It also chains the timer if a prior timer if requested by the user.

Parameters:

base – LPIT peripheral base address.
channel – Channel that is being configured.
chnlSetup – Configuration parameters.

static inline void LPIT_EnableInterrupts(LPIT_Type *base, uint32_t mask)

Enables the selected PIT interrupts.

Parameters:

base – LPIT peripheral base address.
mask – The interrupts to enable. This is a logical OR of members of the enumeration lpit_interrupt_enable_t

static inline void LPIT_DisableInterrupts(LPIT_Type *base, uint32_t mask)

Disables the selected PIT interrupts.

Parameters:

base – LPIT peripheral base address.
mask – The interrupts to enable. This is a logical OR of members of the enumeration lpit_interrupt_enable_t

static inline uint32_t LPIT_GetEnabledInterrupts(LPIT_Type *base)

Gets the enabled LPIT interrupts.

Parameters:

base – LPIT peripheral base address.

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration lpit_interrupt_enable_t

static inline uint32_t LPIT_GetStatusFlags(LPIT_Type *base)

Gets the LPIT status flags.

Parameters:

base – LPIT peripheral base address.

Returns:

The status flags. This is the logical OR of members of the enumeration lpit_status_flags_t

static inline void LPIT_ClearStatusFlags(LPIT_Type *base, uint32_t mask)

Clears the LPIT status flags.

Parameters:

base – LPIT peripheral base address.
mask – The status flags to clear. This is a logical OR of members of the enumeration lpit_status_flags_t

static inline void LPIT_SetTimerPeriod(LPIT_Type *base, lpit_chnl_t channel, uint32_t ticks)

Sets the timer period in units of count.

Timers begin counting down from the value set by this function until it reaches 0, at which point it generates an interrupt and loads this register value again. Writing a new value to this register does not restart the timer. Instead, the value is loaded after the timer expires.

Note

User can call the utility macros provided in fsl_common.h to convert to ticks.

Parameters:

base – LPIT peripheral base address.
channel – Timer channel number.
ticks – Timer period in units of ticks.

static inline void LPIT_SetTimerValue(LPIT_Type *base, lpit_chnl_t channel, uint32_t ticks)

Sets the timer period in units of count.

In the Dual 16-bit Periodic Counter mode, the counter will load and then the lower 16-bits will decrement down to zero, which will assert the output pre-trigger. The upper 16-bits will then decrement down to zero, which will negate the output pre-trigger and set the timer interrupt flag.

Note

Set TVAL register to 0 or 1 is invalid in compare mode.

Parameters:

base – LPIT peripheral base address.
channel – Timer channel number.
ticks – Timer period in units of ticks.

static inline uint32_t LPIT_GetCurrentTimerCount(LPIT_Type *base, lpit_chnl_t channel)

Reads the current timer counting value.

This function returns the real-time timer counting value, in a range from 0 to a timer period.

Note

User can call the utility macros provided in fsl_common.h to convert ticks to microseconds or milliseconds.

Parameters:

base – LPIT peripheral base address.
channel – Timer channel number.

Returns:

Current timer counting value in ticks.

static inline void LPIT_StartTimer(LPIT_Type *base, lpit_chnl_t channel)

Starts the timer counting.

After calling this function, timers load the period value and count down to 0. When the timer reaches 0, it generates a trigger pulse and sets the timeout interrupt flag.

Parameters:

base – LPIT peripheral base address.
channel – Timer channel number.

static inline void LPIT_StopTimer(LPIT_Type *base, lpit_chnl_t channel)

Stops the timer counting.

Parameters:

base – LPIT peripheral base address.
channel – Timer channel number.

FSL_LPIT_DRIVER_VERSION: Version 2.1.3

enum _lpit_chnl

List of LPIT channels.

Note

Actual number of available channels is SoC-dependent

Values:

enumerator kLPIT_Chnl_0: LPIT channel number 0

enumerator kLPIT_Chnl_1: LPIT channel number 1

enumerator kLPIT_Chnl_2: LPIT channel number 2

enumerator kLPIT_Chnl_3: LPIT channel number 3

enum _lpit_timer_modes

Mode options available for the LPIT timer.

Values:

enumerator kLPIT_PeriodicCounter: Use the all 32-bits, counter loads and decrements to zero

enumerator kLPIT_DualPeriodicCounter: Counter loads, lower 16-bits decrement to zero, then upper 16-bits decrement

enumerator kLPIT_TriggerAccumulator: Counter loads on first trigger and decrements on each trigger

enumerator kLPIT_InputCapture: Counter loads with 0xFFFFFFFF, decrements to zero. It stores the inverse of the current value when a input trigger is detected

enum _lpit_trigger_select

Trigger options available.

This is used for both internal and external trigger sources. The actual trigger options available is SoC-specific, user should refer to the reference manual.

Values:

enumerator kLPIT_Trigger_TimerChn0: Channel 0 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn1: Channel 1 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn2: Channel 2 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn3: Channel 3 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn4: Channel 4 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn5: Channel 5 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn6: Channel 6 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn7: Channel 7 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn8: Channel 8 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn9: Channel 9 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn10: Channel 10 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn11: Channel 11 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn12: Channel 12 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn13: Channel 13 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn14: Channel 14 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn15: Channel 15 is selected as a trigger source

enum _lpit_trigger_source

Trigger source options available.

Values:

enumerator kLPIT_TriggerSource_External: Use external trigger input

enumerator kLPIT_TriggerSource_Internal: Use internal trigger

enum _lpit_interrupt_enable

List of LPIT interrupts.

Note

Number of timer channels are SoC-specific. See the SoC Reference Manual.

Values:

enumerator kLPIT_Channel0TimerInterruptEnable: Channel 0 Timer interrupt

enumerator kLPIT_Channel1TimerInterruptEnable: Channel 1 Timer interrupt

enumerator kLPIT_Channel2TimerInterruptEnable: Channel 2 Timer interrupt

enumerator kLPIT_Channel3TimerInterruptEnable: Channel 3 Timer interrupt

enum _lpit_status_flags

List of LPIT status flags.

Note

Number of timer channels are SoC-specific. See the SoC Reference Manual.

Values:

enumerator kLPIT_Channel0TimerFlag: Channel 0 Timer interrupt flag

enumerator kLPIT_Channel1TimerFlag: Channel 1 Timer interrupt flag

enumerator kLPIT_Channel2TimerFlag: Channel 2 Timer interrupt flag

enumerator kLPIT_Channel3TimerFlag: Channel 3 Timer interrupt flag

typedef enum _lpit_chnl lpit_chnl_t: List of LPIT channels.

Note

Actual number of available channels is SoC-dependent

typedef enum _lpit_timer_modes lpit_timer_modes_t: Mode options available for the LPIT timer.

typedef enum _lpit_trigger_select lpit_trigger_select_t

Trigger options available.

This is used for both internal and external trigger sources. The actual trigger options available is SoC-specific, user should refer to the reference manual.

typedef enum _lpit_trigger_source lpit_trigger_source_t: Trigger source options available.

typedef enum _lpit_interrupt_enable lpit_interrupt_enable_t: List of LPIT interrupts.

Note

Number of timer channels are SoC-specific. See the SoC Reference Manual.

typedef enum _lpit_status_flags lpit_status_flags_t: List of LPIT status flags.

Note

Number of timer channels are SoC-specific. See the SoC Reference Manual.

typedef struct _lpit_chnl_params lpit_chnl_params_t: Structure to configure the channel timer.

typedef struct _lpit_config lpit_config_t

LPIT configuration structure.

This structure holds the configuration settings for the LPIT peripheral. To initialize this structure to reasonable defaults, call the LPIT_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

static void LPIT_ResetStateDelay(void)

Short wait for LPIT state reset.

After clear or set LPIT_EN, there should be delay longer than 4 LPIT functional clock.

static inline void LPIT_Reset(LPIT_Type *base)

Performs a software reset on the LPIT module.

This resets all channels and registers except the Module Control Register.

Parameters:

base – LPIT peripheral base address.

LPIT_RESET_STATE_DELAY

Delay used in LPIT_Reset.

The macro value should be larger than 4 * core clock / LPIT peripheral clock.

struct _lpit_chnl_params

#include <fsl_lpit.h>

Structure to configure the channel timer.

Public Members

bool chainChannel: true: Timer chained to previous timer; false: Timer not chained

lpit_timer_modes_t timerMode: Timers mode of operation.

lpit_trigger_select_t triggerSelect: Trigger selection for the timer

lpit_trigger_source_t triggerSource: Decides if we use external or internal trigger.

bool enableReloadOnTrigger: true: Timer reloads when a trigger is detected; false: No effect

bool enableStopOnTimeout: true: Timer will stop after timeout; false: does not stop after timeout

bool enableStartOnTrigger: true: Timer starts when a trigger is detected; false: decrement immediately

struct _lpit_config

#include <fsl_lpit.h>

LPIT configuration structure.

The configuration structure can be made constant so as to reside in flash.

Public Members

bool enableRunInDebug: true: Timers run in debug mode; false: Timers stop in debug mode

bool enableRunInDoze: true: Timers run in doze mode; false: Timers stop in doze mode

LPSPI: Low Power Serial Peripheral Interface#

LPSPI Peripheral driver#

void LPSPI_MasterInit(LPSPI_Type *base, const lpspi_master_config_t *masterConfig, uint32_t srcClock_Hz)

Initializes the LPSPI master.

Parameters:

base – LPSPI peripheral address.
masterConfig – Pointer to structure lpspi_master_config_t.
srcClock_Hz – Module source input clock in Hertz

void LPSPI_MasterGetDefaultConfig(lpspi_master_config_t *masterConfig)

Sets the lpspi_master_config_t structure to default values.

This API initializes the configuration structure for LPSPI_MasterInit(). The initialized structure can remain unchanged in LPSPI_MasterInit(), or can be modified before calling the LPSPI_MasterInit(). Example:

lpspi_master_config_t  masterConfig;
LPSPI_MasterGetDefaultConfig(&masterConfig);

Parameters:

masterConfig – pointer to lpspi_master_config_t structure

void LPSPI_SlaveInit(LPSPI_Type *base, const lpspi_slave_config_t *slaveConfig)

LPSPI slave configuration.

Parameters:

base – LPSPI peripheral address.
slaveConfig – Pointer to a structure lpspi_slave_config_t.

void LPSPI_SlaveGetDefaultConfig(lpspi_slave_config_t *slaveConfig)

Sets the lpspi_slave_config_t structure to default values.

This API initializes the configuration structure for LPSPI_SlaveInit(). The initialized structure can remain unchanged in LPSPI_SlaveInit() or can be modified before calling the LPSPI_SlaveInit(). Example:

lpspi_slave_config_t  slaveConfig;
LPSPI_SlaveGetDefaultConfig(&slaveConfig);

Parameters:

slaveConfig – pointer to lpspi_slave_config_t structure.

void LPSPI_Deinit(LPSPI_Type *base)

De-initializes the LPSPI peripheral. Call this API to disable the LPSPI clock.

Parameters:

base – LPSPI peripheral address.

void LPSPI_Reset(LPSPI_Type *base)

Restores the LPSPI peripheral to reset state. Note that this function sets all registers to reset state. As a result, the LPSPI module can’t work after calling this API.

Parameters:

base – LPSPI peripheral address.

uint32_t LPSPI_GetInstance(LPSPI_Type *base)

Get the LPSPI instance from peripheral base address.

Parameters:

base – LPSPI peripheral base address.

Returns:

LPSPI instance.

static inline void LPSPI_Enable(LPSPI_Type *base, bool enable)

Enables the LPSPI peripheral and sets the MCR MDIS to 0.

Parameters:

base – LPSPI peripheral address.
enable – Pass true to enable module, false to disable module.

static inline uint32_t LPSPI_GetStatusFlags(LPSPI_Type *base)

Gets the LPSPI status flag state.

Parameters:

base – LPSPI peripheral address.

Returns:

The LPSPI status(in SR register).

static inline uint8_t LPSPI_GetTxFifoSize(LPSPI_Type *base)

Gets the LPSPI Tx FIFO size.

Parameters:

base – LPSPI peripheral address.

Returns:

The LPSPI Tx FIFO size.

static inline uint8_t LPSPI_GetRxFifoSize(LPSPI_Type *base)

Gets the LPSPI Rx FIFO size.

Parameters:

base – LPSPI peripheral address.

Returns:

The LPSPI Rx FIFO size.

static inline uint32_t LPSPI_GetTxFifoCount(LPSPI_Type *base)

Gets the LPSPI Tx FIFO count.

Parameters:

base – LPSPI peripheral address.

Returns:

The number of words in the transmit FIFO.

static inline uint32_t LPSPI_GetRxFifoCount(LPSPI_Type *base)

Gets the LPSPI Rx FIFO count.

Parameters:

base – LPSPI peripheral address.

Returns:

The number of words in the receive FIFO.

static inline void LPSPI_ClearStatusFlags(LPSPI_Type *base, uint32_t statusFlags)

Clears the LPSPI status flag.

This function clears the desired status bit by using a write-1-to-clear. The user passes in the base and the desired status flag bit to clear. The list of status flags is defined in the _lpspi_flags. Example usage:

LPSPI_ClearStatusFlags(base, kLPSPI_TxDataRequestFlag|kLPSPI_RxDataReadyFlag);

Parameters:

base – LPSPI peripheral address.
statusFlags – The status flag used from type _lpspi_flags.

static inline uint32_t LPSPI_GetTcr(LPSPI_Type *base)

static inline void LPSPI_EnableInterrupts(LPSPI_Type *base, uint32_t mask)

Enables the LPSPI interrupts.

This function configures the various interrupt masks of the LPSPI. The parameters are base and an interrupt mask. Note that, for Tx fill and Rx FIFO drain requests, enabling the interrupt request disables the DMA request.

LPSPI_EnableInterrupts(base, kLPSPI_TxInterruptEnable | kLPSPI_RxInterruptEnable );

Parameters:

base – LPSPI peripheral address.
mask – The interrupt mask; Use the enum _lpspi_interrupt_enable.

static inline void LPSPI_DisableInterrupts(LPSPI_Type *base, uint32_t mask)

Disables the LPSPI interrupts.

LPSPI_DisableInterrupts(base, kLPSPI_TxInterruptEnable | kLPSPI_RxInterruptEnable );

Parameters:

base – LPSPI peripheral address.
mask – The interrupt mask; Use the enum _lpspi_interrupt_enable.

static inline void LPSPI_EnableDMA(LPSPI_Type *base, uint32_t mask)

Enables the LPSPI DMA request.

This function configures the Rx and Tx DMA mask of the LPSPI. The parameters are base and a DMA mask.

LPSPI_EnableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);

Parameters:

base – LPSPI peripheral address.
mask – The interrupt mask; Use the enum _lpspi_dma_enable.

static inline void LPSPI_DisableDMA(LPSPI_Type *base, uint32_t mask)

Disables the LPSPI DMA request.

This function configures the Rx and Tx DMA mask of the LPSPI. The parameters are base and a DMA mask.

SPI_DisableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);

Parameters:

base – LPSPI peripheral address.
mask – The interrupt mask; Use the enum _lpspi_dma_enable.

static inline uint32_t LPSPI_GetTxRegisterAddress(LPSPI_Type *base)

Gets the LPSPI Transmit Data Register address for a DMA operation.

This function gets the LPSPI Transmit Data Register address because this value is needed for the DMA operation. This function can be used for either master or slave mode.

Parameters:

base – LPSPI peripheral address.

Returns:

The LPSPI Transmit Data Register address.

static inline uint32_t LPSPI_GetRxRegisterAddress(LPSPI_Type *base)

Gets the LPSPI Receive Data Register address for a DMA operation.

This function gets the LPSPI Receive Data Register address because this value is needed for the DMA operation. This function can be used for either master or slave mode.

Parameters:

base – LPSPI peripheral address.

Returns:

The LPSPI Receive Data Register address.

bool LPSPI_CheckTransferArgument(LPSPI_Type *base, lpspi_transfer_t *transfer, bool isEdma)

Check the argument for transfer .

Parameters:

base – LPSPI peripheral address.
transfer – the transfer struct to be used.
isEdma – True to check for EDMA transfer, false to check interrupt non-blocking transfer

Returns:

Return true for right and false for wrong.

static inline void LPSPI_SetMasterSlaveMode(LPSPI_Type *base, lpspi_master_slave_mode_t mode)

Configures the LPSPI for either master or slave.

Note that the CFGR1 should only be written when the LPSPI is disabled (LPSPIx_CR_MEN = 0).

Parameters:

base – LPSPI peripheral address.
mode – Mode setting (master or slave) of type lpspi_master_slave_mode_t.

static inline void LPSPI_SelectTransferPCS(LPSPI_Type *base, lpspi_which_pcs_t select)

Configures the peripheral chip select used for the transfer.

Parameters:

base – LPSPI peripheral address.
select – LPSPI Peripheral Chip Select (PCS) configuration.

static inline void LPSPI_SetPCSContinous(LPSPI_Type *base, bool IsContinous)

Set the PCS signal to continuous or uncontinuous mode.

Note

In master mode, continuous transfer will keep the PCS asserted at the end of the frame size, until a command word is received that starts a new frame. So PCS must be set back to uncontinuous when transfer finishes. In slave mode, when continuous transfer is enabled, the LPSPI will only transmit the first frame size bits, after that the LPSPI will transmit received data back (assuming a 32-bit shift register).

Parameters:

base – LPSPI peripheral address.
IsContinous – True to set the transfer PCS to continuous mode, false to set to uncontinuous mode.

static inline bool LPSPI_IsMaster(LPSPI_Type *base)

Returns whether the LPSPI module is in master mode.

Parameters:

base – LPSPI peripheral address.

Returns:

Returns true if the module is in master mode or false if the module is in slave mode.

static inline void LPSPI_FlushFifo(LPSPI_Type *base, bool flushTxFifo, bool flushRxFifo)

Flushes the LPSPI FIFOs.

Parameters:

base – LPSPI peripheral address.
flushTxFifo – Flushes (true) the Tx FIFO, else do not flush (false) the Tx FIFO.
flushRxFifo – Flushes (true) the Rx FIFO, else do not flush (false) the Rx FIFO.

static inline void LPSPI_SetFifoWatermarks(LPSPI_Type *base, uint32_t txWater, uint32_t rxWater)

Sets the transmit and receive FIFO watermark values.

This function allows the user to set the receive and transmit FIFO watermarks. The function does not compare the watermark settings to the FIFO size. The FIFO watermark should not be equal to or greater than the FIFO size. It is up to the higher level driver to make this check.

Parameters:

base – LPSPI peripheral address.
txWater – The TX FIFO watermark value. Writing a value equal or greater than the FIFO size is truncated.
rxWater – The RX FIFO watermark value. Writing a value equal or greater than the FIFO size is truncated.

static inline void LPSPI_SetAllPcsPolarity(LPSPI_Type *base, uint32_t mask)

Configures all LPSPI peripheral chip select polarities simultaneously.

Note that the CFGR1 should only be written when the LPSPI is disabled (LPSPIx_CR_MEN = 0).

This is an example: PCS0 and PCS1 set to active low and other PCSs set to active high. Note that the number of PCS is device-specific.

LPSPI_SetAllPcsPolarity(base, kLPSPI_Pcs0ActiveLow | kLPSPI_Pcs1ActiveLow);

Parameters:

base – LPSPI peripheral address.
mask – The PCS polarity mask; Use the enum _lpspi_pcs_polarity.

static inline void LPSPI_SetFrameSize(LPSPI_Type *base, uint32_t frameSize)

Configures the frame size.

The minimum frame size is 8-bits and the maximum frame size is 4096-bits. If the frame size is less than or equal to 32-bits, the word size and frame size are identical. If the frame size is greater than 32-bits, the word size is 32-bits for each word except the last (the last word contains the remainder bits if the frame size is not divisible by 32). The minimum word size is 2-bits. A frame size of 33-bits (or similar) is not supported.

Note 1: The transmit command register should be initialized before enabling the LPSPI in slave mode, although the command register does not update until after the LPSPI is enabled. After it is enabled, the transmit command register should only be changed if the LPSPI is idle.

Note 2: The transmit and command FIFO is a combined FIFO that includes both transmit data and command words. That means the TCR register should be written to when the Tx FIFO is not full.

Parameters:

base – LPSPI peripheral address.
frameSize – The frame size in number of bits.

uint32_t LPSPI_MasterSetBaudRate(LPSPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz, uint32_t *tcrPrescaleValue)

Sets the LPSPI baud rate in bits per second.

This function takes in the desired bitsPerSec (baud rate) and calculates the nearest possible baud rate without exceeding the desired baud rate and returns the calculated baud rate in bits-per-second. It requires the caller to provide the frequency of the module source clock (in Hertz). Note that the baud rate does not go into effect until the Transmit Control Register (TCR) is programmed with the prescale value. Hence, this function returns the prescale tcrPrescaleValue parameter for later programming in the TCR. The higher level peripheral driver should alert the user of an out of range baud rate input.

Note that the LPSPI module must first be disabled before configuring this. Note that the LPSPI module must be configured for master mode before configuring this.

Parameters:

base – LPSPI peripheral address.
baudRate_Bps – The desired baud rate in bits per second.
srcClock_Hz – Module source input clock in Hertz.
tcrPrescaleValue – The TCR prescale value needed to program the TCR.

Returns:

The actual calculated baud rate. This function may also return a “0” if the LPSPI is not configured for master mode or if the LPSPI module is not disabled.

void LPSPI_MasterSetDelayScaler(LPSPI_Type *base, uint32_t scaler, lpspi_delay_type_t whichDelay)

Manually configures a specific LPSPI delay parameter (module must be disabled to change the delay values).

This function configures the following: SCK to PCS delay, or PCS to SCK delay, or The configurations must occur between the transfer delay.

The delay names are available in type lpspi_delay_type_t.

The user passes the desired delay along with the delay value. This allows the user to directly set the delay values if they have pre-calculated them or if they simply wish to manually increment the value.

Note that the LPSPI module must first be disabled before configuring this. Note that the LPSPI module must be configured for master mode before configuring this.

Parameters:

base – LPSPI peripheral address.
scaler – The 8-bit delay value 0x00 to 0xFF (255).
whichDelay – The desired delay to configure, must be of type lpspi_delay_type_t.

uint32_t LPSPI_MasterSetDelayTimes(LPSPI_Type *base, uint32_t delayTimeInNanoSec, lpspi_delay_type_t whichDelay, uint32_t srcClock_Hz)

Calculates the delay based on the desired delay input in nanoseconds (module must be disabled to change the delay values).

This function calculates the values for the following: SCK to PCS delay, or PCS to SCK delay, or The configurations must occur between the transfer delay.

The delay names are available in type lpspi_delay_type_t.

The user passes the desired delay and the desired delay value in nano-seconds. The function calculates the value needed for the desired delay parameter and returns the actual calculated delay because an exact delay match may not be possible. In this case, the closest match is calculated without going below the desired delay value input. It is possible to input a very large delay value that exceeds the capability of the part, in which case the maximum supported delay is returned. It is up to the higher level peripheral driver to alert the user of an out of range delay input.

Note that the LPSPI module must be configured for master mode before configuring this. And note that the delayTime = LPSPI_clockSource / (PRESCALE * Delay_scaler).

Parameters:

base – LPSPI peripheral address.
delayTimeInNanoSec – The desired delay value in nano-seconds.
whichDelay – The desired delay to configuration, which must be of type lpspi_delay_type_t.
srcClock_Hz – Module source input clock in Hertz.

Returns:

actual Calculated delay value in nano-seconds.

static inline void LPSPI_WriteData(LPSPI_Type *base, uint32_t data)

Writes data into the transmit data buffer.

This function writes data passed in by the user to the Transmit Data Register (TDR). The user can pass up to 32-bits of data to load into the TDR. If the frame size exceeds 32-bits, the user has to manage sending the data one 32-bit word at a time. Any writes to the TDR result in an immediate push to the transmit FIFO. This function can be used for either master or slave modes.

Parameters:

base – LPSPI peripheral address.
data – The data word to be sent.

static inline uint32_t LPSPI_ReadData(LPSPI_Type *base)

Reads data from the data buffer.

This function reads the data from the Receive Data Register (RDR). This function can be used for either master or slave mode.

Parameters:

base – LPSPI peripheral address.

Returns:

The data read from the data buffer.

void LPSPI_SetDummyData(LPSPI_Type *base, uint8_t dummyData)

Set up the dummy data.

Parameters:

base – LPSPI peripheral address.
dummyData – Data to be transferred when tx buffer is NULL. Note: This API has no effect when LPSPI in slave interrupt mode, because driver will set the TXMSK bit to 1 if txData is NULL, no data is loaded from transmit FIFO and output pin is tristated.

void LPSPI_MasterTransferCreateHandle(LPSPI_Type *base, lpspi_master_handle_t *handle, lpspi_master_transfer_callback_t callback, void *userData)

Initializes the LPSPI master handle.

This function initializes the LPSPI handle, which can be used for other LPSPI transactional APIs. Usually, for a specified LPSPI instance, call this API once to get the initialized handle.

Parameters:

base – LPSPI peripheral address.
handle – LPSPI handle pointer to lpspi_master_handle_t.
callback – DSPI callback.
userData – callback function parameter.

status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transfer)

LPSPI master transfer data using a polling method.

This function transfers data using a polling method. This is a blocking function, which does not return until all transfers have been completed.

Note: The transfer data size should be integer multiples of bytesPerFrame if bytesPerFrame is less than or equal to 4. For bytesPerFrame greater than 4: The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not integer multiples of 4. Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.

Parameters:

base – LPSPI peripheral address.
transfer – pointer to lpspi_transfer_t structure.

Returns:

status of status_t.

status_t LPSPI_MasterTransferNonBlocking(LPSPI_Type *base, lpspi_master_handle_t *handle, lpspi_transfer_t *transfer)

LPSPI master transfer data using an interrupt method.

This function transfers data using an interrupt method. This is a non-blocking function, which returns right away. When all data is transferred, the callback function is called.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_master_handle_t structure which stores the transfer state.
transfer – pointer to lpspi_transfer_t structure.

Returns:

status of status_t.

status_t LPSPI_MasterTransferGetCount(LPSPI_Type *base, lpspi_master_handle_t *handle, size_t *count)

Gets the master transfer remaining bytes.

This function gets the master transfer remaining bytes.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_master_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Returns:

status of status_t.

void LPSPI_MasterTransferAbort(LPSPI_Type *base, lpspi_master_handle_t *handle)

LPSPI master abort transfer which uses an interrupt method.

This function aborts a transfer which uses an interrupt method.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_master_handle_t structure which stores the transfer state.

void LPSPI_MasterTransferHandleIRQ(LPSPI_Type *base, lpspi_master_handle_t *handle)

LPSPI Master IRQ handler function.

This function processes the LPSPI transmit and receive IRQ.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_master_handle_t structure which stores the transfer state.

void LPSPI_SlaveTransferCreateHandle(LPSPI_Type *base, lpspi_slave_handle_t *handle, lpspi_slave_transfer_callback_t callback, void *userData)

Initializes the LPSPI slave handle.

This function initializes the LPSPI handle, which can be used for other LPSPI transactional APIs. Usually, for a specified LPSPI instance, call this API once to get the initialized handle.

Parameters:

base – LPSPI peripheral address.
handle – LPSPI handle pointer to lpspi_slave_handle_t.
callback – DSPI callback.
userData – callback function parameter.

status_t LPSPI_SlaveTransferNonBlocking(LPSPI_Type *base, lpspi_slave_handle_t *handle, lpspi_transfer_t *transfer)

LPSPI slave transfer data using an interrupt method.

This function transfer data using an interrupt method. This is a non-blocking function, which returns right away. When all data is transferred, the callback function is called.

Note: The transfer data size should be integer multiples of bytesPerFrame if bytesPerFrame is less than or equal to 4. For bytesPerFrame greater than 4: The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4. Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_slave_handle_t structure which stores the transfer state.
transfer – pointer to lpspi_transfer_t structure.

Returns:

status of status_t.

status_t LPSPI_SlaveTransferGetCount(LPSPI_Type *base, lpspi_slave_handle_t *handle, size_t *count)

Gets the slave transfer remaining bytes.

This function gets the slave transfer remaining bytes.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_slave_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Returns:

status of status_t.

void LPSPI_SlaveTransferAbort(LPSPI_Type *base, lpspi_slave_handle_t *handle)

LPSPI slave aborts a transfer which uses an interrupt method.

This function aborts a transfer which uses an interrupt method.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_slave_handle_t structure which stores the transfer state.

void LPSPI_SlaveTransferHandleIRQ(LPSPI_Type *base, lpspi_slave_handle_t *handle)

LPSPI Slave IRQ handler function.

This function processes the LPSPI transmit and receives an IRQ.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_slave_handle_t structure which stores the transfer state.

bool LPSPI_WaitTxFifoEmpty(LPSPI_Type *base)

Wait for tx FIFO to be empty.

This function wait the tx fifo empty

Parameters:

base – LPSPI peripheral address.

Returns:

true for the tx FIFO is ready, false is not.

void LPSPI_DriverIRQHandler(uint32_t instance)

LPSPI driver IRQ handler common entry.

This function provides the common IRQ request entry for LPSPI.

Parameters:

instance – LPSPI instance.

FSL_LPSPI_DRIVER_VERSION: LPSPI driver version.

Status for the LPSPI driver.

Values:

enumerator kStatus_LPSPI_Busy: LPSPI transfer is busy.

enumerator kStatus_LPSPI_Error: LPSPI driver error.

enumerator kStatus_LPSPI_Idle: LPSPI is idle.

enumerator kStatus_LPSPI_OutOfRange: LPSPI transfer out Of range.

enumerator kStatus_LPSPI_Timeout: LPSPI timeout polling status flags.

enum _lpspi_flags

LPSPI status flags in SPIx_SR register.

Values:

enumerator kLPSPI_TxDataRequestFlag: Transmit data flag

enumerator kLPSPI_RxDataReadyFlag: Receive data flag

enumerator kLPSPI_WordCompleteFlag: Word Complete flag

enumerator kLPSPI_FrameCompleteFlag: Frame Complete flag

enumerator kLPSPI_TransferCompleteFlag: Transfer Complete flag

enumerator kLPSPI_TransmitErrorFlag: Transmit Error flag (FIFO underrun)

enumerator kLPSPI_ReceiveErrorFlag: Receive Error flag (FIFO overrun)

enumerator kLPSPI_DataMatchFlag: Data Match flag

enumerator kLPSPI_ModuleBusyFlag: Module Busy flag

enumerator kLPSPI_AllStatusFlag: Used for clearing all w1c status flags

enum _lpspi_interrupt_enable

LPSPI interrupt source.

Values:

enumerator kLPSPI_TxInterruptEnable: Transmit data interrupt enable

enumerator kLPSPI_RxInterruptEnable: Receive data interrupt enable

enumerator kLPSPI_WordCompleteInterruptEnable: Word complete interrupt enable

enumerator kLPSPI_FrameCompleteInterruptEnable: Frame complete interrupt enable

enumerator kLPSPI_TransferCompleteInterruptEnable: Transfer complete interrupt enable

enumerator kLPSPI_TransmitErrorInterruptEnable: Transmit error interrupt enable(FIFO underrun)

enumerator kLPSPI_ReceiveErrorInterruptEnable: Receive Error interrupt enable (FIFO overrun)

enumerator kLPSPI_DataMatchInterruptEnable: Data Match interrupt enable

enumerator kLPSPI_AllInterruptEnable: All above interrupts enable.

enum _lpspi_dma_enable

LPSPI DMA source.

Values:

enumerator kLPSPI_TxDmaEnable: Transmit data DMA enable

enumerator kLPSPI_RxDmaEnable: Receive data DMA enable

enum _lpspi_master_slave_mode

LPSPI master or slave mode configuration.

Values:

enumerator kLPSPI_Master: LPSPI peripheral operates in master mode.

enumerator kLPSPI_Slave: LPSPI peripheral operates in slave mode.

enum _lpspi_which_pcs_config

LPSPI Peripheral Chip Select (PCS) configuration (which PCS to configure).

Values:

enumerator kLPSPI_Pcs0: PCS[0]

enumerator kLPSPI_Pcs1: PCS[1]

enumerator kLPSPI_Pcs2: PCS[2]

enumerator kLPSPI_Pcs3: PCS[3]

enum _lpspi_pcs_polarity_config

LPSPI Peripheral Chip Select (PCS) Polarity configuration.

Values:

enumerator kLPSPI_PcsActiveHigh: PCS Active High (idles low)

enumerator kLPSPI_PcsActiveLow: PCS Active Low (idles high)

enum _lpspi_pcs_polarity

LPSPI Peripheral Chip Select (PCS) Polarity.

Values:

enumerator kLPSPI_Pcs0ActiveLow: Pcs0 Active Low (idles high).

enumerator kLPSPI_Pcs1ActiveLow: Pcs1 Active Low (idles high).

enumerator kLPSPI_Pcs2ActiveLow: Pcs2 Active Low (idles high).

enumerator kLPSPI_Pcs3ActiveLow: Pcs3 Active Low (idles high).

enumerator kLPSPI_PcsAllActiveLow: Pcs0 to Pcs5 Active Low (idles high).

enum _lpspi_clock_polarity

LPSPI clock polarity configuration.

Values:

enumerator kLPSPI_ClockPolarityActiveHigh: CPOL=0. Active-high LPSPI clock (idles low)

enumerator kLPSPI_ClockPolarityActiveLow: CPOL=1. Active-low LPSPI clock (idles high)

enum _lpspi_clock_phase

LPSPI clock phase configuration.

Values:

enumerator kLPSPI_ClockPhaseFirstEdge: CPHA=0. Data is captured on the leading edge of the SCK and changed on the following edge.

enumerator kLPSPI_ClockPhaseSecondEdge: CPHA=1. Data is changed on the leading edge of the SCK and captured on the following edge.

enum _lpspi_shift_direction

LPSPI data shifter direction options.

Values:

enumerator kLPSPI_MsbFirst: Data transfers start with most significant bit.

enumerator kLPSPI_LsbFirst: Data transfers start with least significant bit.

enum _lpspi_host_request_select

LPSPI Host Request select configuration.

Values:

enumerator kLPSPI_HostReqExtPin: Host Request is an ext pin.

enumerator kLPSPI_HostReqInternalTrigger: Host Request is an internal trigger.

enum _lpspi_match_config

LPSPI Match configuration options.

Values:

enumerator kLPSI_MatchDisabled: LPSPI Match Disabled.

enumerator kLPSI_1stWordEqualsM0orM1: LPSPI Match Enabled.

enumerator kLPSI_AnyWordEqualsM0orM1: LPSPI Match Enabled.

enumerator kLPSI_1stWordEqualsM0and2ndWordEqualsM1: LPSPI Match Enabled.

enumerator kLPSI_AnyWordEqualsM0andNxtWordEqualsM1: LPSPI Match Enabled.

enumerator kLPSI_1stWordAndM1EqualsM0andM1: LPSPI Match Enabled.

enumerator kLPSI_AnyWordAndM1EqualsM0andM1: LPSPI Match Enabled.

enum _lpspi_pin_config

LPSPI pin (SDO and SDI) configuration.

Values:

enumerator kLPSPI_SdiInSdoOut: LPSPI SDI input, SDO output.

enumerator kLPSPI_SdiInSdiOut: LPSPI SDI input, SDI output.

enumerator kLPSPI_SdoInSdoOut: LPSPI SDO input, SDO output.

enumerator kLPSPI_SdoInSdiOut: LPSPI SDO input, SDI output.

enum _lpspi_data_out_config

LPSPI data output configuration.

Values:

enumerator kLpspiDataOutRetained: Data out retains last value when chip select is de-asserted

enumerator kLpspiDataOutTristate: Data out is tristated when chip select is de-asserted

enum _lpspi_transfer_width

LPSPI transfer width configuration.

Values:

enumerator kLPSPI_SingleBitXfer: 1-bit shift at a time, data out on SDO, in on SDI (normal mode)

enumerator kLPSPI_TwoBitXfer: 2-bits shift out on SDO/SDI and in on SDO/SDI

enumerator kLPSPI_FourBitXfer: 4-bits shift out on SDO/SDI/PCS[3:2] and in on SDO/SDI/PCS[3:2]

enum _lpspi_delay_type

LPSPI delay type selection.

Values:

enumerator kLPSPI_PcsToSck: PCS-to-SCK delay.

enumerator kLPSPI_LastSckToPcs: Last SCK edge to PCS delay.

enumerator kLPSPI_BetweenTransfer: Delay between transfers.

enum _lpspi_transfer_config_flag_for_master

Use this enumeration for LPSPI master transfer configFlags.

Values:

enumerator kLPSPI_MasterPcs0: LPSPI master PCS shift macro , internal used. LPSPI master transfer use PCS0 signal

enumerator kLPSPI_MasterPcs1: LPSPI master PCS shift macro , internal used. LPSPI master transfer use PCS1 signal

enumerator kLPSPI_MasterPcs2: LPSPI master PCS shift macro , internal used. LPSPI master transfer use PCS2 signal

enumerator kLPSPI_MasterPcs3: LPSPI master PCS shift macro , internal used. LPSPI master transfer use PCS3 signal

enumerator kLPSPI_MasterPcsContinuous: Is PCS signal continuous

enumerator kLPSPI_MasterByteSwap

Is master swap the byte. For example, when want to send data 1 2 3 4 5 6 7 8 (suppose you set lpspi_shift_direction_t to MSB).

If you set bitPerFrame = 8 , no matter the kLPSPI_MasterByteSwapyou flag is used or not, the waveform is 1 2 3 4 5 6 7 8.
If you set bitPerFrame = 16 : (1) the waveform is 2 1 4 3 6 5 8 7 if you do not use the kLPSPI_MasterByteSwap flag. (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_MasterByteSwap flag.
If you set bitPerFrame = 32 : (1) the waveform is 4 3 2 1 8 7 6 5 if you do not use the kLPSPI_MasterByteSwap flag. (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_MasterByteSwap flag.

enum _lpspi_transfer_config_flag_for_slave

Use this enumeration for LPSPI slave transfer configFlags.

Values:

enumerator kLPSPI_SlavePcs0: LPSPI slave PCS shift macro , internal used. LPSPI slave transfer use PCS0 signal

enumerator kLPSPI_SlavePcs1: LPSPI slave PCS shift macro , internal used. LPSPI slave transfer use PCS1 signal

enumerator kLPSPI_SlavePcs2: LPSPI slave PCS shift macro , internal used. LPSPI slave transfer use PCS2 signal

enumerator kLPSPI_SlavePcs3: LPSPI slave PCS shift macro , internal used. LPSPI slave transfer use PCS3 signal

enumerator kLPSPI_SlaveByteSwap

Is slave swap the byte. For example, when want to send data 1 2 3 4 5 6 7 8 (suppose you set lpspi_shift_direction_t to MSB).

If you set bitPerFrame = 8 , no matter the kLPSPI_SlaveByteSwap flag is used or not, the waveform is 1 2 3 4 5 6 7 8.
If you set bitPerFrame = 16 : (1) the waveform is 2 1 4 3 6 5 8 7 if you do not use the kLPSPI_SlaveByteSwap flag. (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_SlaveByteSwap flag.
If you set bitPerFrame = 32 : (1) the waveform is 4 3 2 1 8 7 6 5 if you do not use the kLPSPI_SlaveByteSwap flag. (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_SlaveByteSwap flag.

enum _lpspi_transfer_state

LPSPI transfer state, which is used for LPSPI transactional API state machine.

Values:

enumerator kLPSPI_Idle: Nothing in the transmitter/receiver.

enumerator kLPSPI_Busy: Transfer queue is not finished.

enumerator kLPSPI_Error: Transfer error.

typedef enum _lpspi_master_slave_mode lpspi_master_slave_mode_t: LPSPI master or slave mode configuration.

typedef enum _lpspi_which_pcs_config lpspi_which_pcs_t: LPSPI Peripheral Chip Select (PCS) configuration (which PCS to configure).

typedef enum _lpspi_pcs_polarity_config lpspi_pcs_polarity_config_t: LPSPI Peripheral Chip Select (PCS) Polarity configuration.

typedef enum _lpspi_clock_polarity lpspi_clock_polarity_t: LPSPI clock polarity configuration.

typedef enum _lpspi_clock_phase lpspi_clock_phase_t: LPSPI clock phase configuration.

typedef enum _lpspi_shift_direction lpspi_shift_direction_t: LPSPI data shifter direction options.

typedef enum _lpspi_host_request_select lpspi_host_request_select_t: LPSPI Host Request select configuration.

typedef enum _lpspi_match_config lpspi_match_config_t: LPSPI Match configuration options.

typedef enum _lpspi_pin_config lpspi_pin_config_t: LPSPI pin (SDO and SDI) configuration.

typedef enum _lpspi_data_out_config lpspi_data_out_config_t: LPSPI data output configuration.

typedef enum _lpspi_transfer_width lpspi_transfer_width_t: LPSPI transfer width configuration.

typedef enum _lpspi_delay_type lpspi_delay_type_t: LPSPI delay type selection.

typedef struct _lpspi_master_config lpspi_master_config_t: LPSPI master configuration structure.

typedef struct _lpspi_slave_config lpspi_slave_config_t: LPSPI slave configuration structure.

typedef struct _lpspi_master_handle lpspi_master_handle_t: Forward declaration of the _lpspi_master_handle typedefs.

typedef struct _lpspi_slave_handle lpspi_slave_handle_t: Forward declaration of the _lpspi_slave_handle typedefs.

typedef void (*lpspi_master_transfer_callback_t)(LPSPI_Type *base, lpspi_master_handle_t *handle, status_t status, void *userData)

Master completion callback function pointer type.

Param base:: LPSPI peripheral address.
Param handle:: Pointer to the handle for the LPSPI master.
Param status:: Success or error code describing whether the transfer is completed.
Param userData:: Arbitrary pointer-dataSized value passed from the application.

typedef void (*lpspi_slave_transfer_callback_t)(LPSPI_Type *base, lpspi_slave_handle_t *handle, status_t status, void *userData)

Slave completion callback function pointer type.

Param base:: LPSPI peripheral address.
Param handle:: Pointer to the handle for the LPSPI slave.
Param status:: Success or error code describing whether the transfer is completed.
Param userData:: Arbitrary pointer-dataSized value passed from the application.

typedef struct _lpspi_transfer lpspi_transfer_t: LPSPI master/slave transfer structure.

volatile uint8_t g_lpspiDummyData[]: Global variable for dummy data value setting.

LPSPI_DUMMY_DATA

LPSPI dummy data if no Tx data.

Dummy data used for tx if there is not txData.

SPI_RETRY_TIMES: Retry times for waiting flag.

LPSPI_MASTER_PCS_SHIFT: LPSPI master PCS shift macro , internal used.

LPSPI_MASTER_PCS_MASK: LPSPI master PCS shift macro , internal used.

LPSPI_SLAVE_PCS_SHIFT: LPSPI slave PCS shift macro , internal used.

LPSPI_SLAVE_PCS_MASK: LPSPI slave PCS shift macro , internal used.

struct _lpspi_master_config

#include <fsl_lpspi.h>

LPSPI master configuration structure.

Public Members

uint32_t baudRate: Baud Rate for LPSPI.

uint32_t bitsPerFrame: Bits per frame, minimum 8, maximum 4096.

lpspi_clock_polarity_t cpol: Clock polarity.

lpspi_clock_phase_t cpha: Clock phase.

lpspi_shift_direction_t direction: MSB or LSB data shift direction.

uint32_t pcsToSckDelayInNanoSec: PCS to SCK delay time in nanoseconds, setting to 0 sets the minimum delay. It sets the boundary value if out of range.

uint32_t lastSckToPcsDelayInNanoSec: Last SCK to PCS delay time in nanoseconds, setting to 0 sets the minimum delay. It sets the boundary value if out of range.

uint32_t betweenTransferDelayInNanoSec: After the SCK delay time with nanoseconds, setting to 0 sets the minimum delay. It sets the boundary value if out of range.

lpspi_which_pcs_t whichPcs: Desired Peripheral Chip Select (PCS).

lpspi_pcs_polarity_config_t pcsActiveHighOrLow: Desired PCS active high or low

lpspi_pin_config_t pinCfg: Configures which pins are used for input and output data during single bit transfers.

lpspi_data_out_config_t dataOutConfig: Configures if the output data is tristated between accesses (LPSPI_PCS is negated).

bool enableInputDelay: Enable master to sample the input data on a delayed SCK. This can help improve slave setup time. Refer to device data sheet for specific time length.

struct _lpspi_slave_config

#include <fsl_lpspi.h>

LPSPI slave configuration structure.

Public Members

uint32_t bitsPerFrame: Bits per frame, minimum 8, maximum 4096.

lpspi_clock_polarity_t cpol: Clock polarity.

lpspi_clock_phase_t cpha: Clock phase.

lpspi_shift_direction_t direction: MSB or LSB data shift direction.

lpspi_which_pcs_t whichPcs: Desired Peripheral Chip Select (pcs)

lpspi_pcs_polarity_config_t pcsActiveHighOrLow: Desired PCS active high or low

lpspi_pin_config_t pinCfg: Configures which pins are used for input and output data during single bit transfers.

lpspi_data_out_config_t dataOutConfig: Configures if the output data is tristated between accesses (LPSPI_PCS is negated).

struct _lpspi_transfer

#include <fsl_lpspi.h>

LPSPI master/slave transfer structure.

Public Members

const uint8_t *txData: Send buffer.

uint8_t *rxData: Receive buffer.

volatile size_t dataSize: Transfer bytes.

uint32_t configFlags: Transfer transfer configuration flags. Set from _lpspi_transfer_config_flag_for_master if the transfer is used for master or _lpspi_transfer_config_flag_for_slave enumeration if the transfer is used for slave.

struct _lpspi_master_handle

#include <fsl_lpspi.h>

LPSPI master transfer handle structure used for transactional API.

Public Members

volatile bool isPcsContinuous: Is PCS continuous in transfer.

volatile bool writeTcrInIsr: A flag that whether should write TCR in ISR.

volatile bool isByteSwap: A flag that whether should byte swap.

volatile bool isTxMask: A flag that whether TCR[TXMSK] is set.

volatile uint16_t bytesPerFrame: Number of bytes in each frame

volatile uint16_t frameSize: Backup of TCR[FRAMESZ]

volatile uint8_t fifoSize: FIFO dataSize.

volatile uint8_t rxWatermark: Rx watermark.

volatile uint8_t bytesEachWrite: Bytes for each write TDR.

volatile uint8_t bytesEachRead: Bytes for each read RDR.

const uint8_t *volatile txData: Send buffer.

uint8_t *volatile rxData: Receive buffer.

volatile size_t txRemainingByteCount: Number of bytes remaining to send.

volatile size_t rxRemainingByteCount: Number of bytes remaining to receive.

volatile uint32_t writeRegRemainingTimes: Write TDR register remaining times.

volatile uint32_t readRegRemainingTimes: Read RDR register remaining times.

uint32_t totalByteCount: Number of transfer bytes

uint32_t txBuffIfNull: Used if the txData is NULL.

volatile uint8_t state: LPSPI transfer state , _lpspi_transfer_state.

lpspi_master_transfer_callback_t callback: Completion callback.

void *userData: Callback user data.

struct _lpspi_slave_handle

#include <fsl_lpspi.h>

LPSPI slave transfer handle structure used for transactional API.

Public Members

volatile bool isByteSwap: A flag that whether should byte swap.

volatile uint8_t fifoSize: FIFO dataSize.

volatile uint8_t rxWatermark: Rx watermark.

volatile uint8_t bytesEachWrite: Bytes for each write TDR.

volatile uint8_t bytesEachRead: Bytes for each read RDR.

const uint8_t *volatile txData: Send buffer.

uint8_t *volatile rxData: Receive buffer.

volatile size_t txRemainingByteCount: Number of bytes remaining to send.

volatile size_t rxRemainingByteCount: Number of bytes remaining to receive.

volatile uint32_t writeRegRemainingTimes: Write TDR register remaining times.

volatile uint32_t readRegRemainingTimes: Read RDR register remaining times.

uint32_t totalByteCount: Number of transfer bytes

volatile uint8_t state: LPSPI transfer state , _lpspi_transfer_state.

volatile uint32_t errorCount: Error count for slave transfer.

lpspi_slave_transfer_callback_t callback: Completion callback.

void *userData: Callback user data.

LPSPI eDMA Driver#

FSL_LPSPI_EDMA_DRIVER_VERSION: LPSPI EDMA driver version.

DMA_MAX_TRANSFER_COUNT: DMA max transfer size.

typedef struct _lpspi_master_edma_handle lpspi_master_edma_handle_t: Forward declaration of the _lpspi_master_edma_handle typedefs.

typedef struct _lpspi_slave_edma_handle lpspi_slave_edma_handle_t: Forward declaration of the _lpspi_slave_edma_handle typedefs.

typedef void (*lpspi_master_edma_transfer_callback_t)(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, status_t status, void *userData)

Completion callback function pointer type.

Param base:: LPSPI peripheral base address.
Param handle:: Pointer to the handle for the LPSPI master.
Param status:: Success or error code describing whether the transfer completed.
Param userData:: Arbitrary pointer-dataSized value passed from the application.

typedef void (*lpspi_slave_edma_transfer_callback_t)(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, status_t status, void *userData)

Completion callback function pointer type.

Param base:: LPSPI peripheral base address.
Param handle:: Pointer to the handle for the LPSPI slave.
Param status:: Success or error code describing whether the transfer completed.
Param userData:: Arbitrary pointer-dataSized value passed from the application.

void LPSPI_MasterTransferCreateHandleEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_master_edma_transfer_callback_t callback, void *userData, edma_handle_t *edmaRxRegToRxDataHandle, edma_handle_t *edmaTxDataToTxRegHandle)

Initializes the LPSPI master eDMA handle.

This function initializes the LPSPI eDMA handle which can be used for other LPSPI transactional APIs. Usually, for a specified LPSPI instance, call this API once to get the initialized handle.

Note that the LPSPI eDMA has a separated (Rx and Tx as two sources) or shared (Rx and Tx are the same source) DMA request source. (1) For a separated DMA request source, enable and set the Rx DMAMUX source for edmaRxRegToRxDataHandle and Tx DMAMUX source for edmaTxDataToTxRegHandle. (2) For a shared DMA request source, enable and set the Rx/Tx DMAMUX source for edmaRxRegToRxDataHandle.

Parameters:

base – LPSPI peripheral base address.
handle – LPSPI handle pointer to lpspi_master_edma_handle_t.
callback – LPSPI callback.
userData – callback function parameter.
edmaRxRegToRxDataHandle – edmaRxRegToRxDataHandle pointer to edma_handle_t.
edmaTxDataToTxRegHandle – edmaTxDataToTxRegHandle pointer to edma_handle_t.

status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_transfer_t *transfer)

LPSPI master transfer data using eDMA.

This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data is transferred, the callback function is called.

Note: The transfer data size should be an integer multiple of bytesPerFrame if bytesPerFrame is less than or equal to 4. For bytesPerFrame greater than 4: The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4. Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
transfer – pointer to lpspi_transfer_t structure.

Returns:

status of status_t.

status_t LPSPI_MasterTransferPrepareEDMALite(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, uint32_t configFlags)

LPSPI master config transfer parameter while using eDMA.

This function is preparing to transfer data using eDMA, work with LPSPI_MasterTransferEDMALite.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
configFlags – transfer configuration flags. _lpspi_transfer_config_flag_for_master.

Return values:

kStatus_Success – Execution successfully.
kStatus_LPSPI_Busy – The LPSPI device is busy.

Returns:

Indicates whether LPSPI master transfer was successful or not.

status_t LPSPI_MasterTransferEDMALite(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_transfer_t *transfer)

LPSPI master transfer data using eDMA without configs.

This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data is transferred, the callback function is called.

Note: This API is only for transfer through DMA without configuration. Before calling this API, you must call LPSPI_MasterTransferPrepareEDMALite to configure it once. The transfer data size should be an integer multiple of bytesPerFrame if bytesPerFrame is less than or equal to 4. For bytesPerFrame greater than 4: The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4. Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
transfer – pointer to lpspi_transfer_t structure, config field is not uesed.

Return values:

kStatus_Success – Execution successfully.
kStatus_LPSPI_Busy – The LPSPI device is busy.
kStatus_InvalidArgument – The transfer structure is invalid.

Returns:

Indicates whether LPSPI master transfer was successful or not.

void LPSPI_MasterTransferAbortEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle)

LPSPI master aborts a transfer which is using eDMA.

This function aborts a transfer which is using eDMA.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_master_edma_handle_t structure which stores the transfer state.

status_t LPSPI_MasterTransferGetCountEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, size_t *count)

Gets the master eDMA transfer remaining bytes.

This function gets the master eDMA transfer remaining bytes.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the EDMA transaction.

Returns:

status of status_t.

void LPSPI_SlaveTransferCreateHandleEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, lpspi_slave_edma_transfer_callback_t callback, void *userData, edma_handle_t *edmaRxRegToRxDataHandle, edma_handle_t *edmaTxDataToTxRegHandle)

Initializes the LPSPI slave eDMA handle.

This function initializes the LPSPI eDMA handle which can be used for other LPSPI transactional APIs. Usually, for a specified LPSPI instance, call this API once to get the initialized handle.

Note that LPSPI eDMA has a separated (Rx and Tx as two sources) or shared (Rx and Tx as the same source) DMA request source.

(1) For a separated DMA request source, enable and set the Rx DMAMUX source for edmaRxRegToRxDataHandle and Tx DMAMUX source for edmaTxDataToTxRegHandle. (2) For a shared DMA request source, enable and set the Rx/Rx DMAMUX source for edmaRxRegToRxDataHandle .

Parameters:

base – LPSPI peripheral base address.
handle – LPSPI handle pointer to lpspi_slave_edma_handle_t.
callback – LPSPI callback.
userData – callback function parameter.
edmaRxRegToRxDataHandle – edmaRxRegToRxDataHandle pointer to edma_handle_t.
edmaTxDataToTxRegHandle – edmaTxDataToTxRegHandle pointer to edma_handle_t.

status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, lpspi_transfer_t *transfer)

LPSPI slave transfers data using eDMA.

This function transfers data using eDMA. This is a non-blocking function, which return right away. When all data is transferred, the callback function is called.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
transfer – pointer to lpspi_transfer_t structure.

Returns:

status of status_t.

void LPSPI_SlaveTransferAbortEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle)

LPSPI slave aborts a transfer which is using eDMA.

This function aborts a transfer which is using eDMA.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.

status_t LPSPI_SlaveTransferGetCountEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, size_t *count)

Gets the slave eDMA transfer remaining bytes.

This function gets the slave eDMA transfer remaining bytes.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the eDMA transaction.

Returns:

status of status_t.

struct _lpspi_master_edma_handle

#include <fsl_lpspi_edma.h>

LPSPI master eDMA transfer handle structure used for transactional API.

Public Members

volatile bool isPcsContinuous: Is PCS continuous in transfer.

volatile bool isByteSwap: A flag that whether should byte swap.

volatile uint8_t fifoSize: FIFO dataSize.

volatile uint8_t rxWatermark: Rx watermark.

volatile uint8_t bytesEachWrite: Bytes for each write TDR.

volatile uint8_t bytesEachRead: Bytes for each read RDR.

volatile uint8_t bytesLastRead: Bytes for last read RDR.

volatile bool isThereExtraRxBytes: Is there extra RX byte.

const uint8_t *volatile txData: Send buffer.

uint8_t *volatile rxData: Receive buffer.

volatile size_t txRemainingByteCount: Number of bytes remaining to send.

volatile size_t rxRemainingByteCount: Number of bytes remaining to receive.

volatile uint32_t writeRegRemainingTimes: Write TDR register remaining times.

volatile uint32_t readRegRemainingTimes: Read RDR register remaining times.

uint32_t totalByteCount: Number of transfer bytes

edma_tcd_t *lastTimeTCD: Pointer to the lastTime TCD

bool isMultiDMATransmit: Is there multi DMA transmit

volatile uint8_t dmaTransmitTime: DMA Transfer times.

uint32_t lastTimeDataBytes: DMA transmit last Time data Bytes

uint32_t dataBytesEveryTime: Bytes in a time for DMA transfer, default is DMA_MAX_TRANSFER_COUNT

edma_transfer_config_t transferConfigRx: Config of DMA rx channel.

edma_transfer_config_t transferConfigTx: Config of DMA tx channel.

uint32_t txBuffIfNull: Used if there is not txData for DMA purpose.

uint32_t rxBuffIfNull: Used if there is not rxData for DMA purpose.

uint32_t transmitCommand: Used to write TCR for DMA purpose.

volatile uint8_t state: LPSPI transfer state , _lpspi_transfer_state.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

lpspi_master_edma_transfer_callback_t callback: Completion callback.

void *userData: Callback user data.

edma_handle_t *edmaRxRegToRxDataHandle: edma_handle_t handle point used for RxReg to RxData buff

edma_handle_t *edmaTxDataToTxRegHandle: edma_handle_t handle point used for TxData to TxReg buff

edma_tcd_t lpspiSoftwareTCD[3]: SoftwareTCD, internal used

struct _lpspi_slave_edma_handle

#include <fsl_lpspi_edma.h>

LPSPI slave eDMA transfer handle structure used for transactional API.

Public Members

volatile bool isByteSwap: A flag that whether should byte swap.

volatile uint8_t fifoSize: FIFO dataSize.

volatile uint8_t rxWatermark: Rx watermark.

volatile uint8_t bytesEachWrite: Bytes for each write TDR.

volatile uint8_t bytesEachRead: Bytes for each read RDR.

volatile uint8_t bytesLastRead: Bytes for last read RDR.

volatile bool isThereExtraRxBytes: Is there extra RX byte.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

const uint8_t *volatile txData: Send buffer.

uint8_t *volatile rxData: Receive buffer.

volatile size_t txRemainingByteCount: Number of bytes remaining to send.

volatile size_t rxRemainingByteCount: Number of bytes remaining to receive.

volatile uint32_t writeRegRemainingTimes: Write TDR register remaining times.

volatile uint32_t readRegRemainingTimes: Read RDR register remaining times.

uint32_t totalByteCount: Number of transfer bytes

uint32_t txBuffIfNull: Used if there is not txData for DMA purpose.

uint32_t rxBuffIfNull: Used if there is not rxData for DMA purpose.

volatile uint8_t state: LPSPI transfer state.

uint32_t errorCount: Error count for slave transfer.

lpspi_slave_edma_transfer_callback_t callback: Completion callback.

void *userData: Callback user data.

edma_handle_t *edmaRxRegToRxDataHandle: edma_handle_t handle point used for RxReg to RxData buff

edma_handle_t *edmaTxDataToTxRegHandle: edma_handle_t handle point used for TxData to TxReg

edma_tcd_t lpspiSoftwareTCD[2]: SoftwareTCD, internal used

LPTMR: Low-Power Timer#

void LPTMR_Init(LPTMR_Type *base, const lptmr_config_t *config)

Ungates the LPTMR clock and configures the peripheral for a basic operation.

Note

This API should be called at the beginning of the application using the LPTMR driver.

Parameters:

base – LPTMR peripheral base address
config – A pointer to the LPTMR configuration structure.

void LPTMR_Deinit(LPTMR_Type *base)

Gates the LPTMR clock.

Parameters:

base – LPTMR peripheral base address

void LPTMR_GetDefaultConfig(lptmr_config_t *config)

Fills in the LPTMR configuration structure with default settings.

The default values are as follows.

config->timerMode = kLPTMR_TimerModeTimeCounter;
config->pinSelect = kLPTMR_PinSelectInput_0;
config->pinPolarity = kLPTMR_PinPolarityActiveHigh;
config->enableFreeRunning = false;
config->bypassPrescaler = true;
config->prescalerClockSource = kLPTMR_PrescalerClock_1;
config->value = kLPTMR_Prescale_Glitch_0;

Parameters:

config – A pointer to the LPTMR configuration structure.

static inline void LPTMR_EnableInterrupts(LPTMR_Type *base, uint32_t mask)

Enables the selected LPTMR interrupts.

Parameters:

base – LPTMR peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration lptmr_interrupt_enable_t

static inline void LPTMR_DisableInterrupts(LPTMR_Type *base, uint32_t mask)

Disables the selected LPTMR interrupts.

Parameters:

base – LPTMR peripheral base address
mask – The interrupts to disable. This is a logical OR of members of the enumeration lptmr_interrupt_enable_t.

static inline uint32_t LPTMR_GetEnabledInterrupts(LPTMR_Type *base)

Gets the enabled LPTMR interrupts.

Parameters:

base – LPTMR peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration lptmr_interrupt_enable_t

static inline uint32_t LPTMR_GetStatusFlags(LPTMR_Type *base)

Gets the LPTMR status flags.

Parameters:

base – LPTMR peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration lptmr_status_flags_t

static inline void LPTMR_ClearStatusFlags(LPTMR_Type *base, uint32_t mask)

Clears the LPTMR status flags.

Parameters:

base – LPTMR peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration lptmr_status_flags_t.

static inline void LPTMR_SetTimerPeriod(LPTMR_Type *base, uint32_t ticks)

Sets the timer period in units of count.

Timers counts from 0 until it equals the count value set here. The count value is written to the CMR register.

Note

The TCF flag is set with the CNR equals the count provided here and then increments.
Call the utility macros provided in the fsl_common.h to convert to ticks.

Parameters:

base – LPTMR peripheral base address
ticks – A timer period in units of ticks

static inline uint32_t LPTMR_GetCurrentTimerCount(LPTMR_Type *base)

Reads the current timer counting value.

This function returns the real-time timer counting value in a range from 0 to a timer period.

Note

Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec.

Parameters:

base – LPTMR peripheral base address

Returns:

The current counter value in ticks

static inline void LPTMR_StartTimer(LPTMR_Type *base)

Starts the timer.

After calling this function, the timer counts up to the CMR register value. Each time the timer reaches the CMR value and then increments, it generates a trigger pulse and sets the timeout interrupt flag. An interrupt is also triggered if the timer interrupt is enabled.

Parameters:

base – LPTMR peripheral base address

static inline void LPTMR_StopTimer(LPTMR_Type *base)

Stops the timer.

This function stops the timer and resets the timer’s counter register.

Parameters:

base – LPTMR peripheral base address

FSL_LPTMR_DRIVER_VERSION: Driver Version

enum _lptmr_pin_select

LPTMR pin selection used in pulse counter mode.

Values:

enumerator kLPTMR_PinSelectInput_0: Pulse counter input 0 is selected

enumerator kLPTMR_PinSelectInput_1: Pulse counter input 1 is selected

enumerator kLPTMR_PinSelectInput_2: Pulse counter input 2 is selected

enumerator kLPTMR_PinSelectInput_3: Pulse counter input 3 is selected

enum _lptmr_pin_polarity

LPTMR pin polarity used in pulse counter mode.

Values:

enumerator kLPTMR_PinPolarityActiveHigh: Pulse Counter input source is active-high

enumerator kLPTMR_PinPolarityActiveLow: Pulse Counter input source is active-low

enum _lptmr_timer_mode

LPTMR timer mode selection.

Values:

enumerator kLPTMR_TimerModeTimeCounter: Time Counter mode

enumerator kLPTMR_TimerModePulseCounter: Pulse Counter mode

enum _lptmr_prescaler_glitch_value

LPTMR prescaler/glitch filter values.

Values:

enumerator kLPTMR_Prescale_Glitch_0: Prescaler divide 2, glitch filter does not support this setting

enumerator kLPTMR_Prescale_Glitch_1: Prescaler divide 4, glitch filter 2

enumerator kLPTMR_Prescale_Glitch_2: Prescaler divide 8, glitch filter 4

enumerator kLPTMR_Prescale_Glitch_3: Prescaler divide 16, glitch filter 8

enumerator kLPTMR_Prescale_Glitch_4: Prescaler divide 32, glitch filter 16

enumerator kLPTMR_Prescale_Glitch_5: Prescaler divide 64, glitch filter 32

enumerator kLPTMR_Prescale_Glitch_6: Prescaler divide 128, glitch filter 64

enumerator kLPTMR_Prescale_Glitch_7: Prescaler divide 256, glitch filter 128

enumerator kLPTMR_Prescale_Glitch_8: Prescaler divide 512, glitch filter 256

enumerator kLPTMR_Prescale_Glitch_9: Prescaler divide 1024, glitch filter 512

enumerator kLPTMR_Prescale_Glitch_10: Prescaler divide 2048 glitch filter 1024

enumerator kLPTMR_Prescale_Glitch_11: Prescaler divide 4096, glitch filter 2048

enumerator kLPTMR_Prescale_Glitch_12: Prescaler divide 8192, glitch filter 4096

enumerator kLPTMR_Prescale_Glitch_13: Prescaler divide 16384, glitch filter 8192

enumerator kLPTMR_Prescale_Glitch_14: Prescaler divide 32768, glitch filter 16384

enumerator kLPTMR_Prescale_Glitch_15: Prescaler divide 65536, glitch filter 32768

enum _lptmr_prescaler_clock_select

LPTMR prescaler/glitch filter clock select.

Note

Clock connections are SoC-specific

Values:

enum _lptmr_interrupt_enable

List of the LPTMR interrupts.

Values:

enumerator kLPTMR_TimerInterruptEnable: Timer interrupt enable

enum _lptmr_status_flags

List of the LPTMR status flags.

Values:

enumerator kLPTMR_TimerCompareFlag: Timer compare flag

typedef enum _lptmr_pin_select lptmr_pin_select_t: LPTMR pin selection used in pulse counter mode.

typedef enum _lptmr_pin_polarity lptmr_pin_polarity_t: LPTMR pin polarity used in pulse counter mode.

typedef enum _lptmr_timer_mode lptmr_timer_mode_t: LPTMR timer mode selection.

typedef enum _lptmr_prescaler_glitch_value lptmr_prescaler_glitch_value_t: LPTMR prescaler/glitch filter values.

typedef enum _lptmr_prescaler_clock_select lptmr_prescaler_clock_select_t: LPTMR prescaler/glitch filter clock select.

Note

Clock connections are SoC-specific

typedef enum _lptmr_interrupt_enable lptmr_interrupt_enable_t: List of the LPTMR interrupts.

typedef enum _lptmr_status_flags lptmr_status_flags_t: List of the LPTMR status flags.

typedef struct _lptmr_config lptmr_config_t

LPTMR config structure.

This structure holds the configuration settings for the LPTMR peripheral. To initialize this structure to reasonable defaults, call the LPTMR_GetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration struct can be made constant so it resides in flash.

static inline void LPTMR_EnableTimerDMA(LPTMR_Type *base, bool enable)

Enable or disable timer DMA request.

Parameters:

base – base LPTMR peripheral base address
enable – Switcher of timer DMA feature. “true” means to enable, “false” means to disable.

struct _lptmr_config

#include <fsl_lptmr.h>

LPTMR config structure.

The configuration struct can be made constant so it resides in flash.

Public Members

lptmr_timer_mode_t timerMode: Time counter mode or pulse counter mode

lptmr_pin_select_t pinSelect: LPTMR pulse input pin select; used only in pulse counter mode

lptmr_pin_polarity_t pinPolarity: LPTMR pulse input pin polarity; used only in pulse counter mode

bool enableFreeRunning: True: enable free running, counter is reset on overflow False: counter is reset when the compare flag is set

bool bypassPrescaler: True: bypass prescaler; false: use clock from prescaler

lptmr_prescaler_clock_select_t prescalerClockSource: LPTMR clock source

lptmr_prescaler_glitch_value_t value: Prescaler or glitch filter value

LPUART: Low Power Universal Asynchronous Receiver/Transmitter Driver#

LPUART Driver#

static inline void LPUART_SoftwareReset(LPUART_Type *base)

Resets the LPUART using software.

This function resets all internal logic and registers except the Global Register. Remains set until cleared by software.

Parameters:

base – LPUART peripheral base address.

status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz)

Initializes an LPUART instance with the user configuration structure and the peripheral clock.

This function configures the LPUART module with user-defined settings. Call the LPUART_GetDefaultConfig() function to configure the configuration structure and get the default configuration. The example below shows how to use this API to configure the LPUART.

lpuart_config_t lpuartConfig;
lpuartConfig.baudRate_Bps = 115200U;
lpuartConfig.parityMode = kLPUART_ParityDisabled;
lpuartConfig.dataBitsCount = kLPUART_EightDataBits;
lpuartConfig.isMsb = false;
lpuartConfig.stopBitCount = kLPUART_OneStopBit;
lpuartConfig.txFifoWatermark = 0;
lpuartConfig.rxFifoWatermark = 1;
LPUART_Init(LPUART1, &lpuartConfig, 20000000U);

Parameters:

base – LPUART peripheral base address.
config – Pointer to a user-defined configuration structure.
srcClock_Hz – LPUART clock source frequency in HZ.

Return values:

kStatus_LPUART_BaudrateNotSupport – Baudrate is not support in current clock source.
kStatus_Success – LPUART initialize succeed

status_t LPUART_Deinit(LPUART_Type *base)

Deinitializes a LPUART instance.

This function waits for transmit to complete, disables TX and RX, and disables the LPUART clock.

Parameters:

base – LPUART peripheral base address.

Return values:

kStatus_Success – Deinit is success.
kStatus_LPUART_Timeout – Timeout during deinit.

void LPUART_GetDefaultConfig(lpuart_config_t *config)

Gets the default configuration structure.

This function initializes the LPUART configuration structure to a default value. The default values are: lpuartConfig->baudRate_Bps = 115200U; lpuartConfig->parityMode = kLPUART_ParityDisabled; lpuartConfig->dataBitsCount = kLPUART_EightDataBits; lpuartConfig->isMsb = false; lpuartConfig->stopBitCount = kLPUART_OneStopBit; lpuartConfig->txFifoWatermark = 0; lpuartConfig->rxFifoWatermark = 1; lpuartConfig->rxIdleType = kLPUART_IdleTypeStartBit; lpuartConfig->rxIdleConfig = kLPUART_IdleCharacter1; lpuartConfig->enableTx = false; lpuartConfig->enableRx = false;

Parameters:

config – Pointer to a configuration structure.

status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)

Sets the LPUART instance baudrate.

This function configures the LPUART module baudrate. This function is used to update the LPUART module baudrate after the LPUART module is initialized by the LPUART_Init.

LPUART_SetBaudRate(LPUART1, 115200U, 20000000U);

Parameters:

base – LPUART peripheral base address.
baudRate_Bps – LPUART baudrate to be set.
srcClock_Hz – LPUART clock source frequency in HZ.

Return values:

kStatus_LPUART_BaudrateNotSupport – Baudrate is not supported in the current clock source.
kStatus_Success – Set baudrate succeeded.

void LPUART_Enable9bitMode(LPUART_Type *base, bool enable)

Enable 9-bit data mode for LPUART.

This function set the 9-bit mode for LPUART module. The 9th bit is not used for parity thus can be modified by user.

Parameters:

base – LPUART peripheral base address.
enable – true to enable, flase to disable.

static inline void LPUART_SetMatchAddress(LPUART_Type *base, uint16_t address1, uint16_t address2)

Set the LPUART address.

This function configures the address for LPUART module that works as slave in 9-bit data mode. One or two address fields can be configured. When the address field’s match enable bit is set, the frame it receices with MSB being 1 is considered as an address frame, otherwise it is considered as data frame. Once the address frame matches one of slave’s own addresses, this slave is addressed. This address frame and its following data frames are stored in the receive buffer, otherwise the frames will be discarded. To un-address a slave, just send an address frame with unmatched address.

Note

Any LPUART instance joined in the multi-slave system can work as slave. The position of the address mark is the same as the parity bit when parity is enabled for 8 bit and 9 bit data formats.

Parameters:

base – LPUART peripheral base address.
address1 – LPUART slave address1.
address2 – LPUART slave address2.

static inline void LPUART_EnableMatchAddress(LPUART_Type *base, bool match1, bool match2)

Enable the LPUART match address feature.

Parameters:

base – LPUART peripheral base address.
match1 – true to enable match address1, false to disable.
match2 – true to enable match address2, false to disable.

static inline void LPUART_SetRxFifoWatermark(LPUART_Type *base, uint8_t water)

Sets the rx FIFO watermark.

Parameters:

base – LPUART peripheral base address.
water – Rx FIFO watermark.

static inline void LPUART_SetTxFifoWatermark(LPUART_Type *base, uint8_t water)

Sets the tx FIFO watermark.

Parameters:

base – LPUART peripheral base address.
water – Tx FIFO watermark.

static inline void LPUART_TransferEnable16Bit(lpuart_handle_t *handle, bool enable)

Sets the LPUART using 16bit transmit, only for 9bit or 10bit mode.

This function Enable 16bit Data transmit in lpuart_handle_t.

Parameters:

handle – LPUART handle pointer.
enable – true to enable, false to disable.

uint32_t LPUART_GetStatusFlags(LPUART_Type *base)

Gets LPUART status flags.

This function gets all LPUART status flags. The flags are returned as the logical OR value of the enumerators _lpuart_flags. To check for a specific status, compare the return value with enumerators in the _lpuart_flags. For example, to check whether the TX is empty:

if (kLPUART_TxDataRegEmptyFlag & LPUART_GetStatusFlags(LPUART1))
{
    ...
}

Parameters:

base – LPUART peripheral base address.

Returns:

LPUART status flags which are ORed by the enumerators in the _lpuart_flags.

status_t LPUART_ClearStatusFlags(LPUART_Type *base, uint32_t mask)

Clears status flags with a provided mask.

This function clears LPUART status flags with a provided mask. Automatically cleared flags can’t be cleared by this function. Flags that can only cleared or set by hardware are: kLPUART_TxDataRegEmptyFlag, kLPUART_TransmissionCompleteFlag, kLPUART_RxDataRegFullFlag, kLPUART_RxActiveFlag, kLPUART_NoiseErrorFlag, kLPUART_ParityErrorFlag, kLPUART_TxFifoEmptyFlag,kLPUART_RxFifoEmptyFlag Note: This API should be called when the Tx/Rx is idle, otherwise it takes no effects.

Parameters:

base – LPUART peripheral base address.
mask – the status flags to be cleared. The user can use the enumerators in the _lpuart_status_flag_t to do the OR operation and get the mask.

Return values:

kStatus_LPUART_FlagCannotClearManually – The flag can’t be cleared by this function but it is cleared automatically by hardware.
kStatus_Success – Status in the mask are cleared.

Returns:

0 succeed, others failed.

void LPUART_EnableInterrupts(LPUART_Type *base, uint32_t mask)

Enables LPUART interrupts according to a provided mask.

This function enables the LPUART interrupts according to a provided mask. The mask is a logical OR of enumeration members. See the _lpuart_interrupt_enable. This examples shows how to enable TX empty interrupt and RX full interrupt:

LPUART_EnableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);

Parameters:

base – LPUART peripheral base address.
mask – The interrupts to enable. Logical OR of _lpuart_interrupt_enable.

void LPUART_DisableInterrupts(LPUART_Type *base, uint32_t mask)

Disables LPUART interrupts according to a provided mask.

This function disables the LPUART interrupts according to a provided mask. The mask is a logical OR of enumeration members. See _lpuart_interrupt_enable. This example shows how to disable the TX empty interrupt and RX full interrupt:

LPUART_DisableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);

Parameters:

base – LPUART peripheral base address.
mask – The interrupts to disable. Logical OR of _lpuart_interrupt_enable.

uint32_t LPUART_GetEnabledInterrupts(LPUART_Type *base)

Gets enabled LPUART interrupts.

This function gets the enabled LPUART interrupts. The enabled interrupts are returned as the logical OR value of the enumerators _lpuart_interrupt_enable. To check a specific interrupt enable status, compare the return value with enumerators in _lpuart_interrupt_enable. For example, to check whether the TX empty interrupt is enabled:

uint32_t enabledInterrupts = LPUART_GetEnabledInterrupts(LPUART1);

if (kLPUART_TxDataRegEmptyInterruptEnable & enabledInterrupts)
{
    ...
}

Parameters:

base – LPUART peripheral base address.

Returns:

LPUART interrupt flags which are logical OR of the enumerators in _lpuart_interrupt_enable.

static inline uintptr_t LPUART_GetDataRegisterAddress(LPUART_Type *base)

Gets the LPUART data register address.

This function returns the LPUART data register address, which is mainly used by the DMA/eDMA.

Parameters:

base – LPUART peripheral base address.

Returns:

LPUART data register addresses which are used both by the transmitter and receiver.

static inline void LPUART_EnableTxDMA(LPUART_Type *base, bool enable)

Enables or disables the LPUART transmitter DMA request.

This function enables or disables the transmit data register empty flag, STAT[TDRE], to generate DMA requests.

Parameters:

base – LPUART peripheral base address.
enable – True to enable, false to disable.

static inline void LPUART_EnableRxDMA(LPUART_Type *base, bool enable)

Enables or disables the LPUART receiver DMA.

This function enables or disables the receiver data register full flag, STAT[RDRF], to generate DMA requests.

Parameters:

base – LPUART peripheral base address.
enable – True to enable, false to disable.

uint32_t LPUART_GetInstance(LPUART_Type *base)

Get the LPUART instance from peripheral base address.

Parameters:

base – LPUART peripheral base address.

Returns:

LPUART instance.

static inline void LPUART_EnableTx(LPUART_Type *base, bool enable)

Enables or disables the LPUART transmitter.

This function enables or disables the LPUART transmitter.

Parameters:

base – LPUART peripheral base address.
enable – True to enable, false to disable.

static inline void LPUART_EnableRx(LPUART_Type *base, bool enable)

Enables or disables the LPUART receiver.

This function enables or disables the LPUART receiver.

Parameters:

base – LPUART peripheral base address.
enable – True to enable, false to disable.

static inline void LPUART_WriteByte(LPUART_Type *base, uint8_t data)

Writes to the transmitter register.

This function writes data to the transmitter register directly. The upper layer must ensure that the TX register is empty or that the TX FIFO has room before calling this function.

Parameters:

base – LPUART peripheral base address.
data – Data write to the TX register.

static inline uint8_t LPUART_ReadByte(LPUART_Type *base)

Reads the receiver register.

This function reads data from the receiver register directly. The upper layer must ensure that the receiver register is full or that the RX FIFO has data before calling this function.

Parameters:

base – LPUART peripheral base address.

Returns:

Data read from data register.

static inline uint8_t LPUART_GetRxFifoCount(LPUART_Type *base)

Gets the rx FIFO data count.

Parameters:

base – LPUART peripheral base address.

Returns:

rx FIFO data count.

static inline uint8_t LPUART_GetTxFifoCount(LPUART_Type *base)

Gets the tx FIFO data count.

Parameters:

base – LPUART peripheral base address.

Returns:

tx FIFO data count.

void LPUART_SendAddress(LPUART_Type *base, uint8_t address)

Transmit an address frame in 9-bit data mode.

Parameters:

base – LPUART peripheral base address.
address – LPUART slave address.

status_t LPUART_WriteBlocking(LPUART_Type *base, const uint8_t *data, size_t length)

Writes to the transmitter register using a blocking method.

This function polls the transmitter register, first waits for the register to be empty or TX FIFO to have room, and writes data to the transmitter buffer, then waits for the dat to be sent out to the bus.

Parameters:

base – LPUART peripheral base address.
data – Start address of the data to write.
length – Size of the data to write.

Return values:

kStatus_LPUART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully wrote all data.

status_t LPUART_WriteBlocking16bit(LPUART_Type *base, const uint16_t *data, size_t length)

Writes to the transmitter register using a blocking method in 9bit or 10bit mode.

Note

This function only support 9bit or 10bit transfer. Please make sure only 10bit of data is valid and other bits are 0.

Parameters:

base – LPUART peripheral base address.
data – Start address of the data to write.
length – Size of the data to write.

Return values:

kStatus_LPUART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully wrote all data.

status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length)

Reads the receiver data register using a blocking method.

This function polls the receiver register, waits for the receiver register full or receiver FIFO has data, and reads data from the TX register.

Parameters:

base – LPUART peripheral base address.
data – Start address of the buffer to store the received data.
length – Size of the buffer.

Return values:

kStatus_LPUART_RxHardwareOverrun – Receiver overrun happened while receiving data.
kStatus_LPUART_NoiseError – Noise error happened while receiving data.
kStatus_LPUART_FramingError – Framing error happened while receiving data.
kStatus_LPUART_ParityError – Parity error happened while receiving data.
kStatus_LPUART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully received all data.

status_t LPUART_ReadBlocking16bit(LPUART_Type *base, uint16_t *data, size_t length)

Reads the receiver data register in 9bit or 10bit mode.

Note

This function only support 9bit or 10bit transfer.

Parameters:

base – LPUART peripheral base address.
data – Start address of the buffer to store the received data by 16bit, only 10bit is valid.
length – Size of the buffer.

Return values:

kStatus_LPUART_RxHardwareOverrun – Receiver overrun happened while receiving data.
kStatus_LPUART_NoiseError – Noise error happened while receiving data.
kStatus_LPUART_FramingError – Framing error happened while receiving data.
kStatus_LPUART_ParityError – Parity error happened while receiving data.
kStatus_LPUART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully received all data.

void LPUART_TransferCreateHandle(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_callback_t callback, void *userData)

Initializes the LPUART handle.

This function initializes the LPUART handle, which can be used for other LPUART transactional APIs. Usually, for a specified LPUART instance, call this API once to get the initialized handle.

The LPUART driver supports the “background” receiving, which means that user can set up an RX ring buffer optionally. Data received is stored into the ring buffer even when the user doesn’t call the LPUART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, the user can get the received data from the ring buffer directly. The ring buffer is disabled if passing NULL as ringBuffer.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
callback – Callback function.
userData – User data.

status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer)

Transmits a buffer of data using the interrupt method.

This function send data using an interrupt method. This is a non-blocking function, which returns directly without waiting for all data written to the transmitter register. When all data is written to the TX register in the ISR, the LPUART driver calls the callback function and passes the kStatus_LPUART_TxIdle as status parameter.

Note

The kStatus_LPUART_TxIdle is passed to the upper layer when all data are written to the TX register. However, there is no check to ensure that all the data sent out. Before disabling the TX, check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is finished.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
xfer – LPUART transfer structure, see lpuart_transfer_t.

Return values:

kStatus_Success – Successfully start the data transmission.
kStatus_LPUART_TxBusy – Previous transmission still not finished, data not all written to the TX register.
kStatus_InvalidArgument – Invalid argument.

void LPUART_TransferStartRingBuffer(LPUART_Type *base, lpuart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)

Sets up the RX ring buffer.

This function sets up the RX ring buffer to a specific UART handle.

When the RX ring buffer is used, data received is stored into the ring buffer even when the user doesn’t call the UART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, the user can get the received data from the ring buffer directly.

Note

When using RX ring buffer, one byte is reserved for internal use. In other words, if ringBufferSize is 32, then only 31 bytes are used for saving data.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
ringBuffer – Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer.
ringBufferSize – size of the ring buffer.

void LPUART_TransferStopRingBuffer(LPUART_Type *base, lpuart_handle_t *handle)

Aborts the background transfer and uninstalls the ring buffer.

This function aborts the background transfer and uninstalls the ring buffer.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.

size_t LPUART_TransferGetRxRingBufferLength(LPUART_Type *base, lpuart_handle_t *handle)

Get the length of received data in RX ring buffer.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.

Returns:

Length of received data in RX ring buffer.

void LPUART_TransferAbortSend(LPUART_Type *base, lpuart_handle_t *handle)

Aborts the interrupt-driven data transmit.

This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out how many bytes are not sent out.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.

status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count)

Gets the number of bytes that have been sent out to bus.

This function gets the number of bytes that have been sent out to bus by an interrupt method.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
count – Send bytes count.

Return values:

kStatus_NoTransferInProgress – No send in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

status_t LPUART_TransferReceiveNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer, size_t *receivedBytes)

Receives a buffer of data using the interrupt method.

This function receives data using an interrupt method. This is a non-blocking function which returns without waiting to ensure that all data are received. If the RX ring buffer is used and not empty, the data in the ring buffer is copied and the parameter receivedBytes shows how many bytes are copied from the ring buffer. After copying, if the data in the ring buffer is not enough for read, the receive request is saved by the LPUART driver. When the new data arrives, the receive request is serviced first. When all data is received, the LPUART driver notifies the upper layer through a callback function and passes a status parameter kStatus_UART_RxIdle. For example, the upper layer needs 10 bytes but there are only 5 bytes in ring buffer. The 5 bytes are copied to xfer->data, which returns with the parameter receivedBytes set to 5. For the remaining 5 bytes, the newly arrived data is saved from xfer->data[5]. When 5 bytes are received, the LPUART driver notifies the upper layer. If the RX ring buffer is not enabled, this function enables the RX and RX interrupt to receive data to xfer->data. When all data is received, the upper layer is notified.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
xfer – LPUART transfer structure, see uart_transfer_t.
receivedBytes – Bytes received from the ring buffer directly.

Return values:

kStatus_Success – Successfully queue the transfer into the transmit queue.
kStatus_LPUART_RxBusy – Previous receive request is not finished.
kStatus_InvalidArgument – Invalid argument.

void LPUART_TransferAbortReceive(LPUART_Type *base, lpuart_handle_t *handle)

Aborts the interrupt-driven data receiving.

This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out how many bytes not received yet.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.

status_t LPUART_TransferGetReceiveCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count)

Gets the number of bytes that have been received.

This function gets the number of bytes that have been received.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
count – Receive bytes count.

Return values:

kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

void LPUART_TransferHandleIRQ(LPUART_Type *base, void *irqHandle)

LPUART IRQ handle function.

This function handles the LPUART transmit and receive IRQ request.

Parameters:

base – LPUART peripheral base address.
irqHandle – LPUART handle pointer.

void LPUART_TransferHandleErrorIRQ(LPUART_Type *base, void *irqHandle)

LPUART Error IRQ handle function.

This function handles the LPUART error IRQ request.

Parameters:

base – LPUART peripheral base address.
irqHandle – LPUART handle pointer.

void LPUART_DriverIRQHandler(uint32_t instance)

LPUART driver IRQ handler common entry.

This function provides the common IRQ request entry for LPUART.

Parameters:

instance – LPUART instance.

FSL_LPUART_DRIVER_VERSION: LPUART driver version.

Error codes for the LPUART driver.

Values:

enumerator kStatus_LPUART_TxBusy: TX busy

enumerator kStatus_LPUART_RxBusy: RX busy

enumerator kStatus_LPUART_TxIdle: LPUART transmitter is idle.

enumerator kStatus_LPUART_RxIdle: LPUART receiver is idle.

enumerator kStatus_LPUART_TxWatermarkTooLarge: TX FIFO watermark too large

enumerator kStatus_LPUART_RxWatermarkTooLarge: RX FIFO watermark too large

enumerator kStatus_LPUART_FlagCannotClearManually: Some flag can’t manually clear

enumerator kStatus_LPUART_Error: Error happens on LPUART.

enumerator kStatus_LPUART_RxRingBufferOverrun: LPUART RX software ring buffer overrun.

enumerator kStatus_LPUART_RxHardwareOverrun: LPUART RX receiver overrun.

enumerator kStatus_LPUART_NoiseError: LPUART noise error.

enumerator kStatus_LPUART_FramingError: LPUART framing error.

enumerator kStatus_LPUART_ParityError: LPUART parity error.

enumerator kStatus_LPUART_BaudrateNotSupport: Baudrate is not support in current clock source

enumerator kStatus_LPUART_IdleLineDetected: IDLE flag.

enumerator kStatus_LPUART_Timeout: LPUART times out.

enum _lpuart_parity_mode

LPUART parity mode.

Values:

enumerator kLPUART_ParityDisabled: Parity disabled

enumerator kLPUART_ParityEven: Parity enabled, type even, bit setting: PE|PT = 10

enumerator kLPUART_ParityOdd: Parity enabled, type odd, bit setting: PE|PT = 11

enum _lpuart_data_bits

LPUART data bits count.

Values:

enumerator kLPUART_EightDataBits: Eight data bit

enumerator kLPUART_SevenDataBits: Seven data bit

enum _lpuart_stop_bit_count

LPUART stop bit count.

Values:

enumerator kLPUART_OneStopBit: One stop bit

enumerator kLPUART_TwoStopBit: Two stop bits

enum _lpuart_transmit_cts_source

LPUART transmit CTS source.

Values:

enumerator kLPUART_CtsSourcePin: CTS resource is the LPUART_CTS pin.

enumerator kLPUART_CtsSourceMatchResult: CTS resource is the match result.

enum _lpuart_transmit_cts_config

LPUART transmit CTS configure.

Values:

enumerator kLPUART_CtsSampleAtStart: CTS input is sampled at the start of each character.

enumerator kLPUART_CtsSampleAtIdle: CTS input is sampled when the transmitter is idle

enum _lpuart_transmit_rts_polarity

LPUART transmitter RTS polarity.

Values:

enumerator kLPUART_RtsPolarityLow: Transmitter RTS is active low.

enumerator kLPUART_RtsPolarityHigh: Transmitter RTS is active high.

enum _lpuart_idle_type_select

LPUART idle flag type defines when the receiver starts counting.

Values:

enumerator kLPUART_IdleTypeStartBit: Start counting after a valid start bit.

enumerator kLPUART_IdleTypeStopBit: Start counting after a stop bit.

enum _lpuart_idle_config

LPUART idle detected configuration. This structure defines the number of idle characters that must be received before the IDLE flag is set.

Values:

enumerator kLPUART_IdleCharacter1: the number of idle characters.

enumerator kLPUART_IdleCharacter2: the number of idle characters.

enumerator kLPUART_IdleCharacter4: the number of idle characters.

enumerator kLPUART_IdleCharacter8: the number of idle characters.

enumerator kLPUART_IdleCharacter16: the number of idle characters.

enumerator kLPUART_IdleCharacter32: the number of idle characters.

enumerator kLPUART_IdleCharacter64: the number of idle characters.

enumerator kLPUART_IdleCharacter128: the number of idle characters.

enum _lpuart_interrupt_enable

LPUART interrupt configuration structure, default settings all disabled.

This structure contains the settings for all LPUART interrupt configurations.

Values:

enumerator kLPUART_LinBreakInterruptEnable: LIN break detect. bit 7

enumerator kLPUART_RxActiveEdgeInterruptEnable: Receive Active Edge. bit 6

enumerator kLPUART_TxDataRegEmptyInterruptEnable: Transmit data register empty. bit 23

enumerator kLPUART_TransmissionCompleteInterruptEnable: Transmission complete. bit 22

enumerator kLPUART_RxDataRegFullInterruptEnable: Receiver data register full. bit 21

enumerator kLPUART_IdleLineInterruptEnable: Idle line. bit 20

enumerator kLPUART_RxOverrunInterruptEnable: Receiver Overrun. bit 27

enumerator kLPUART_NoiseErrorInterruptEnable: Noise error flag. bit 26

enumerator kLPUART_FramingErrorInterruptEnable: Framing error flag. bit 25

enumerator kLPUART_ParityErrorInterruptEnable: Parity error flag. bit 24

enumerator kLPUART_Match1InterruptEnable: Parity error flag. bit 15

enumerator kLPUART_Match2InterruptEnable: Parity error flag. bit 14

enumerator kLPUART_TxFifoOverflowInterruptEnable: Transmit FIFO Overflow. bit 9

enumerator kLPUART_RxFifoUnderflowInterruptEnable: Receive FIFO Underflow. bit 8

enumerator kLPUART_AllInterruptEnable

enum _lpuart_flags

LPUART status flags.

This provides constants for the LPUART status flags for use in the LPUART functions.

Values:

enumerator kLPUART_TxDataRegEmptyFlag: Transmit data register empty flag, sets when transmit buffer is empty. bit 23

enumerator kLPUART_TransmissionCompleteFlag: Transmission complete flag, sets when transmission activity complete. bit 22

enumerator kLPUART_RxDataRegFullFlag: Receive data register full flag, sets when the receive data buffer is full. bit 21

enumerator kLPUART_IdleLineFlag: Idle line detect flag, sets when idle line detected. bit 20

enumerator kLPUART_RxOverrunFlag: Receive Overrun, sets when new data is received before data is read from receive register. bit 19

enumerator kLPUART_NoiseErrorFlag: Receive takes 3 samples of each received bit. If any of these samples differ, noise flag sets. bit 18

enumerator kLPUART_FramingErrorFlag: Frame error flag, sets if logic 0 was detected where stop bit expected. bit 17

enumerator kLPUART_ParityErrorFlag: If parity enabled, sets upon parity error detection. bit 16

enumerator kLPUART_LinBreakFlag: LIN break detect interrupt flag, sets when LIN break char detected and LIN circuit enabled. bit 31

enumerator kLPUART_RxActiveEdgeFlag: Receive pin active edge interrupt flag, sets when active edge detected. bit 30

enumerator kLPUART_RxActiveFlag: Receiver Active Flag (RAF), sets at beginning of valid start. bit 24

enumerator kLPUART_DataMatch1Flag: The next character to be read from LPUART_DATA matches MA1. bit 15

enumerator kLPUART_DataMatch2Flag: The next character to be read from LPUART_DATA matches MA2. bit 14

enumerator kLPUART_TxFifoEmptyFlag: TXEMPT bit, sets if transmit buffer is empty. bit 7

enumerator kLPUART_RxFifoEmptyFlag: RXEMPT bit, sets if receive buffer is empty. bit 6

enumerator kLPUART_TxFifoOverflowFlag: TXOF bit, sets if transmit buffer overflow occurred. bit 1

enumerator kLPUART_RxFifoUnderflowFlag: RXUF bit, sets if receive buffer underflow occurred. bit 0

enumerator kLPUART_AllClearFlags

enumerator kLPUART_AllFlags

typedef enum _lpuart_parity_mode lpuart_parity_mode_t: LPUART parity mode.

typedef enum _lpuart_data_bits lpuart_data_bits_t: LPUART data bits count.

typedef enum _lpuart_stop_bit_count lpuart_stop_bit_count_t: LPUART stop bit count.

typedef enum _lpuart_transmit_cts_source lpuart_transmit_cts_source_t: LPUART transmit CTS source.

typedef enum _lpuart_transmit_cts_config lpuart_transmit_cts_config_t: LPUART transmit CTS configure.

typedef enum _lpuart_transmit_rts_polarity lpuart_transmit_rts_polarity_t: LPUART transmitter RTS polarity.

typedef enum _lpuart_idle_type_select lpuart_idle_type_select_t: LPUART idle flag type defines when the receiver starts counting.

typedef enum _lpuart_idle_config lpuart_idle_config_t: LPUART idle detected configuration. This structure defines the number of idle characters that must be received before the IDLE flag is set.

typedef struct _lpuart_config lpuart_config_t: LPUART configuration structure.

typedef struct _lpuart_transfer lpuart_transfer_t: LPUART transfer structure.

typedef struct _lpuart_handle lpuart_handle_t

typedef void (*lpuart_transfer_callback_t)(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *userData): LPUART transfer callback function.

typedef void (*lpuart_isr_t)(LPUART_Type *base, void *handle)

void *s_lpuartHandle[]

const IRQn_Type s_lpuartTxIRQ[]

lpuart_isr_t s_lpuartIsr[]

UART_RETRY_TIMES: Retry times for waiting flag.

struct _lpuart_config

#include <fsl_lpuart.h>

LPUART configuration structure.

Public Members

uint32_t baudRate_Bps: LPUART baud rate

lpuart_parity_mode_t parityMode: Parity mode, disabled (default), even, odd

lpuart_data_bits_t dataBitsCount: Data bits count, eight (default), seven

bool isMsb: Data bits order, LSB (default), MSB

lpuart_stop_bit_count_t stopBitCount: Number of stop bits, 1 stop bit (default) or 2 stop bits

uint8_t txFifoWatermark: TX FIFO watermark

uint8_t rxFifoWatermark: RX FIFO watermark

bool enableRxRTS: RX RTS enable

bool enableTxRTS: TX RTS enable

bool enableTxCTS: TX CTS enable

lpuart_transmit_cts_source_t txCtsSource: TX CTS source

lpuart_transmit_cts_config_t txCtsConfig: TX CTS configure

lpuart_transmit_rts_polarity_t txRtsPolarity: TX RTS polarity

uint8_t rtsWatermark: RTS watermark

lpuart_idle_type_select_t rxIdleType: RX IDLE type.

lpuart_idle_config_t rxIdleConfig: RX IDLE configuration.

bool enableTx: Enable TX

bool enableRx: Enable RX

bool swapTxdRxd: Swap TXD and RXD pins

bool inverseTxd: Transmit Data Inversion - Setting true reverses the polarity of the transmitted data output

struct _lpuart_transfer

#include <fsl_lpuart.h>

LPUART transfer structure.

Public Members

size_t dataSize: The byte count to be transfer.

struct _lpuart_handle

#include <fsl_lpuart.h>

LPUART handle structure.

Public Members

volatile size_t txDataSize: Size of the remaining data to send.

size_t txDataSizeAll: Size of the data to send out.

volatile size_t rxDataSize: Size of the remaining data to receive.

size_t rxDataSizeAll: Size of the data to receive.

size_t rxRingBufferSize: Size of the ring buffer.

volatile uint16_t rxRingBufferHead: Index for the driver to store received data into ring buffer.

volatile uint16_t rxRingBufferTail: Index for the user to get data from the ring buffer.

lpuart_transfer_callback_t callback: Callback function.

void *userData: LPUART callback function parameter.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state.

bool isSevenDataBits: Seven data bits flag.

bool is16bitData: 16bit data bits flag, only used for 9bit or 10bit data

union __unnamed57__

Public Members

uint8_t *data: The buffer of data to be transfer.

uint8_t *rxData: The buffer to receive data.

uint16_t *rxData16: The buffer to receive data.

const uint8_t *txData: The buffer of data to be sent.

const uint16_t *txData16: The buffer of data to be sent.

union __unnamed59__

Public Members

const uint8_t *volatile txData: Address of remaining data to send.

const uint16_t *volatile txData16: Address of remaining data to send.

union __unnamed61__

Public Members

uint8_t *volatile rxData: Address of remaining data to receive.

uint16_t *volatile rxData16: Address of remaining data to receive.

union __unnamed63__

Public Members

uint8_t *rxRingBuffer: Start address of the receiver ring buffer.

uint16_t *rxRingBuffer16: Start address of the receiver ring buffer.

LPUART eDMA Driver#

void LPUART_TransferCreateHandleEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart_edma_transfer_callback_t callback, void *userData, edma_handle_t *txEdmaHandle, edma_handle_t *rxEdmaHandle)

Initializes the LPUART handle which is used in transactional functions.

Note

This function disables all LPUART interrupts.

Parameters:

base – LPUART peripheral base address.
handle – Pointer to lpuart_edma_handle_t structure.
callback – Callback function.
userData – User data.
txEdmaHandle – User requested DMA handle for TX DMA transfer.
rxEdmaHandle – User requested DMA handle for RX DMA transfer.

status_t LPUART_SendEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart_transfer_t *xfer)

Sends data using eDMA.

This function sends data using eDMA. This is a non-blocking function, which returns right away. When all data is sent, the send callback function is called.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
xfer – LPUART eDMA transfer structure. See lpuart_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_LPUART_TxBusy – Previous transfer on going.
kStatus_InvalidArgument – Invalid argument.

status_t LPUART_ReceiveEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart_transfer_t *xfer)

Receives data using eDMA.

This function receives data using eDMA. This is non-blocking function, which returns right away. When all data is received, the receive callback function is called.

Parameters:

base – LPUART peripheral base address.
handle – Pointer to lpuart_edma_handle_t structure.
xfer – LPUART eDMA transfer structure, see lpuart_transfer_t.

Return values:

kStatus_Success – if succeed, others fail.
kStatus_LPUART_RxBusy – Previous transfer ongoing.
kStatus_InvalidArgument – Invalid argument.

void LPUART_TransferAbortSendEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle)

Aborts the sent data using eDMA.

This function aborts the sent data using eDMA.

Parameters:

base – LPUART peripheral base address.
handle – Pointer to lpuart_edma_handle_t structure.

void LPUART_TransferAbortReceiveEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle)

Aborts the received data using eDMA.

This function aborts the received data using eDMA.

Parameters:

base – LPUART peripheral base address.
handle – Pointer to lpuart_edma_handle_t structure.

status_t LPUART_TransferGetSendCountEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, uint32_t *count)

Gets the number of bytes written to the LPUART TX register.

This function gets the number of bytes written to the LPUART TX register by DMA.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
count – Send bytes count.

Return values:

kStatus_NoTransferInProgress – No send in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

status_t LPUART_TransferGetReceiveCountEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, uint32_t *count)

Gets the number of received bytes.

This function gets the number of received bytes.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
count – Receive bytes count.

Return values:

kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

void LPUART_TransferEdmaHandleIRQ(LPUART_Type *base, void *lpuartEdmaHandle)

LPUART eDMA IRQ handle function.

This function handles the LPUART tx complete IRQ request and invoke user callback. It is not set to static so that it can be used in user application.

Note

This function is used as default IRQ handler by double weak mechanism. If user’s specific IRQ handler is implemented, make sure this function is invoked in the handler.

Parameters:

base – LPUART peripheral base address.
lpuartEdmaHandle – LPUART handle pointer.

FSL_LPUART_EDMA_DRIVER_VERSION: LPUART EDMA driver version.

typedef struct _lpuart_edma_handle lpuart_edma_handle_t

typedef void (*lpuart_edma_transfer_callback_t)(LPUART_Type *base, lpuart_edma_handle_t *handle, status_t status, void *userData): LPUART transfer callback function.

struct _lpuart_edma_handle

#include <fsl_lpuart_edma.h>

LPUART eDMA handle.

Public Members

lpuart_edma_transfer_callback_t callback: Callback function.

void *userData: LPUART callback function parameter.

size_t rxDataSizeAll: Size of the data to receive.

size_t txDataSizeAll: Size of the data to send out.

edma_handle_t *txEdmaHandle: The eDMA TX channel used.

edma_handle_t *rxEdmaHandle: The eDMA RX channel used.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state

LTC: LP Trusted Cryptography#

FSL_LTC_DRIVER_VERSION

LTC driver version. Version 2.0.18.

Current version: 2.0.18

Change log:

Version 2.0.1
- fixed warning during g++ compilation
Version 2.0.2
- fixed [KPSDK-10932][LTC][SHA] LTC_HASH() blocks indefinitely when message size exceeds 4080 bytes
Version 2.0.3
- fixed LTC_PKHA_CompareBigNum() in case an integer argument is an array of all zeroes
Version 2.0.4
- constant LTC_PKHA_CompareBigNum() processing time
Version 2.0.5
- Fix MISRA issues
Version 2.0.6
- fixed [KPSDK-23603][LTC] AES Decrypt in ECB and CBC modes fail when ciphertext size > 0xff0 bytes
Version 2.0.7
- Fix MISRA-2012 issues
Version 2.0.8
- Fix Coverity issues
Version 2.0.9
- Fix sign-compare warning in ltc_set_context and in ltc_get_context
Version 2.0.10
- Fix MISRA-2012 issues
Version 2.0.11
- Fix MISRA-2012 issues
Version 2.0.12
- Fix AES Decrypt in CBC modes fail when used kLTC_DecryptKey.
Version 2.0.13
- Add feature macro FSL_FEATURE_LTC_HAS_NO_CLOCK_CONTROL_BIT into LTC_Init function.
Version 2.0.14
- Add feature macro FSL_FEATURE_LTC_HAS_NO_CLOCK_CONTROL_BIT into LTC_Deinit function.
Version 2.0.15
- Fix MISRA-2012 issues
Version 2.0.16
- Fix unitialized GCC warning in LTC_AES_GenerateDecryptKey()
Version 2.0.17
- Fix CMAC for payloads over one block, and if BRIC is present on the device, remove XCBC and “decrypt key” functionality
Version 2.0.18
- Fix CERT INT30-C and INT31-C compliance

void LTC_Init(LTC_Type *base)

Initializes the LTC driver. This function initializes the LTC driver.

Parameters:

base – LTC peripheral base address

void LTC_Deinit(LTC_Type *base)

Deinitializes the LTC driver. This function deinitializes the LTC driver.

Parameters:

base – LTC peripheral base address

void LTC_SetDpaMaskSeed(LTC_Type *base, uint32_t mask)

Sets the DPA Mask Seed register.

The DPA Mask Seed register reseeds the mask that provides resistance against DPA (differential power analysis) attacks on AES or DES keys.

Differential Power Analysis Mask (DPA) resistance uses a randomly changing mask that introduces “noise” into the power consumed by the AES or DES. This reduces the signal-to-noise ratio that differential power analysis attacks use to “guess” bits of the key. This randomly changing mask should be seeded at POR, and continues to provide DPA resistance from that point on. However, to provide even more DPA protection it is recommended that the DPA mask be reseeded after every 50,000 blocks have been processed. At that time, software can opt to write a new seed (preferably obtained from an RNG) into the DPA Mask Seed register (DPAMS), or software can opt to provide the new seed earlier or later, or not at all. DPA resistance continues even if the DPA mask is never reseeded.

Parameters:

base – LTC peripheral base address
mask – The DPA mask seed.

LTC AES driver#

enum _ltc_aes_key_t

Type of AES key for ECB and CBC decrypt operations.

Values:

enumerator kLTC_EncryptKey: Input key is an encrypt key

typedef enum _ltc_aes_key_t ltc_aes_key_t: Type of AES key for ECB and CBC decrypt operations.

status_t LTC_AES_EncryptEcb(LTC_Type *base, const uint8_t *plaintext, uint8_t *ciphertext, uint32_t size, const uint8_t *key, uint32_t keySize)

Encrypts AES using the ECB block mode.

Parameters:

base – LTC peripheral base address
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
key – Input key to use for encryption
keySize – Size of the input key, in bytes. Must be 16, 24, or 32.

Returns:

Status from encrypt operation

status_t LTC_AES_DecryptEcb(LTC_Type *base, const uint8_t *ciphertext, uint8_t *plaintext, uint32_t size, const uint8_t *key, uint32_t keySize, ltc_aes_key_t keyType)

Decrypts AES using ECB block mode.

Parameters:

base – LTC peripheral base address
ciphertext – Input cipher text to decrypt
plaintext – [out] Output plain text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
key – Input key.
keySize – Size of the input key, in bytes. Must be 16, 24, or 32.
keyType – Input type of the key (allows to directly load decrypt key for AES ECB decrypt operation.)

Returns:

Status from decrypt operation

status_t LTC_AES_EncryptCbc(LTC_Type *base, const uint8_t *plaintext, uint8_t *ciphertext, uint32_t size, const uint8_t iv[16], const uint8_t *key, uint32_t keySize)

Encrypts AES using CBC block mode.

Parameters:

base – LTC peripheral base address
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input initial vector to combine with the first input block.
key – Input key to use for encryption
keySize – Size of the input key, in bytes. Must be 16, 24, or 32.

Returns:

Status from encrypt operation

status_t LTC_AES_DecryptCbc(LTC_Type *base, const uint8_t *ciphertext, uint8_t *plaintext, uint32_t size, const uint8_t iv[16], const uint8_t *key, uint32_t keySize, ltc_aes_key_t keyType)

Decrypts AES using CBC block mode.

Parameters:

base – LTC peripheral base address
ciphertext – Input cipher text to decrypt
plaintext – [out] Output plain text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input initial vector to combine with the first input block.
key – Input key to use for decryption
keySize – Size of the input key, in bytes. Must be 16, 24, or 32.
keyType – Input type of the key (allows to directly load decrypt key for AES CBC decrypt operation.)

Returns:

Status from decrypt operation

status_t LTC_AES_CryptCtr(LTC_Type *base, const uint8_t *input, uint8_t *output, uint32_t size, uint8_t counter[16U], const uint8_t *key, uint32_t keySize, uint8_t counterlast[16U], uint32_t *szLeft)

Encrypts or decrypts AES using CTR block mode.

Encrypts or decrypts AES using CTR block mode. AES CTR mode uses only forward AES cipher and same algorithm for encryption and decryption. The only difference between encryption and decryption is that, for encryption, the input argument is plain text and the output argument is cipher text. For decryption, the input argument is cipher text and the output argument is plain text.

Parameters:

base – LTC peripheral base address
input – Input data for CTR block mode
output – [out] Output data for CTR block mode
size – Size of input and output data in bytes
counter – [inout] Input counter (updates on return)
key – Input key to use for forward AES cipher
keySize – Size of the input key, in bytes. Must be 16, 24, or 32.
counterlast – [out] Output cipher of last counter, for chained CTR calls. NULL can be passed if chained calls are not used.
szLeft – [out] Output number of bytes in left unused in counterlast block. NULL can be passed if chained calls are not used.

Returns:

Status from encrypt operation

status_t LTC_AES_EncryptTagGcm(LTC_Type *base, const uint8_t *plaintext, uint8_t *ciphertext, uint32_t size, const uint8_t *iv, uint32_t ivSize, const uint8_t *aad, uint32_t aadSize, const uint8_t *key, uint32_t keySize, uint8_t *tag, uint32_t tagSize)

Encrypts AES and tags using GCM block mode.

Encrypts AES and optionally tags using GCM block mode. If plaintext is NULL, only the GHASH is calculated and output in the ‘tag’ field.

Parameters:

base – LTC peripheral base address
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text.
size – Size of input and output data in bytes
iv – Input initial vector
ivSize – Size of the IV
aad – Input additional authentication data
aadSize – Input size in bytes of AAD
key – Input key to use for encryption
keySize – Size of the input key, in bytes. Must be 16, 24, or 32.
tag – [out] Output hash tag. Set to NULL to skip tag processing.
tagSize – Input size of the tag to generate, in bytes. Must be 4,8,12,13,14,15 or 16.

Returns:

Status from encrypt operation

status_t LTC_AES_DecryptTagGcm(LTC_Type *base, const uint8_t *ciphertext, uint8_t *plaintext, uint32_t size, const uint8_t *iv, uint32_t ivSize, const uint8_t *aad, uint32_t aadSize, const uint8_t *key, uint32_t keySize, const uint8_t *tag, uint32_t tagSize)

Decrypts AES and authenticates using GCM block mode.

Decrypts AES and optionally authenticates using GCM block mode. If ciphertext is NULL, only the GHASH is calculated and compared with the received GHASH in ‘tag’ field.

Parameters:

base – LTC peripheral base address
ciphertext – Input cipher text to decrypt
plaintext – [out] Output plain text.
size – Size of input and output data in bytes
iv – Input initial vector
ivSize – Size of the IV
aad – Input additional authentication data
aadSize – Input size in bytes of AAD
key – Input key to use for encryption
keySize – Size of the input key, in bytes. Must be 16, 24, or 32.
tag – Input hash tag to compare. Set to NULL to skip tag processing.
tagSize – Input size of the tag, in bytes. Must be 4, 8, 12, 13, 14, 15, or 16.

Returns:

Status from decrypt operation

status_t LTC_AES_EncryptTagCcm(LTC_Type *base, const uint8_t *plaintext, uint8_t *ciphertext, uint32_t size, const uint8_t *iv, uint32_t ivSize, const uint8_t *aad, uint32_t aadSize, const uint8_t *key, uint32_t keySize, uint8_t *tag, uint32_t tagSize)

Encrypts AES and tags using CCM block mode.

Encrypts AES and optionally tags using CCM block mode.

Parameters:

base – LTC peripheral base address
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text.
size – Size of input and output data in bytes. Zero means authentication only.
iv – Nonce
ivSize – Length of the Nonce in bytes. Must be 7, 8, 9, 10, 11, 12, or 13.
aad – Input additional authentication data. Can be NULL if aadSize is zero.
aadSize – Input size in bytes of AAD. Zero means data mode only (authentication skipped).
key – Input key to use for encryption
keySize – Size of the input key, in bytes. Must be 16, 24, or 32.
tag – [out] Generated output tag. Set to NULL to skip tag processing.
tagSize – Input size of the tag to generate, in bytes. Must be 4, 6, 8, 10, 12, 14, or 16.

Returns:

Status from encrypt operation

status_t LTC_AES_DecryptTagCcm(LTC_Type *base, const uint8_t *ciphertext, uint8_t *plaintext, uint32_t size, const uint8_t *iv, uint32_t ivSize, const uint8_t *aad, uint32_t aadSize, const uint8_t *key, uint32_t keySize, const uint8_t *tag, uint32_t tagSize)

Decrypts AES and authenticates using CCM block mode.

Decrypts AES and optionally authenticates using CCM block mode.

Parameters:

base – LTC peripheral base address
ciphertext – Input cipher text to decrypt
plaintext – [out] Output plain text.
size – Size of input and output data in bytes. Zero means authentication only.
iv – Nonce
ivSize – Length of the Nonce in bytes. Must be 7, 8, 9, 10, 11, 12, or 13.
aad – Input additional authentication data. Can be NULL if aadSize is zero.
aadSize – Input size in bytes of AAD. Zero means data mode only (authentication skipped).
key – Input key to use for decryption
keySize – Size of the input key, in bytes. Must be 16, 24, or 32.
tag – Received tag. Set to NULL to skip tag processing.
tagSize – Input size of the received tag to compare with the computed tag, in bytes. Must be 4, 6, 8, 10, 12, 14, or 16.

Returns:

Status from decrypt operation

LTC_AES_BLOCK_SIZE: AES block size in bytes

LTC_AES_IV_SIZE: AES Input Vector size in bytes

LTC_KEY_REGISTER_READABLE

LTC_AES_DecryptCtr(base, input, output, size, counter, key, keySize, counterlast, szLeft): AES CTR decrypt is mapped to the AES CTR generic operation

LTC_AES_EncryptCtr(base, input, output, size, counter, key, keySize, counterlast, szLeft): AES CTR encrypt is mapped to the AES CTR generic operation

LTC DES driver#

status_t LTC_DES_EncryptEcb(LTC_Type *base, const uint8_t *plaintext, uint8_t *ciphertext, uint32_t size, const uint8_t key[8])

Encrypts DES using ECB block mode.

Parameters:

base – LTC peripheral base address
plaintext – Input plaintext to encrypt
ciphertext – [out] Output ciphertext
size – Size of input and output data in bytes. Must be multiple of 8 bytes.
key – Input key to use for encryption

Returns: