MCXW236B#

ANACTRL: Analog Control Driver#

void ANACTRL_Init(ANACTRL_Type *base)#

Initializes the ANACTRL mode, the module’s clock will be enabled by invoking this function.

Parameters:

base – ANACTRL peripheral base address.

void ANACTRL_Deinit(ANACTRL_Type *base)#

De-initializes ANACTRL module, the module’s clock will be disabled by invoking this function.

Parameters:

base – ANACTRL peripheral base address.

void ANACTRL_SetFro192M(ANACTRL_Type *base, const anactrl_fro192M_config_t *config)#

Configs the on-chip high-speed Free Running Oscillator(FRO192M), such as enabling/disabling 12 MHZ clock output and enable/disable 96MHZ clock output.

Parameters:

base – ANACTRL peripheral base address.
config – Pointer to FRO192M configuration structure. Refer to anactrl_fro192M_config_t structure.

void ANACTRL_GetDefaultFro192MConfig(anactrl_fro192M_config_t *config)#

Gets the default configuration of FRO192M. The default values are:

config->enable12MHzClk = true;
config->enable96MHzClk = false;

Parameters:

config – Pointer to FRO192M configuration structure. Refer to anactrl_fro192M_config_t structure.

void ANACTRL_SetXo32M(ANACTRL_Type *base, const anactrl_xo32M_config_t *config)#

Configs the 32 MHz Crystal oscillator(High-speed crystal oscillator), such as enable/disable output to CPU system, and so on.

Parameters:

base – ANACTRL peripheral base address.
config – Pointer to XO32M configuration structure. Refer to anactrl_xo32M_config_t structure.

void ANACTRL_GetDefaultXo32MConfig(anactrl_xo32M_config_t *config)#

Gets the default configuration of XO32M. The default values are:

config->enableSysCLkOutput = false;
config->enableACBufferBypass = false;

Parameters:

config – Pointer to XO32M configuration structure. Refer to anactrl_xo32M_config_t structure.

uint32_t ANACTRL_MeasureFrequency(ANACTRL_Type *base, uint8_t scale, uint32_t refClkFreq)#

Measures the frequency of the target clock source.

This function measures target frequency according to a accurate reference frequency.The formula is: Ftarget = (CAPVAL * Freference) / ((1<<SCALE)-1)

Note

Both tartget and reference clocks are selectable by programming the target clock select FREQMEAS_TARGET register in INPUTMUX and reference clock select FREQMEAS_REF register in INPUTMUX.

Parameters:

base – ANACTRL peripheral base address.
scale – Define the power of 2 count that ref counter counts to during measurement, ranges from 2 to 31.
refClkFreq – frequency of the reference clock.

Returns:

frequency of the target clock.

static inline void ANACTRL_EnableInterrupts(ANACTRL_Type *base, uint32_t mask)#

Enables the ANACTRL interrupts.

Parameters:

base – ANACTRL peripheral base address.
mask – The interrupt mask. Refer to “_anactrl_interrupt” enumeration.

static inline void ANACTRL_DisableInterrupts(ANACTRL_Type *base, uint32_t mask)#

Disables the ANACTRL interrupts.

Parameters:

base – ANACTRL peripheral base address.
mask – The interrupt mask. Refer to “_anactrl_interrupt” enumeration.

static inline void ANACTRL_ClearInterrupts(ANACTRL_Type *base, uint32_t mask)#

Clears the ANACTRL interrupts.

Parameters:

base – ANACTRL peripheral base address.
mask – The interrupt mask. Refer to “_anactrl_interrupt” enumeration.

static inline uint32_t ANACTRL_GetStatusFlags(ANACTRL_Type *base)#

Gets ANACTRL status flags.

This function gets Analog control status flags. The flags are returned as the logical OR value of the enumerators _anactrl_flags. To check for a specific status, compare the return value with enumerators in the _anactrl_flags. For example, to check whether the flash is in power down mode:

if (kANACTRL_FlashPowerDownFlag & ANACTRL_ANACTRL_GetStatusFlags(ANACTRL))
{
    ...
}

Parameters:

base – ANACTRL peripheral base address.

Returns:

ANACTRL status flags which are given in the enumerators in the _anactrl_flags.

static inline uint32_t ANACTRL_GetOscStatusFlags(ANACTRL_Type *base)#

Gets ANACTRL oscillators status flags.

This function gets Anactrl oscillators status flags. The flags are returned as the logical OR value of the enumerators _anactrl_osc_flags. To check for a specific status, compare the return value with enumerators in the _anactrl_osc_flags. For example, to check whether the FRO192M clock output is valid:

if (kANACTRL_OutputClkValidFlag & ANACTRL_ANACTRL_GetOscStatusFlags(ANACTRL))
{
    ...
}

Parameters:

base – ANACTRL peripheral base address.

Returns:

ANACTRL oscillators status flags which are given in the enumerators in the _anactrl_osc_flags.

static inline uint32_t ANACTRL_GetInterruptStatusFlags(ANACTRL_Type *base)#

Gets ANACTRL interrupt status flags.

This function gets Anactrl interrupt status flags. The flags are returned as the logical OR value of the enumerators _anactrl_interrupt_flags. To check for a specific status, compare the return value with enumerators in the _anactrl_interrupt_flags. For example, to check whether the VBAT voltage level is above the threshold:

if (kANACTRL_BodVbatPowerFlag & ANACTRL_ANACTRL_GetInterruptStatusFlags(ANACTRL))
{
    ...
}

Parameters:

base – ANACTRL peripheral base address.

Returns:

ANACTRL oscillators status flags which are given in the enumerators in the _anactrl_osc_flags.

static inline void ANACTRL_EnableVref1V(ANACTRL_Type *base, bool enable)#

Aux_Bias Control Interfaces.

Enables/disabless 1V reference voltage buffer.

Parameters:

base – ANACTRL peripheral base address.
enable – Used to enable or disable 1V reference voltage buffer.

enum _anactrl_interrupt_flags#

ANACTRL interrupt flags.

Values:

enumerator kANACTRL_Bod1Flag#: BOD1 Interrupt status before Interrupt Enable.

enumerator kANACTRL_Bod1InterruptFlag#: BOD1 Interrupt status after Interrupt Enable.

enumerator kANACTRL_Bod1PowerFlag#: Current value of BOD1 power status output.

enumerator kANACTRL_BodCoreFlag#: BOD CORE Interrupt status before Interrupt Enable.

enumerator kANACTRL_BodCoreInterruptFlag#: BOD CORE Interrupt status after Interrupt Enable.

enumerator kANACTRL_BodCorePowerFlag#: Current value of BOD CORE power status output.

enumerator kANACTRL_DcdcFlag#: DCDC Interrupt status before Interrupt Enable.

enumerator kANACTRL_DcdcInterruptFlag#: DCDC Interrupt status after Interrupt Enable.

enumerator kANACTRL_DcdcPowerFlag#: Current value of DCDC power status output.

enum _anactrl_interrupt#

ANACTRL interrupt control.

Values:

enumerator kANACTRL_Bod1InterruptEnable#: BOD1 interrupt control.

enumerator kANACTRL_BodCoreInterruptEnable#: BOD CORE interrupt control.

enumerator kANACTRL_DcdcInterruptEnable#: DCDC interrupt control.

enum _anactrl_flags#

ANACTRL status flags.

Values:

enumerator kANACTRL_FlashPowerDownFlag#: Flash power-down status.

enumerator kANACTRL_FlashInitErrorFlag#: Flash initialization error status.

enum _anactrl_osc_flags#

ANACTRL FRO192M and XO32M status flags.

Values:

enumerator kANACTRL_OutputClkValidFlag#: Output clock valid signal.

enumerator kANACTRL_CCOThresholdVoltageFlag#: CCO threshold voltage detector output (signal vcco_ok).

enumerator kANACTRL_XO32MOutputReadyFlag#: Indicates XO out frequency statibilty.

typedef struct _anactrl_fro192M_config anactrl_fro192M_config_t#

Configuration for FRO192M.

This structure holds the configuration settings for the on-chip high-speed Free Running Oscillator. To initialize this structure to reasonable defaults, call the ANACTRL_GetDefaultFro192MConfig() function and pass a pointer to your config structure instance.

typedef struct _anactrl_xo32M_config anactrl_xo32M_config_t#

Configuration for XO32M.

This structure holds the configuration settings for the 32 MHz crystal oscillator. To initialize this structure to reasonable defaults, call the ANACTRL_GetDefaultXo32MConfig() function and pass a pointer to your config structure instance.

FSL_ANACTRL_DRIVER_VERSION#: ANACTRL driver version.

struct _anactrl_fro192M_config#

#include <fsl_anactrl.h>

Configuration for FRO192M.

Public Members

bool enable12MHzClk#: Enable 12MHz clock.

bool enable96MHzClk#: Enable 96MHz clock.

struct _anactrl_xo32M_config#

#include <fsl_anactrl.h>

Configuration for XO32M.

Public Members

bool enableACBufferBypass#: Enable XO AC buffer bypass in pll and top level.

bool enableSysCLkOutput#: Enable XO 32 MHz output to CPU system, SCT, and CLKOUT

bool enableADCOutput#: Enable High speed crystal oscillator output to ADC.

casper_driver#

FSL_CASPER_DRIVER_VERSION#

CASPER driver version. Version 2.2.5.

Current version: 2.2.5

Change log:

Version 2.0.0
- Initial version
Version 2.0.1
- Bug fix KPSDK-24531 double_scalar_multiplication() result may be all zeroes for some specific input
Version 2.0.2
- Bug fix KPSDK-25015 CASPER_MEMCPY hard-fault on LPC55xx when both source and destination buffers are outside of CASPER_RAM
Version 2.0.3
- Bug fix KPSDK-28107 RSUB, FILL and ZERO operations not implemented in enum _casper_operation.
Version 2.0.4
- For GCC compiler, enforce O1 optimize level, specifically to remove strict-aliasing option. This driver is very specific and requires -fno-strict-aliasing.
Version 2.0.5
- Fix sign-compare warning.
Version 2.0.6
- Fix IAR Pa082 warning.
Version 2.0.7
- Fix MISRA-C 2012 issue.
Version 2.0.8
- Add feature macro for CASPER_RAM_OFFSET.
Version 2.0.9
- Remove unused function Jac_oncurve().
- Fix ECC384 build.
Version 2.0.10
- Fix MISRA-C 2012 issue.
Version 2.1.0
- Add ECC NIST P-521 elliptic curve.
Version 2.2.0
- Rework driver to support multiple curves at once.
Version 2.2.1
- Fix MISRA-C 2012 issue.
Version 2.2.2
- Enable hardware interleaving to RAMX0 and RAMX1 for CASPER by feature macro FSL_FEATURE_CASPER_RAM_HW_INTERLEAVE
Version 2.2.3
- Added macro into CASPER_Init and CASPER_Deinit to support devices without clock and reset control.
Version 2.2.4
- Fix MISRA-C 2012 issue.
Version 2.2.5
- Fix Coverity Uninitialized scalar variable.

enum _casper_operation#

CASPER operation.

Values:

enumerator kCASPER_OpMul6464NoSum#

enumerator kCASPER_OpMul6464Sum#: Walking 1 or more of J loop, doing r=a*b using 64x64=128

enumerator kCASPER_OpMul6464FullSum#: Walking 1 or more of J loop, doing c,r=r+a*b using 64x64=128, but assume inner j loop

enumerator kCASPER_OpMul6464Reduce#: Walking 1 or more of J loop, doing c,r=r+a*b using 64x64=128, but sum all of w.

enumerator kCASPER_OpAdd64#: Walking 1 or more of J loop, doing c,r[-1]=r+a*b using 64x64=128, but skip 1st write

enumerator kCASPER_OpSub64#: Walking add with off_AB, and in/out off_RES doing c,r=r+a+c using 64+64=65

enumerator kCASPER_OpDouble64#: Walking subtract with off_AB, and in/out off_RES doing r=r-a using 64-64=64, with last borrow implicit if any

enumerator kCASPER_OpXor64#: Walking add to self with off_RES doing c,r=r+r+c using 64+64=65

enumerator kCASPER_OpRSub64#: Walking XOR with off_AB, and in/out off_RES doing r=r^a using 64^64=64

enumerator kCASPER_OpShiftLeft32#: Walking subtract with off_AB, and in/out off_RES using r=a-r

enumerator kCASPER_OpShiftRight32#: Walking shift left doing r1,r=(b*D)|r1, where D is 2^amt and is loaded by app (off_CD not used)

enumerator kCASPER_OpCopy#: Walking shift right doing r,r1=(b*D)|r1, where D is 2^(32-amt) and is loaded by app (off_CD not used) and off_RES starts at MSW

enumerator kCASPER_OpRemask#: Copy from ABoff to resoff, 64b at a time

enumerator kCASPER_OpFill#: Copy and mask from ABoff to resoff, 64b at a time

enumerator kCASPER_OpZero#: Fill RESOFF using 64 bits at a time with value in A and B

enumerator kCASPER_OpCompare#: Fill RESOFF using 64 bits at a time of 0s

enumerator kCASPER_OpCompareFast#: Compare two arrays, running all the way to the end

enum _casper_algo_t#

Algorithm used for CASPER operation.

Values:

enumerator kCASPER_ECC_P256#: ECC_P256

enumerator kCASPER_ECC_P384#: ECC_P384

enumerator kCASPER_ECC_P521#: ECC_P521

Values:

enumerator kCASPER_RamOffset_Result#

enumerator kCASPER_RamOffset_Base#

enumerator kCASPER_RamOffset_TempBase#

enumerator kCASPER_RamOffset_Modulus#

enumerator kCASPER_RamOffset_M64#

typedef enum _casper_operation casper_operation_t#: CASPER operation.

typedef enum _casper_algo_t casper_algo_t#: Algorithm used for CASPER operation.

void CASPER_Init(CASPER_Type *base)#

Enables clock and disables reset for CASPER peripheral.

Enable clock and disable reset for CASPER.

Parameters:

base – CASPER base address

void CASPER_Deinit(CASPER_Type *base)#

Disables clock for CASPER peripheral.

Disable clock and enable reset.

Parameters:

base – CASPER base address

CASPER_CP#

CASPER_CP_CTRL0#

CASPER_CP_CTRL1#

CASPER_CP_LOADER#

CASPER_CP_STATUS#

CASPER_CP_INTENSET#

CASPER_CP_INTENCLR#

CASPER_CP_INTSTAT#

CASPER_CP_AREG#

CASPER_CP_BREG#

CASPER_CP_CREG#

CASPER_CP_DREG#

CASPER_CP_RES0#

CASPER_CP_RES1#

CASPER_CP_RES2#

CASPER_CP_RES3#

CASPER_CP_MASK#

CASPER_CP_REMASK#

CASPER_CP_LOCK#

CASPER_CP_ID#

CASPER_Wr32b(value, off)#

CASPER_Wr64b(value, off)#

CASPER_Rd32b(off)#

N_wordlen_max#

casper_driver_pkha#

void CASPER_ModExp(CASPER_Type *base, const uint8_t *signature, const uint8_t *pubN, size_t wordLen, uint32_t pubE, uint8_t *plaintext)#

Performs modular exponentiation - (A^E) mod N.

This function performs modular exponentiation.

Parameters:

base – CASPER base address
signature – first addend (in little endian format)
pubN – modulus (in little endian format)
wordLen – Size of pubN in bytes
pubE – exponent
plaintext – [out] Output array to store result of operation (in little endian format)

void CASPER_ecc_init(casper_algo_t curve)#

Initialize prime modulus mod in Casper memory .

Set the prime modulus mod in Casper memory and set N_wordlen according to selected algorithm.

Parameters:

curve – elliptic curve algoritm

void CASPER_ECC_SECP256R1_Mul(CASPER_Type *base, uint32_t resX[8], uint32_t resY[8], uint32_t X[8], uint32_t Y[8], uint32_t scalar[8])#

Performs ECC secp256r1 point single scalar multiplication.

This function performs ECC secp256r1 point single scalar multiplication [resX; resY] = scalar * [X; Y] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate in normal form, little endian.
resY – [out] Output Y affine coordinate in normal form, little endian.
X – Input X affine coordinate in normal form, little endian.
Y – Input Y affine coordinate in normal form, little endian.
scalar – Input scalar integer, in normal form, little endian.

void CASPER_ECC_SECP256R1_MulAdd(CASPER_Type *base, uint32_t resX[8], uint32_t resY[8], uint32_t X1[8], uint32_t Y1[8], uint32_t scalar1[8], uint32_t X2[8], uint32_t Y2[8], uint32_t scalar2[8])#

Performs ECC secp256r1 point double scalar multiplication.

This function performs ECC secp256r1 point double scalar multiplication [resX; resY] = scalar1 * [X1; Y1] + scalar2 * [X2; Y2] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate.
resY – [out] Output Y affine coordinate.
X1 – Input X1 affine coordinate.
Y1 – Input Y1 affine coordinate.
scalar1 – Input scalar1 integer.
X2 – Input X2 affine coordinate.
Y2 – Input Y2 affine coordinate.
scalar2 – Input scalar2 integer.

void CASPER_ECC_SECP384R1_Mul(CASPER_Type *base, uint32_t resX[12], uint32_t resY[12], uint32_t X[12], uint32_t Y[12], uint32_t scalar[12])#

Performs ECC secp384r1 point single scalar multiplication.

This function performs ECC secp384r1 point single scalar multiplication [resX; resY] = scalar * [X; Y] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate in normal form, little endian.
resY – [out] Output Y affine coordinate in normal form, little endian.
X – Input X affine coordinate in normal form, little endian.
Y – Input Y affine coordinate in normal form, little endian.
scalar – Input scalar integer, in normal form, little endian.

void CASPER_ECC_SECP384R1_MulAdd(CASPER_Type *base, uint32_t resX[12], uint32_t resY[12], uint32_t X1[12], uint32_t Y1[12], uint32_t scalar1[12], uint32_t X2[12], uint32_t Y2[12], uint32_t scalar2[12])#

Performs ECC secp384r1 point double scalar multiplication.

This function performs ECC secp384r1 point double scalar multiplication [resX; resY] = scalar1 * [X1; Y1] + scalar2 * [X2; Y2] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate.
resY – [out] Output Y affine coordinate.
X1 – Input X1 affine coordinate.
Y1 – Input Y1 affine coordinate.
scalar1 – Input scalar1 integer.
X2 – Input X2 affine coordinate.
Y2 – Input Y2 affine coordinate.
scalar2 – Input scalar2 integer.

void CASPER_ECC_SECP521R1_Mul(CASPER_Type *base, uint32_t resX[18], uint32_t resY[18], uint32_t X[18], uint32_t Y[18], uint32_t scalar[18])#

Performs ECC secp521r1 point single scalar multiplication.

This function performs ECC secp521r1 point single scalar multiplication [resX; resY] = scalar * [X; Y] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate in normal form, little endian.
resY – [out] Output Y affine coordinate in normal form, little endian.
X – Input X affine coordinate in normal form, little endian.
Y – Input Y affine coordinate in normal form, little endian.
scalar – Input scalar integer, in normal form, little endian.

void CASPER_ECC_SECP521R1_MulAdd(CASPER_Type *base, uint32_t resX[18], uint32_t resY[18], uint32_t X1[18], uint32_t Y1[18], uint32_t scalar1[18], uint32_t X2[18], uint32_t Y2[18], uint32_t scalar2[18])#

Performs ECC secp521r1 point double scalar multiplication.

This function performs ECC secp521r1 point double scalar multiplication [resX; resY] = scalar1 * [X1; Y1] + scalar2 * [X2; Y2] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate.
resY – [out] Output Y affine coordinate.
X1 – Input X1 affine coordinate.
Y1 – Input Y1 affine coordinate.
scalar1 – Input scalar1 integer.
X2 – Input X2 affine coordinate.
Y2 – Input Y2 affine coordinate.
scalar2 – Input scalar2 integer.

void CASPER_ECC_equal(int *res, uint32_t *op1, uint32_t *op2)#

void CASPER_ECC_equal_to_zero(int *res, uint32_t *op1)#

CDOG#

status_t CDOG_Init(CDOG_Type *base, cdog_config_t *conf)#

Initialize CDOG.

This function initializes CDOG block and setting.

Parameters:

base – CDOG peripheral base address
conf – CDOG configuration structure

Returns:

Status of the init operation

void CDOG_Deinit(CDOG_Type *base)#

Deinitialize CDOG.

This function deinitializes CDOG secure counter.

Parameters:

base – CDOG peripheral base address

void CDOG_GetDefaultConfig(cdog_config_t *conf)#

Sets the default configuration of CDOG.

This function initialize CDOG config structure to default values.

Parameters:

conf – CDOG configuration structure

void CDOG_Stop(CDOG_Type *base, uint32_t stop)#

Stops secure counter and instruction timer.

This function stops instruction timer and secure counter. This also change state od CDOG to IDLE.

Parameters:

base – CDOG peripheral base address
stop – expected value which will be compared with value of secure counter

void CDOG_Start(CDOG_Type *base, uint32_t reload, uint32_t start)#

Sets secure counter and instruction timer values.

This function sets value in RELOAD and START registers for instruction timer and secure counter

Parameters:

base – CDOG peripheral base address
reload – reload value
start – start value

void CDOG_Check(CDOG_Type *base, uint32_t check)#

Checks secure counter.

This function compares stop value in handler with secure counter value by writting to RELOAD refister.

Parameters:

base – CDOG peripheral base address
check – expected (stop) value

void CDOG_Set(CDOG_Type *base, uint32_t stop, uint32_t reload, uint32_t start)#

Sets secure counter and instruction timer values.

This function sets value in STOP, RELOAD and START registers for instruction timer and secure counter.

Parameters:

base – CDOG peripheral base address
stop – expected value which will be compared with value of secure counter
reload – reload value for instruction timer
start – start value for secure timer

void CDOG_Add(CDOG_Type *base, uint32_t add)#

Add value to secure counter.

This function add specified value to secure counter.

Parameters:

base – CDOG peripheral base address.
add – Value to be added.

void CDOG_Add1(CDOG_Type *base)#

Add 1 to secure counter.

This function add 1 to secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Add16(CDOG_Type *base)#

Add 16 to secure counter.

This function add 16 to secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Add256(CDOG_Type *base)#

Add 256 to secure counter.

This function add 256 to secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Sub(CDOG_Type *base, uint32_t sub)#

brief Substract value to secure counter

This function substract specified value to secure counter.

param base CDOG peripheral base address. param sub Value to be substracted.

void CDOG_Sub1(CDOG_Type *base)#

Substract 1 from secure counter.

This function substract specified 1 from secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Sub16(CDOG_Type *base)#

Substract 16 from secure counter.

This function substract specified 16 from secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Sub256(CDOG_Type *base)#

Substract 256 from secure counter.

This function substract specified 256 from secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_WritePersistent(CDOG_Type *base, uint32_t value)#

Set the CDOG persistent word.

Parameters:

base – CDOG peripheral base address.
value – The value to be written.

uint32_t CDOG_ReadPersistent(CDOG_Type *base)#

Get the CDOG persistent word.

Parameters:

base – CDOG peripheral base address.

Returns:

The persistent word.

FSL_CDOG_DRIVER_VERSION#

Defines CDOG driver version 2.1.3.

Change log:

Version 2.1.3
- Re-design multiple instance IRQs and Clocks
- Add fix for RESTART command errata
Version 2.1.2
- Support multiple IRQs
- Fix default CONTROL values
Version 2.1.1
- Remove bit CONTROL[CONTROL_CTRL]
Version 2.1.0
- Rename CWT to CDOG
Version 2.0.2
- Fix MISRA-2012 issues
Version 2.0.1
- Fix doxygen issues
Version 2.0.0
- initial version

enum __cdog_debug_Action_ctrl_enum#

Values:

enumerator kCDOG_DebugHaltCtrl_Run#

enumerator kCDOG_DebugHaltCtrl_Pause#

enum __cdog_irq_pause_ctrl_enum#

Values:

enumerator kCDOG_IrqPauseCtrl_Run#

enumerator kCDOG_IrqPauseCtrl_Pause#

enum __cdog_fault_ctrl_enum#

Values:

enumerator kCDOG_FaultCtrl_EnableReset#

enumerator kCDOG_FaultCtrl_EnableInterrupt#

enumerator kCDOG_FaultCtrl_NoAction#

enum __code_lock_ctrl_enum#

Values:

enumerator kCDOG_LockCtrl_Lock#

enumerator kCDOG_LockCtrl_Unlock#

typedef uint32_t secure_counter_t#

SC_ADD(add)#

SC_ADD1#

SC_ADD16#

SC_ADD256#

SC_SUB(sub)#

SC_SUB1#

SC_SUB16#

SC_SUB256#

SC_CHECK(val)#

struct cdog_config_t#

CRC: Cyclic Redundancy Check Driver#

FSL_CRC_DRIVER_VERSION#

CRC driver version. Version 2.1.1.

Current version: 2.1.1

Change log:

Version 2.0.0
- initial version
Version 2.0.1
- add explicit type cast when writing to WR_DATA
Version 2.0.2
- Fix MISRA issue
Version 2.1.0
- Add CRC_WriteSeed function
Version 2.1.1
- Fix MISRA issue

enum _crc_polynomial#

CRC polynomials to use.

Values:

enumerator kCRC_Polynomial_CRC_CCITT#: x^16+x^12+x^5+1

enumerator kCRC_Polynomial_CRC_16#: x^16+x^15+x^2+1

enumerator kCRC_Polynomial_CRC_32#: x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1

typedef enum _crc_polynomial crc_polynomial_t#: CRC polynomials to use.

typedef struct _crc_config crc_config_t#

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

void CRC_Init(CRC_Type *base, const crc_config_t *config)#

Enables and configures the CRC peripheral module.

This functions enables the CRC peripheral clock in the LPC SYSCON block. It also configures the CRC engine and starts checksum computation by writing the seed.

Parameters:

base – CRC peripheral address.
config – CRC module configuration structure.

static inline void CRC_Deinit(CRC_Type *base)#

Disables the CRC peripheral module.

This functions disables the CRC peripheral clock in the LPC SYSCON block.

Parameters:

base – CRC peripheral address.

void CRC_Reset(CRC_Type *base)#

resets CRC peripheral module.

Parameters:

base – CRC peripheral address.

void CRC_WriteSeed(CRC_Type *base, uint32_t seed)#

Write seed to CRC peripheral module.

Parameters:

base – CRC peripheral address.
seed – CRC Seed value.

void CRC_GetDefaultConfig(crc_config_t *config)#

Loads default values to CRC protocol configuration structure.

Loads default values to CRC protocol configuration structure. The default values are:

config->polynomial = kCRC_Polynomial_CRC_CCITT;
config->reverseIn = false;
config->complementIn = false;
config->reverseOut = false;
config->complementOut = false;
config->seed = 0xFFFFU;

Parameters:

config – CRC protocol configuration structure

void CRC_GetConfig(CRC_Type *base, crc_config_t *config)#

Loads actual values configured in CRC peripheral to CRC protocol configuration structure.

The values, including seed, can be used to resume CRC calculation later.

Parameters:

base – CRC peripheral address.
config – CRC protocol configuration structure

void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize)#

Writes data to the CRC module.

Writes input data buffer bytes to CRC data register.

Parameters:

base – CRC peripheral address.
data – Input data stream, MSByte in data[0].
dataSize – Size of the input data buffer in bytes.

static inline uint32_t CRC_Get32bitResult(CRC_Type *base)#

Reads 32-bit checksum from the CRC module.

Reads CRC data register.

Parameters:

base – CRC peripheral address.

Returns:

final 32-bit checksum, after configured bit reverse and complement operations.

static inline uint16_t CRC_Get16bitResult(CRC_Type *base)#

Reads 16-bit checksum from the CRC module.

Reads CRC data register.

Parameters:

base – CRC peripheral address.

Returns:

final 16-bit checksum, after configured bit reverse and complement operations.

CRC_DRIVER_USE_CRC16_CCITT_FALSE_AS_DEFAULT#: Default configuration structure filled by CRC_GetDefaultConfig(). Uses CRC-16/CCITT-FALSE as default.

struct _crc_config#

#include <fsl_crc.h>

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

Public Members

crc_polynomial_t polynomial#: CRC polynomial.

bool reverseIn#: Reverse bits on input.

bool complementIn#: Perform 1’s complement on input.

bool reverseOut#: Reverse bits on output.

bool complementOut#: Perform 1’s complement on output.

uint32_t seed#: Starting checksum value.

CTIMER: Standard counter/timers#

void CTIMER_Init(CTIMER_Type *base, const ctimer_config_t *config)#

Ungates the clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application before using the driver.

Parameters:

base – Ctimer peripheral base address
config – Pointer to the user configuration structure.

void CTIMER_Deinit(CTIMER_Type *base)#

Gates the timer clock.

Parameters:

base – Ctimer peripheral base address

void CTIMER_GetDefaultConfig(ctimer_config_t *config)#

Fills in the timers configuration structure with the default settings.

The default values are:

config->mode = kCTIMER_TimerMode;
config->input = kCTIMER_Capture_0;
config->prescale = 0;

Parameters:

config – Pointer to the user configuration structure.

status_t CTIMER_SetupPwmPeriod(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint32_t pwmPeriod, uint32_t pulsePeriod, bool enableInt)#

Configures the PWM signal parameters.

Enables PWM mode on the match channel passed in and will then setup the match value and other match parameters to generate a PWM signal. This function can manually assign the specified channel to set the PWM cycle.

Note

When setting PWM output from multiple output pins, all should use the same PWM period

Parameters:

base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
pwmPeriod – PWM period match value
pulsePeriod – Pulse width match value
enableInt – Enable interrupt when the timer value reaches the match value of the PWM pulse, if it is 0 then no interrupt will be generated.

Returns:

kStatus_Success on success kStatus_Fail If matchChannel is equal to pwmPeriodChannel; this channel is reserved to set the PWM cycle If PWM pulse width register value is larger than 0xFFFFFFFF.

status_t CTIMER_SetupPwm(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint8_t dutyCyclePercent, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz, bool enableInt)#

Configures the PWM signal parameters.

Note

When setting PWM output from multiple output pins, all should use the same PWM frequency. Please use CTIMER_SetupPwmPeriod to set up the PWM with high resolution.

Parameters:

base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
dutyCyclePercent – PWM pulse width; the value should be between 0 to 100
pwmFreq_Hz – PWM signal frequency in Hz
srcClock_Hz – Timer counter clock in Hz
enableInt – Enable interrupt when the timer value reaches the match value of the PWM pulse, if it is 0 then no interrupt will be generated.

static inline void CTIMER_UpdatePwmPulsePeriod(CTIMER_Type *base, ctimer_match_t matchChannel, uint32_t pulsePeriod)#

Updates the pulse period of an active PWM signal.

Parameters:

base – Ctimer peripheral base address
matchChannel – Match pin to be used to output the PWM signal
pulsePeriod – New PWM pulse width match value

status_t CTIMER_UpdatePwmDutycycle(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint8_t dutyCyclePercent)#

Updates the duty cycle of an active PWM signal.

Note

Please use CTIMER_SetupPwmPeriod to update the PWM with high resolution. This function can manually assign the specified channel to set the PWM cycle.

Parameters:

base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
dutyCyclePercent – New PWM pulse width; the value should be between 0 to 100

Returns:

kStatus_Success on success kStatus_Fail If PWM pulse width register value is larger than 0xFFFFFFFF.

static inline void CTIMER_EnableInterrupts(CTIMER_Type *base, uint32_t mask)#

Enables the selected Timer interrupts.

Parameters:

base – Ctimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline void CTIMER_DisableInterrupts(CTIMER_Type *base, uint32_t mask)#

Disables the selected Timer interrupts.

Parameters:

base – Ctimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline uint32_t CTIMER_GetEnabledInterrupts(CTIMER_Type *base)#

Gets the enabled Timer interrupts.

Parameters:

base – Ctimer peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline uint32_t CTIMER_GetStatusFlags(CTIMER_Type *base)#

Gets the Timer status flags.

Parameters:

base – Ctimer peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration ctimer_status_flags_t

static inline void CTIMER_ClearStatusFlags(CTIMER_Type *base, uint32_t mask)#

Clears the Timer status flags.

Parameters:

base – Ctimer peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration ctimer_status_flags_t

static inline void CTIMER_StartTimer(CTIMER_Type *base)#

Starts the Timer counter.

Parameters:

base – Ctimer peripheral base address

static inline void CTIMER_StopTimer(CTIMER_Type *base)#

Stops the Timer counter.

Parameters:

base – Ctimer peripheral base address

FSL_CTIMER_DRIVER_VERSION#: Version 2.3.6

enum _ctimer_capture_channel#

List of Timer capture channels.

Values:

enumerator kCTIMER_Capture_0#: Timer capture channel 0

enumerator kCTIMER_Capture_1#: Timer capture channel 1

enumerator kCTIMER_Capture_3#: Timer capture channel 3

enum _ctimer_capture_edge#

List of capture edge options.

Values:

enumerator kCTIMER_Capture_RiseEdge#: Capture on rising edge

enumerator kCTIMER_Capture_FallEdge#: Capture on falling edge

enumerator kCTIMER_Capture_BothEdge#: Capture on rising and falling edge

enum _ctimer_match#

List of Timer match registers.

Values:

enumerator kCTIMER_Match_0#: Timer match register 0

enumerator kCTIMER_Match_1#: Timer match register 1

enumerator kCTIMER_Match_2#: Timer match register 2

enumerator kCTIMER_Match_3#: Timer match register 3

enum _ctimer_external_match#

List of external match.

Values:

enumerator kCTIMER_External_Match_0#: External match 0

enumerator kCTIMER_External_Match_1#: External match 1

enumerator kCTIMER_External_Match_2#: External match 2

enumerator kCTIMER_External_Match_3#: External match 3

enum _ctimer_match_output_control#

List of output control options.

Values:

enumerator kCTIMER_Output_NoAction#: No action is taken

enumerator kCTIMER_Output_Clear#: Clear the EM bit/output to 0

enumerator kCTIMER_Output_Set#: Set the EM bit/output to 1

enumerator kCTIMER_Output_Toggle#: Toggle the EM bit/output

enum _ctimer_timer_mode#

List of Timer modes.

Values:

enumerator kCTIMER_TimerMode#

enumerator kCTIMER_IncreaseOnRiseEdge#

enumerator kCTIMER_IncreaseOnFallEdge#

enumerator kCTIMER_IncreaseOnBothEdge#

enum _ctimer_interrupt_enable#

List of Timer interrupts.

Values:

enumerator kCTIMER_Match0InterruptEnable#: Match 0 interrupt

enumerator kCTIMER_Match1InterruptEnable#: Match 1 interrupt

enumerator kCTIMER_Match2InterruptEnable#: Match 2 interrupt

enumerator kCTIMER_Match3InterruptEnable#: Match 3 interrupt

enum _ctimer_status_flags#

List of Timer flags.

Values:

enumerator kCTIMER_Match0Flag#: Match 0 interrupt flag

enumerator kCTIMER_Match1Flag#: Match 1 interrupt flag

enumerator kCTIMER_Match2Flag#: Match 2 interrupt flag

enumerator kCTIMER_Match3Flag#: Match 3 interrupt flag

enum ctimer_callback_type_t#

Callback type when registering for a callback. When registering a callback an array of function pointers is passed the size could be 1 or 8, the callback type will tell that.

Values:

enumerator kCTIMER_SingleCallback#: Single Callback type where there is only one callback for the timer. based on the status flags different channels needs to be handled differently

enumerator kCTIMER_MultipleCallback#: Multiple Callback type where there can be 8 valid callbacks, one per channel. for both match/capture

typedef enum _ctimer_capture_channel ctimer_capture_channel_t#: List of Timer capture channels.

typedef enum _ctimer_capture_edge ctimer_capture_edge_t#: List of capture edge options.

typedef enum _ctimer_match ctimer_match_t#: List of Timer match registers.

typedef enum _ctimer_external_match ctimer_external_match_t#: List of external match.

typedef enum _ctimer_match_output_control ctimer_match_output_control_t#: List of output control options.

typedef enum _ctimer_timer_mode ctimer_timer_mode_t#: List of Timer modes.

typedef enum _ctimer_interrupt_enable ctimer_interrupt_enable_t#: List of Timer interrupts.

typedef enum _ctimer_status_flags ctimer_status_flags_t#: List of Timer flags.

typedef void (*ctimer_callback_t)(uint32_t flags)#

typedef struct _ctimer_match_config ctimer_match_config_t#

Match configuration.

This structure holds the configuration settings for each match register.

typedef struct _ctimer_config ctimer_config_t#

Timer configuration structure.

This structure holds the configuration settings for the Timer peripheral. To initialize this structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t *config)#

Setup the match register.

User configuration is used to setup the match value and action to be taken when a match occurs.

Parameters:

base – Ctimer peripheral base address
matchChannel – Match register to configure
config – Pointer to the match configuration structure

uint32_t CTIMER_GetOutputMatchStatus(CTIMER_Type *base, uint32_t matchChannel)#

Get the status of output match.

This function gets the status of output MAT, whether or not this output is connected to a pin. This status is driven to the MAT pins if the match function is selected via IOCON. 0 = LOW. 1 = HIGH.

Parameters:

base – Ctimer peripheral base address
matchChannel – External match channel, user can obtain the status of multiple match channels at the same time by using the logic of “|” enumeration ctimer_external_match_t

Returns:

The mask of external match channel status flags. Users need to use the _ctimer_external_match type to decode the return variables.

void CTIMER_SetupCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, ctimer_capture_edge_t edge, bool enableInt)#

Setup the capture.

Parameters:

base – Ctimer peripheral base address
capture – Capture channel to configure
edge – Edge on the channel that will trigger a capture
enableInt – Flag to enable channel interrupts, if enabled then the registered call back is called upon capture

static inline uint32_t CTIMER_GetTimerCountValue(CTIMER_Type *base)#

Get the timer count value from TC register.

Parameters:

base – Ctimer peripheral base address.

Returns:

return the timer count value.

void CTIMER_RegisterCallBack(CTIMER_Type *base, ctimer_callback_t *cb_func, ctimer_callback_type_t cb_type)#

This function configures CTimer Callback in following modes:

Single Callback: cb_func should be pointer to callback function pointer For example: ctimer_callback_t ctimer_callback = pwm_match_callback; CTIMER_RegisterCallBack(CTIMER, &ctimer_callback, kCTIMER_SingleCallback);
Multiple Callback: cb_func should be pointer to array of callback function pointers Each element corresponds to Interrupt Flag in IR register. For example: ctimer_callback_t ctimer_callback_table[] = { ctimer_match0_callback, NULL, NULL, ctimer_match3_callback, NULL, NULL, NULL, NULL}; CTIMER_RegisterCallBack(CTIMER, &ctimer_callback_table[0], kCTIMER_MultipleCallback);

Parameters:

base – Ctimer peripheral base address
cb_func – Pointer to callback function pointer
cb_type – callback function type, singular or multiple

static inline void CTIMER_Reset(CTIMER_Type *base)#

Reset the counter.

The timer counter and prescale counter are reset on the next positive edge of the APB clock.

Parameters:

base – Ctimer peripheral base address

static inline void CTIMER_SetPrescale(CTIMER_Type *base, uint32_t prescale)#

Setup the timer prescale value.

Specifies the maximum value for the Prescale Counter.

Parameters:

base – Ctimer peripheral base address
prescale – Prescale value

static inline uint32_t CTIMER_GetCaptureValue(CTIMER_Type *base, ctimer_capture_channel_t capture)#

Get capture channel value.

Get the counter/timer value on the corresponding capture channel.

Parameters:

base – Ctimer peripheral base address
capture – Select capture channel

Returns:

The timer count capture value.

static inline void CTIMER_EnableResetMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)#

Enable reset match channel.

Set the specified match channel reset operation.

Parameters:

base – Ctimer peripheral base address
match – match channel used
enable – Enable match channel reset operation.

static inline void CTIMER_EnableStopMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)#

Enable stop match channel.

Set the specified match channel stop operation.

Parameters:

base – Ctimer peripheral base address.
match – match channel used.
enable – Enable match channel stop operation.

static inline void CTIMER_EnableMatchChannelReload(CTIMER_Type *base, ctimer_match_t match, bool enable)#

Enable reload channel falling edge.

Enable the specified match channel reload match shadow value.

Parameters:

base – Ctimer peripheral base address.
match – match channel used.
enable – Enable .

static inline void CTIMER_EnableRisingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)#

Enable capture channel rising edge.

Sets the specified capture channel for rising edge capture.

Parameters:

base – Ctimer peripheral base address.
capture – capture channel used.
enable – Enable rising edge capture.

static inline void CTIMER_EnableFallingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)#

Enable capture channel falling edge.

Sets the specified capture channel for falling edge capture.

Parameters:

base – Ctimer peripheral base address.
capture – capture channel used.
enable – Enable falling edge capture.

static inline void CTIMER_SetShadowValue(CTIMER_Type *base, ctimer_match_t match, uint32_t matchvalue)#

Set the specified match shadow channel.

Parameters:

base – Ctimer peripheral base address.
match – match channel used.
matchvalue – Reload the value of the corresponding match register.

struct _ctimer_match_config#

#include <fsl_ctimer.h>

Match configuration.

This structure holds the configuration settings for each match register.

Public Members

uint32_t matchValue#: This is stored in the match register

bool enableCounterReset#: true: Match will reset the counter false: Match will not reser the counter

bool enableCounterStop#: true: Match will stop the counter false: Match will not stop the counter

ctimer_match_output_control_t outControl#: Action to be taken on a match on the EM bit/output

bool outPinInitState#: Initial value of the EM bit/output

bool enableInterrupt#: true: Generate interrupt upon match false: Do not generate interrupt on match

struct _ctimer_config#

#include <fsl_ctimer.h>

Timer configuration structure.

The configuration structure can be made constant so as to reside in flash.

Public Members

ctimer_timer_mode_t mode#: Timer mode

ctimer_capture_channel_t input#: Input channel to increment the timer, used only in timer modes that rely on this input signal to increment TC

uint32_t prescale#: Prescale value

DMA: Direct Memory Access Controller Driver#

void DMA_Init(DMA_Type *base)#

Initializes DMA peripheral.

This function enable the DMA clock, set descriptor table and enable DMA peripheral.

Parameters:

base – DMA peripheral base address.

void DMA_Deinit(DMA_Type *base)#

Deinitializes DMA peripheral.

This function gates the DMA clock.

Parameters:

base – DMA peripheral base address.

void DMA_InstallDescriptorMemory(DMA_Type *base, void *addr)#

Install DMA descriptor memory.

This function used to register DMA descriptor memory for linked transfer, a typical case is ping pong transfer which will request more than one DMA descriptor memory space, althrough current DMA driver has a default DMA descriptor buffer, but it support one DMA descriptor for one channel only.

Parameters:

base – DMA base address.
addr – DMA descriptor address

static inline bool DMA_ChannelIsActive(DMA_Type *base, uint32_t channel)#

Return whether DMA channel is processing transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

True for active state, false otherwise.

static inline bool DMA_ChannelIsBusy(DMA_Type *base, uint32_t channel)#

Return whether DMA channel is busy.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

True for busy state, false otherwise.

static inline void DMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel)#

Enables the interrupt source for the DMA transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel)#

Disables the interrupt source for the DMA transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_EnableChannel(DMA_Type *base, uint32_t channel)#

Enable DMA channel.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DisableChannel(DMA_Type *base, uint32_t channel)#

Disable DMA channel.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_EnableChannelPeriphRq(DMA_Type *base, uint32_t channel)#

Set PERIPHREQEN of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DisableChannelPeriphRq(DMA_Type *base, uint32_t channel)#

Get PERIPHREQEN value of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

True for enabled PeriphRq, false for disabled.

void DMA_ConfigureChannelTrigger(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger)#

Set trigger settings of DMA channel.

Deprecated:: Do not use this function. It has been superceded by DMA_SetChannelConfig.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.
trigger – trigger configuration.

void DMA_SetChannelConfig(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger, bool isPeriph)#

set channel config.

This function provide a interface to configure channel configuration reisters.

Parameters:

base – DMA base address.
channel – DMA channel number.
trigger – channel configurations structure.
isPeriph – true is periph request, false is not.

static inline uint32_t DMA_SetChannelXferConfig(bool reload, bool clrTrig, bool intA, bool intB, uint8_t width, uint8_t srcInc, uint8_t dstInc, uint32_t bytes)#

DMA channel xfer transfer configurations.

Parameters:

reload – true is reload link descriptor after current exhaust, false is not
clrTrig – true is clear trigger status, wait software trigger, false is not
intA – enable interruptA
intB – enable interruptB
width – transfer width
srcInc – source address interleave size
dstInc – destination address interleave size
bytes – transfer bytes

Returns:

The vaule of xfer config

uint32_t DMA_GetRemainingBytes(DMA_Type *base, uint32_t channel)#

Gets the remaining bytes of the current DMA descriptor transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

The number of bytes which have not been transferred yet.

static inline void DMA_SetChannelPriority(DMA_Type *base, uint32_t channel, dma_priority_t priority)#

Set priority of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.
priority – Channel priority value.

static inline dma_priority_t DMA_GetChannelPriority(DMA_Type *base, uint32_t channel)#

Get priority of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

Channel priority value.

static inline void DMA_SetChannelConfigValid(DMA_Type *base, uint32_t channel)#

Set channel configuration valid.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DoChannelSoftwareTrigger(DMA_Type *base, uint32_t channel)#

Do software trigger for the channel.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_LoadChannelTransferConfig(DMA_Type *base, uint32_t channel, uint32_t xfer)#

Load channel transfer configurations.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.
xfer – transfer configurations.

void DMA_CreateDescriptor(dma_descriptor_t *desc, dma_xfercfg_t *xfercfg, void *srcAddr, void *dstAddr, void *nextDesc)#

Create application specific DMA descriptor to be used in a chain in transfer.

Deprecated:: Do not use this function. It has been superceded by DMA_SetupDescriptor.

Parameters:

desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcAddr – Address of last item to transmit
dstAddr – Address of last item to receive.
nextDesc – Address of next descriptor in chain.

void DMA_SetupDescriptor(dma_descriptor_t *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)#

setup dma descriptor

Note: This function do not support configure wrap descriptor.

Parameters:

desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcStartAddr – Start address of source address.
dstStartAddr – Start address of destination address.
nextDesc – Address of next descriptor in chain.

void DMA_SetupChannelDescriptor(dma_descriptor_t *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc, dma_burst_wrap_t wrapType, uint32_t burstSize)#

setup dma channel descriptor

Note: This function support configure wrap descriptor.

Parameters:

desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcStartAddr – Start address of source address.
dstStartAddr – Start address of destination address.
nextDesc – Address of next descriptor in chain.
wrapType – burst wrap type.
burstSize – burst size, reference _dma_burst_size.

void DMA_LoadChannelDescriptor(DMA_Type *base, uint32_t channel, dma_descriptor_t *descriptor)#

load channel transfer decriptor.

This function can be used to load desscriptor to driver internal channel descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:

for the polling transfer, application can allocate a local descriptor memory table to prepare a descriptor firstly and then call this api to load the configured descriptor to driver descriptor table.

DMA_Init(DMA0);
DMA_EnableChannel(DMA0, DEMO_DMA_CHANNEL);
DMA_SetupDescriptor(desc, xferCfg, s_srcBuffer, &s_destBuffer[0], NULL);
DMA_LoadChannelDescriptor(DMA0, DEMO_DMA_CHANNEL, (dma_descriptor_t *)desc);
DMA_DoChannelSoftwareTrigger(DMA0, DEMO_DMA_CHANNEL);
while(DMA_ChannelIsBusy(DMA0, DEMO_DMA_CHANNEL))
{}

Parameters:

base – DMA base address.
channel – DMA channel.
descriptor – configured DMA descriptor.

void DMA_AbortTransfer(dma_handle_t *handle)#

Abort running transfer by handle.

This function aborts DMA transfer specified by handle.

Parameters:

handle – DMA handle pointer.

void DMA_CreateHandle(dma_handle_t *handle, DMA_Type *base, uint32_t channel)#

Creates the DMA handle.

This function is called if using transaction API for DMA. This function initializes the internal state of DMA handle.

Parameters:

handle – DMA handle pointer. The DMA handle stores callback function and parameters.
base – DMA peripheral base address.
channel – DMA channel number.

void DMA_SetCallback(dma_handle_t *handle, dma_callback callback, void *userData)#

Installs a callback function for the DMA transfer.

This callback is called in DMA IRQ handler. Use the callback to do something after the current major loop transfer completes.

Parameters:

handle – DMA handle pointer.
callback – DMA callback function pointer.
userData – Parameter for callback function.

void DMA_PrepareTransfer(dma_transfer_config_t *config, void *srcAddr, void *dstAddr, uint32_t byteWidth, uint32_t transferBytes, dma_transfer_type_t type, void *nextDesc)#

Prepares the DMA transfer structure.

Deprecated:: Do not use this function. It has been superceded by DMA_PrepareChannelTransfer. This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, so the source address must be 4 bytes aligned, or it shall result in source address error(SAE).

Parameters:

config – The user configuration structure of type dma_transfer_t.
srcAddr – DMA transfer source address.
dstAddr – DMA transfer destination address.
byteWidth – DMA transfer destination address width(bytes).
transferBytes – DMA transfer bytes to be transferred.
type – DMA transfer type.
nextDesc – Chain custom descriptor to transfer.

void DMA_PrepareChannelTransfer(dma_channel_config_t *config, void *srcStartAddr, void *dstStartAddr, uint32_t xferCfg, dma_transfer_type_t type, dma_channel_trigger_t *trigger, void *nextDesc)#

Prepare channel transfer configurations.

This function used to prepare channel transfer configurations.

Parameters:

config – Pointer to DMA channel transfer configuration structure.
srcStartAddr – source start address.
dstStartAddr – destination start address.
xferCfg – xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value.
type – transfer type.
trigger – DMA channel trigger configurations.
nextDesc – address of next descriptor.

status_t DMA_SubmitTransfer(dma_handle_t *handle, dma_transfer_config_t *config)#

Submits the DMA transfer request.

Deprecated:: Do not use this function. It has been superceded by DMA_SubmitChannelTransfer.

This function submits the DMA transfer request according to the transfer configuration structure. If the user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time.

Parameters:

handle – DMA handle pointer.
config – Pointer to DMA transfer configuration structure.

Return values:

kStatus_DMA_Success – It means submit transfer request succeed.
kStatus_DMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_DMA_Busy – It means the given channel is busy, need to submit request later.

void DMA_SubmitChannelTransferParameter(dma_handle_t *handle, uint32_t xferCfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)#

Submit channel transfer paramter directly.

This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:

for the single transfer, application doesn’t need to allocate descriptor table, the head descriptor can be used for it.

   DMA_SetChannelConfig(base, channel, trigger, isPeriph);
   DMA_CreateHandle(handle, base, channel)
   DMA_SubmitChannelTransferParameter(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc,
bytes), srcStartAddr, dstStartAddr, NULL);
   DMA_StartTransfer(handle)

for the linked transfer, application should responsible for link descriptor, for example, if 4 transfer is required, then application should prepare three descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[3]);

   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc2);
   DMA_SetupDescriptor(nextDesc2,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, NULL);
   DMA_SetChannelConfig(base, channel, trigger, isPeriph);
   DMA_CreateHandle(handle, base, channel)
   DMA_SubmitChannelTransferParameter(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc,
bytes), srcStartAddr, dstStartAddr, nextDesc0);
   DMA_StartTransfer(handle);

Parameters:

handle – Pointer to DMA handle.
xferCfg – xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value.
srcStartAddr – source start address.
dstStartAddr – destination start address.
nextDesc – address of next descriptor.

void DMA_SubmitChannelDescriptor(dma_handle_t *handle, dma_descriptor_t *descriptor)#

Submit channel descriptor.

This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, this functiono is typical for the ping pong case:

for the ping pong case, application should responsible for the descriptor, for example, application should prepare two descriptor table with macro.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[2]);

   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc0);
   DMA_SetChannelConfig(base, channel, trigger, isPeriph);
   DMA_CreateHandle(handle, base, channel)
   DMA_SubmitChannelDescriptor(handle,  nextDesc0);
   DMA_StartTransfer(handle);

Parameters:

handle – Pointer to DMA handle.
descriptor – descriptor to submit.

status_t DMA_SubmitChannelTransfer(dma_handle_t *handle, dma_channel_config_t *config)#

Submits the DMA channel transfer request.

for the single transfer, application doesn’t need to allocate descriptor table, the head descriptor can be used for it.

DMA_CreateHandle(handle, base, channel)
DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,NULL);
DMA_SubmitChannelTransfer(handle, config)
DMA_StartTransfer(handle)

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc);
   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc2);
   DMA_SetupDescriptor(nextDesc2,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, NULL);
   DMA_CreateHandle(handle, base, channel)
   DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0);
   DMA_SubmitChannelTransfer(handle, config)
   DMA_StartTransfer(handle)

for the ping pong case, application should responsible for link descriptor, for example, application should prepare two descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc);

   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc0);
   DMA_CreateHandle(handle, base, channel)
   DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0);
   DMA_SubmitChannelTransfer(handle, config)
   DMA_StartTransfer(handle)

Parameters:

handle – DMA handle pointer.
config – Pointer to DMA transfer configuration structure.

Return values:

kStatus_DMA_Success – It means submit transfer request succeed.
kStatus_DMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_DMA_Busy – It means the given channel is busy, need to submit request later.

void DMA_StartTransfer(dma_handle_t *handle)#

DMA start transfer.

This function enables the channel request. User can call this function after submitting the transfer request It will trigger transfer start with software trigger only when hardware trigger is not used.

Parameters:

handle – DMA handle pointer.

void DMA_IRQHandle(DMA_Type *base)#

DMA IRQ handler for descriptor transfer complete.

This function clears the channel major interrupt flag and call the callback function if it is not NULL.

Parameters:

base – DMA base address.

void DMA_DriverIRQHandler(uint32_t instance)#

DMA common IRQ handler entry for parameterized dispatch.

Parameters:

instance – DMA peripheral instance number.

FSL_DMA_DRIVER_VERSION#

DMA driver version.

Version 2.5.5.

_dma_transfer_status DMA transfer status

Values:

enumerator kStatus_DMA_Busy#: Channel is busy and can’t handle the transfer request.

_dma_addr_interleave_size dma address interleave size

Values:

enumerator kDMA_AddressInterleave0xWidth#: dma source/destination address no interleave

enumerator kDMA_AddressInterleave1xWidth#: dma source/destination address interleave 1xwidth

enumerator kDMA_AddressInterleave2xWidth#: dma source/destination address interleave 2xwidth

enumerator kDMA_AddressInterleave4xWidth#: dma source/destination address interleave 3xwidth

_dma_transfer_width dma transfer width

Values:

enumerator kDMA_Transfer8BitWidth#: dma channel transfer bit width is 8 bit

enumerator kDMA_Transfer16BitWidth#: dma channel transfer bit width is 16 bit

enumerator kDMA_Transfer32BitWidth#: dma channel transfer bit width is 32 bit

enum _dma_priority#

DMA channel priority.

Values:

enumerator kDMA_ChannelPriority0#: Highest channel priority - priority 0

enumerator kDMA_ChannelPriority1#: Channel priority 1

enumerator kDMA_ChannelPriority2#: Channel priority 2

enumerator kDMA_ChannelPriority3#: Channel priority 3

enumerator kDMA_ChannelPriority4#: Channel priority 4

enumerator kDMA_ChannelPriority5#: Channel priority 5

enumerator kDMA_ChannelPriority6#: Channel priority 6

enumerator kDMA_ChannelPriority7#: Lowest channel priority - priority 7

enum _dma_int#

DMA interrupt flags.

Values:

enumerator kDMA_IntA#: DMA interrupt flag A

enumerator kDMA_IntB#: DMA interrupt flag B

enumerator kDMA_IntError#: DMA interrupt flag error

enum _dma_trigger_type#

DMA trigger type.

Values:

enumerator kDMA_NoTrigger#: Trigger is disabled

enumerator kDMA_LowLevelTrigger#: Low level active trigger

enumerator kDMA_HighLevelTrigger#: High level active trigger

enumerator kDMA_FallingEdgeTrigger#: Falling edge active trigger

enumerator kDMA_RisingEdgeTrigger#: Rising edge active trigger

_dma_burst_size DMA burst size

Values:

enumerator kDMA_BurstSize1#: burst size 1 transfer

enumerator kDMA_BurstSize2#: burst size 2 transfer

enumerator kDMA_BurstSize4#: burst size 4 transfer

enumerator kDMA_BurstSize8#: burst size 8 transfer

enumerator kDMA_BurstSize16#: burst size 16 transfer

enumerator kDMA_BurstSize32#: burst size 32 transfer

enumerator kDMA_BurstSize64#: burst size 64 transfer

enumerator kDMA_BurstSize128#: burst size 128 transfer

enumerator kDMA_BurstSize256#: burst size 256 transfer

enumerator kDMA_BurstSize512#: burst size 512 transfer

enumerator kDMA_BurstSize1024#: burst size 1024 transfer

enum _dma_trigger_burst#

DMA trigger burst.

Values:

enumerator kDMA_SingleTransfer#: Single transfer

enumerator kDMA_LevelBurstTransfer#: Burst transfer driven by level trigger

enumerator kDMA_EdgeBurstTransfer1#: Perform 1 transfer by edge trigger

enumerator kDMA_EdgeBurstTransfer2#: Perform 2 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer4#: Perform 4 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer8#: Perform 8 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer16#: Perform 16 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer32#: Perform 32 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer64#: Perform 64 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer128#: Perform 128 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer256#: Perform 256 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer512#: Perform 512 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer1024#: Perform 1024 transfers by edge trigger

enum _dma_burst_wrap#

DMA burst wrapping.

Values:

enumerator kDMA_NoWrap#: Wrapping is disabled

enumerator kDMA_SrcWrap#: Wrapping is enabled for source

enumerator kDMA_DstWrap#: Wrapping is enabled for destination

enumerator kDMA_SrcAndDstWrap#: Wrapping is enabled for source and destination

enum _dma_transfer_type#

DMA transfer type.

Values:

enumerator kDMA_MemoryToMemory#: Transfer from memory to memory (increment source and destination)

enumerator kDMA_PeripheralToMemory#: Transfer from peripheral to memory (increment only destination)

enumerator kDMA_MemoryToPeripheral#: Transfer from memory to peripheral (increment only source)

enumerator kDMA_StaticToStatic#: Peripheral to static memory (do not increment source or destination)

typedef struct _dma_descriptor dma_descriptor_t#: DMA descriptor structure.

typedef struct _dma_xfercfg dma_xfercfg_t#: DMA transfer configuration.

typedef enum _dma_priority dma_priority_t#: DMA channel priority.

typedef enum _dma_int dma_irq_t#: DMA interrupt flags.

typedef enum _dma_trigger_type dma_trigger_type_t#: DMA trigger type.

typedef enum _dma_trigger_burst dma_trigger_burst_t#: DMA trigger burst.

typedef enum _dma_burst_wrap dma_burst_wrap_t#: DMA burst wrapping.

typedef enum _dma_transfer_type dma_transfer_type_t#: DMA transfer type.

typedef struct _dma_channel_trigger dma_channel_trigger_t#: DMA channel trigger.

typedef struct _dma_channel_config dma_channel_config_t#: DMA channel trigger.

typedef struct _dma_transfer_config dma_transfer_config_t#: DMA transfer configuration.

typedef void (*dma_callback)(struct _dma_handle *handle, void *userData, bool transferDone, uint32_t intmode)#: Define Callback function for DMA.

typedef struct _dma_handle dma_handle_t#: DMA transfer handle structure.

DMA_MAX_TRANSFER_COUNT#: DMA max transfer size.

FSL_FEATURE_DMA_NUMBER_OF_CHANNELSn(x)#: DMA channel numbers.

FSL_FEATURE_DMA_MAX_CHANNELS#

FSL_FEATURE_DMA_ALL_CHANNELS#

FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE#: DMA head link descriptor table align size.

DMA_ALLOCATE_HEAD_DESCRIPTORS(name, number)#

DMA head descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_HEAD_DESCRIPTORS_AT_NONCACHEABLE(name, number)#

DMA head descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_LINK_DESCRIPTORS(name, number)#

DMA link descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_LINK_DESCRIPTORS_AT_NONCACHEABLE(name, number)#

DMA link descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_DATA_TRANSFER_BUFFER(name, width)#: DMA transfer buffer address need to align with the transfer width.

DMA_CHANNEL_GROUP(channel)#

DMA_CHANNEL_INDEX(base, channel)#

DMA_COMMON_REG_GET(base, channel, reg)#: DMA linked descriptor address algin size.

DMA_COMMON_CONST_REG_GET(base, channel, reg)#

DMA_COMMON_REG_SET(base, channel, reg, value)#

DMA_DESCRIPTOR_END_ADDRESS(start, inc, bytes, width)#

DMA descriptor end address calculate.

Parameters:

start – start address
inc – address interleave size
bytes – transfer bytes
width – transfer width

DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes)#

struct _dma_descriptor#

#include <fsl_dma.h>

DMA descriptor structure.

Public Members

volatile uint32_t xfercfg#: Transfer configuration

void *srcEndAddr#: Last source address of DMA transfer

void *dstEndAddr#: Last destination address of DMA transfer

void *linkToNextDesc#: Address of next DMA descriptor in chain

struct _dma_xfercfg#

#include <fsl_dma.h>

DMA transfer configuration.

Public Members

bool valid#: Descriptor is ready to transfer

bool reload#: Reload channel configuration register after current descriptor is exhausted

bool swtrig#: Perform software trigger. Transfer if fired when ‘valid’ is set

bool clrtrig#: Clear trigger

bool intA#: Raises IRQ when transfer is done and set IRQA status register flag

bool intB#: Raises IRQ when transfer is done and set IRQB status register flag

uint8_t byteWidth#: Byte width of data to transfer

uint8_t srcInc#: Increment source address by ‘srcInc’ x ‘byteWidth’

uint8_t dstInc#: Increment destination address by ‘dstInc’ x ‘byteWidth’

uint16_t transferCount#: Number of transfers

struct _dma_channel_trigger#

#include <fsl_dma.h>

DMA channel trigger.

Public Members

dma_trigger_type_t type#: Select hardware trigger as edge triggered or level triggered.

dma_trigger_burst_t burst#: Select whether hardware triggers cause a single or burst transfer.

dma_burst_wrap_t wrap#: Select wrap type, source wrap or dest wrap, or both.

struct _dma_channel_config#

#include <fsl_dma.h>

DMA channel trigger.

Public Members

void *srcStartAddr#: Source data address

void *dstStartAddr#: Destination data address

void *nextDesc#: Chain custom descriptor

uint32_t xferCfg#: channel transfer configurations

dma_channel_trigger_t *trigger#: DMA trigger type

bool isPeriph#: select the request type

struct _dma_transfer_config#

#include <fsl_dma.h>

DMA transfer configuration.

Public Members

uint8_t *srcAddr#: Source data address

uint8_t *dstAddr#: Destination data address

uint8_t *nextDesc#: Chain custom descriptor

dma_xfercfg_t xfercfg#: Transfer options

bool isPeriph#: DMA transfer is driven by peripheral

struct _dma_handle#

#include <fsl_dma.h>

DMA transfer handle structure.

Public Members

dma_callback callback#: Callback function. Invoked when transfer of descriptor with interrupt flag finishes

void *userData#: Callback function parameter

DMA_Type *base#: DMA peripheral base address

uint8_t channel#: DMA channel number

FLEXCOMM: FLEXCOMM Driver#

FLEXCOMM Driver#

FSL_FLEXCOMM_DRIVER_VERSION#: FlexCOMM driver version 2.0.3.

enum FLEXCOMM_PERIPH_T#

FLEXCOMM peripheral modes.

Values:

enumerator FLEXCOMM_PERIPH_NONE#: No peripheral

enumerator FLEXCOMM_PERIPH_USART#: USART peripheral

enumerator FLEXCOMM_PERIPH_SPI#: SPI Peripheral

enumerator FLEXCOMM_PERIPH_I2C#: I2C Peripheral

enumerator FLEXCOMM_PERIPH_I2S_TX#: I2S TX Peripheral

enumerator FLEXCOMM_PERIPH_I2S_RX#: I2S RX Peripheral

typedef void (*flexcomm_irq_handler_t)(void *base, void *handle)#: Typedef for interrupt handler.

IRQn_Type const kFlexcommIrqs[]#: Array with IRQ number for each FLEXCOMM module.

uint32_t FLEXCOMM_GetInstance(void *base)#: Returns instance number for FLEXCOMM module with given base address.

status_t FLEXCOMM_Init(void *base, FLEXCOMM_PERIPH_T periph)#: Initializes FLEXCOMM and selects peripheral mode according to the second parameter.

void FLEXCOMM_SetIRQHandler(void *base, flexcomm_irq_handler_t handler, void *flexcommHandle)#: Sets IRQ handler for given FLEXCOMM module. It is used by drivers register IRQ handler according to FLEXCOMM mode.

void FLEXCOMM_DriverIRQHandler(uint32_t instance)#: Common IRQ handler for all FLEXCOMM instances.

GINT: Group GPIO Input Interrupt Driver#

FSL_GINT_DRIVER_VERSION#: Driver version.

enum _gint_comb#

GINT combine inputs type.

Values:

enumerator kGINT_CombineOr#: A grouped interrupt is generated when any one of the enabled inputs is active

enumerator kGINT_CombineAnd#: A grouped interrupt is generated when all enabled inputs are active

enum _gint_trig#

GINT trigger type.

Values:

enumerator kGINT_TrigEdge#: Edge triggered based on polarity

enumerator kGINT_TrigLevel#: Level triggered based on polarity

enum _gint_port#

Values:

enumerator kGINT_Port0#

enumerator kGINT_Port1#

typedef enum _gint_comb gint_comb_t#: GINT combine inputs type.

typedef enum _gint_trig gint_trig_t#: GINT trigger type.

typedef enum _gint_port gint_port_t#

typedef void (*gint_cb_t)(void)#: GINT Callback function.

void GINT_Init(GINT_Type *base)#

Initialize GINT peripheral.

This function initializes the GINT peripheral and enables the clock.

Parameters:

base – Base address of the GINT peripheral.

Return values:

None. –

void GINT_SetCtrl(GINT_Type *base, gint_comb_t comb, gint_trig_t trig, gint_cb_t callback)#

Setup GINT peripheral control parameters.

This function sets the control parameters of GINT peripheral.

Parameters:

base – Base address of the GINT peripheral.
comb – Controls if the enabled inputs are logically ORed or ANDed for interrupt generation.
trig – Controls if the enabled inputs are level or edge sensitive based on polarity.
callback – This function is called when configured group interrupt is generated.

Return values:

None. –

void GINT_GetCtrl(GINT_Type *base, gint_comb_t *comb, gint_trig_t *trig, gint_cb_t *callback)#

Get GINT peripheral control parameters.

This function returns the control parameters of GINT peripheral.

Parameters:

base – Base address of the GINT peripheral.
comb – Pointer to store combine input value.
trig – Pointer to store trigger value.
callback – Pointer to store callback function.

Return values:

None. –

void GINT_ConfigPins(GINT_Type *base, gint_port_t port, uint32_t polarityMask, uint32_t enableMask)#

Configure GINT peripheral pins.

This function enables and controls the polarity of enabled pin(s) of a given port.

Parameters:

base – Base address of the GINT peripheral.
port – Port number.
polarityMask – Each bit position selects the polarity of the corresponding enabled pin. 0 = The pin is active LOW. 1 = The pin is active HIGH.
enableMask – Each bit position selects if the corresponding pin is enabled or not. 0 = The pin is disabled. 1 = The pin is enabled.

Return values:

None. –

void GINT_GetConfigPins(GINT_Type *base, gint_port_t port, uint32_t *polarityMask, uint32_t *enableMask)#

Get GINT peripheral pin configuration.

This function returns the pin configuration of a given port.

Parameters:

base – Base address of the GINT peripheral.
port – Port number.
polarityMask – Pointer to store the polarity mask Each bit position indicates the polarity of the corresponding enabled pin. 0 = The pin is active LOW. 1 = The pin is active HIGH.
enableMask – Pointer to store the enable mask. Each bit position indicates if the corresponding pin is enabled or not. 0 = The pin is disabled. 1 = The pin is enabled.

Return values:

None. –

void GINT_EnableCallback(GINT_Type *base)#

Enable callback.

This function enables the interrupt for the selected GINT peripheral. Although the pin(s) are monitored as soon as they are enabled, the callback function is not enabled until this function is called.

Parameters:

base – Base address of the GINT peripheral.

Return values:

None. –

void GINT_DisableCallback(GINT_Type *base)#

Disable callback.

This function disables the interrupt for the selected GINT peripheral. Although the pins are still being monitored but the callback function is not called.

Parameters:

base – Base address of the peripheral.

Return values:

None. –

static inline void GINT_ClrStatus(GINT_Type *base)#

Clear GINT status.

This function clears the GINT status bit.

Parameters:

base – Base address of the GINT peripheral.

Return values:

None. –

static inline uint32_t GINT_GetStatus(GINT_Type *base)#

Get GINT status.

This function returns the GINT status.

Parameters:

base – Base address of the GINT peripheral.

Return values:

status – = 0 No group interrupt request. = 1 Group interrupt request active.

void GINT_Deinit(GINT_Type *base)#

Deinitialize GINT peripheral.

This function disables the GINT clock.

Parameters:

base – Base address of the GINT peripheral.

Return values:

None. –

void GINT_DriverIRQHandler(uint32_t instance)#: Common IRQ handler for all GINT instances.

Hashcrypt: The Cryptographic Accelerator#

Hashcrypt Background HASH#

void HASHCRYPT_SHA_SetCallback(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, hashcrypt_callback_t callback, void *userData)#

Initializes the HASHCRYPT handle for background hashing.

This function initializes the hash context for background hashing (Non-blocking) APIs. This is less typical interface to hash function, but can be used for parallel processing, when main CPU has something else to do. Example is digital signature RSASSA-PKCS1-V1_5-VERIFY((n,e),M,S) algorithm, where background hashing of M can be started, then CPU can compute S^e mod n (in parallel with background hashing) and once the digest becomes available, CPU can proceed to comparison of EM with EM’.

Parameters:

base – HASHCRYPT peripheral base address.
ctx – [out] Hash context.
callback – Callback function.
userData – User data (to be passed as an argument to callback function, once callback is invoked from isr).

status_t HASHCRYPT_SHA_UpdateNonBlocking(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, const uint8_t *input, size_t inputSize)#

Create running hash on given data.

Configures the HASHCRYPT to compute new running hash as AHB master and returns immediately. HASHCRYPT AHB Master mode supports only aligned input address and can be called only once per continuous block of data. Every call to this function must be preceded with HASHCRYPT_SHA_Init() and finished with HASHCRYPT_SHA_Finish(). Once callback function is invoked by HASHCRYPT isr, it should set a flag for the main application to finalize the hashing (padding) and to read out the final digest by calling HASHCRYPT_SHA_Finish().

Parameters:

base – HASHCRYPT peripheral base address
ctx – Specifies callback. Last incomplete 512-bit block of the input is copied into clear buffer for padding.
input – 32-bit word aligned pointer to Input data.
inputSize – Size of input data in bytes (must be word aligned)

Returns:

Status of the hash update operation.

Hashcrypt common functions#

FSL_HASHCRYPT_DRIVER_VERSION#

HASHCRYPT driver version. Version 2.2.18.

Current version: 2.2.18

Change log:

Version 2.0.0
- Initial version
Version 2.0.1
- Support loading AES key from unaligned address
Version 2.0.2
- Support loading AES key from unaligned address for different compiler and core variants
Version 2.0.3
- Remove SHA512 and AES ICB algorithm definitions
Version 2.0.4
- Add SHA context switch support
Version 2.1.0
- Update the register name and macro to align with new header.
Version 2.1.1
- Fix MISRA C-2012.
Version 2.1.2
- Support loading AES input data from unaligned address.
Version 2.1.3
- Fix MISRA C-2012.
Version 2.1.4
- Fix context switch cannot work when switching from AES.
Version 2.1.5
- Add data synchronization barrier inside hashcrypt_sha_ldm_stm_16_words() to prevent possible optimization issue.
Version 2.2.0
- Add AES-OFB and AES-CFB mixed IP/SW modes.
Version 2.2.1
- Add data synchronization barrier inside hashcrypt_sha_ldm_stm_16_words() prevent compiler from reordering memory write when -O2 or higher is used.
Version 2.2.2
- Add data synchronization barrier inside hashcrypt_sha_ldm_stm_16_words() to fix optimization issue
Version 2.2.3
- Added check for size in hashcrypt_aes_one_block to prevent overflowing COUNT field in MEMCTRL register, if its bigger than COUNT field do a multiple runs.
Version 2.2.4
- In all HASHCRYPT_AES_xx functions have been added setting CTRL_MODE bitfield to 0 after processing data, which decreases power consumption.
Version 2.2.5
- Add data synchronization barrier and instruction synchronization barrier inside hashcrypt_sha_process_message_data() to fix optimization issue
Version 2.2.6
- Add data synchronization barrier inside HASHCRYPT_SHA_Update() and hashcrypt_get_data() function to fix optimization issue on MDK and ARMGCC release targets
Version 2.2.7
- Add data synchronization barrier inside HASHCRYPT_SHA_Update() to fix optimization issue on MCUX IDE release target
Version 2.2.8
- Unify hashcrypt hashing behavior between aligned and unaligned input data
Version 2.2.9
- Add handling of set ERROR bit in the STATUS register
Version 2.2.10
- Fix missing error statement in hashcrypt_save_running_hash()
Version 2.2.11
- Fix incorrect SHA-256 calculation for long messages with reload
Version 2.2.12
- Fix hardfault issue on the Keil compiler due to unaligned memcpy() input on some optimization levels
Version 2.2.13
- Added function hashcrypt_seed_prng() which loading random number into PRNG_SEED register before AES operation for SCA protection
Version 2.2.14
- Modify function hashcrypt_get_data() to prevent issue with unaligned access
Version 2.2.15
- Add wait on DIGEST BIT inside hashcrypt_sha_one_block() to fix issues with some optimization flags
Version 2.2.16
- Add DSB instruction inside hashcrypt_sha_ldm_stm_16_words() to fix issues with some optimization flags
Version 2.2.17
- Fix context size when hashcrypt built with reload feature
Version 2.2.18
- Rename internal BUILD_ASSERT macro to HASHCRYPT_BUILD_ASSERT to avoid conflicts with environment-specific implementations.

enum _hashcrypt_algo_t#

Algorithm used for Hashcrypt operation.

Values:

enumerator kHASHCRYPT_Sha1#: SHA_1

enumerator kHASHCRYPT_Sha256#: SHA_256

enumerator kHASHCRYPT_Aes#: AES

typedef enum _hashcrypt_algo_t hashcrypt_algo_t#: Algorithm used for Hashcrypt operation.

void HASHCRYPT_Init(HASHCRYPT_Type *base)#

Enables clock and disables reset for HASHCRYPT peripheral.

Enable clock and disable reset for HASHCRYPT.

Parameters:

base – HASHCRYPT base address

void HASHCRYPT_Deinit(HASHCRYPT_Type *base)#

Disables clock for HASHCRYPT peripheral.

Disable clock and enable reset.

Parameters:

base – HASHCRYPT base address

HASHCRYPT_MODE_SHA1#: Algorithm definitions correspond with the values for Mode field in Control register !

HASHCRYPT_MODE_SHA256#

HASHCRYPT_MODE_AES#

Hashcrypt AES#

enum _hashcrypt_aes_mode_t#

AES mode.

Values:

enumerator kHASHCRYPT_AesEcb#: AES ECB mode

enumerator kHASHCRYPT_AesCbc#: AES CBC mode

enumerator kHASHCRYPT_AesCtr#: AES CTR mode

enum _hashcrypt_aes_keysize_t#

Size of AES key.

Values:

enumerator kHASHCRYPT_Aes128#: AES 128 bit key

enumerator kHASHCRYPT_Aes192#: AES 192 bit key

enumerator kHASHCRYPT_Aes256#: AES 256 bit key

enumerator kHASHCRYPT_InvalidKey#: AES invalid key

enum _hashcrypt_key#

HASHCRYPT key source selection.

Values:

enumerator kHASHCRYPT_UserKey#: HASHCRYPT user key

enumerator kHASHCRYPT_SecretKey#: HASHCRYPT secret key (dedicated hw bus from PUF)

typedef enum _hashcrypt_aes_mode_t hashcrypt_aes_mode_t#: AES mode.

typedef enum _hashcrypt_aes_keysize_t hashcrypt_aes_keysize_t#: Size of AES key.

typedef enum _hashcrypt_key hashcrypt_key_t#: HASHCRYPT key source selection.

typedef struct _hashcrypt_handle hashcrypt_handle_t#

struct _hashcrypt_handle __attribute__ ((aligned))

status_t HASHCRYPT_AES_SetKey(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *key, size_t keySize)#

Set AES key to hashcrypt_handle_t struct and optionally to HASHCRYPT.

Sets the AES key for encryption/decryption with the hashcrypt_handle_t structure. The hashcrypt_handle_t input argument specifies key source.

Parameters:

base – HASHCRYPT peripheral base address.
handle – Handle used for the request.
key – 0-mod-4 aligned pointer to AES key.
keySize – AES key size in bytes. Shall equal 16, 24 or 32.

Returns:

status from set key operation

status_t HASHCRYPT_AES_EncryptEcb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *plaintext, uint8_t *ciphertext, size_t size)#

Encrypts AES on one or multiple 128-bit block(s).

Encrypts AES. The source plaintext and destination ciphertext can overlap in system memory.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_DecryptEcb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *ciphertext, uint8_t *plaintext, size_t size)#

Decrypts AES on one or multiple 128-bit block(s).

Decrypts AES. The source ciphertext and destination plaintext can overlap in system memory.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
ciphertext – Input plain text to encrypt
plaintext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.

Returns:

Status from decrypt operation

status_t HASHCRYPT_AES_EncryptCbc(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *plaintext, uint8_t *ciphertext, size_t size, const uint8_t iv[16])#

Encrypts AES using CBC block mode.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input initial vector to combine with the first input block.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_DecryptCbc(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *ciphertext, uint8_t *plaintext, size_t size, const uint8_t iv[16])#

Decrypts AES using CBC block mode.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
ciphertext – Input cipher text to decrypt
plaintext – [out] Output plain text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input initial vector to combine with the first input block.

Returns:

Status from decrypt operation

status_t HASHCRYPT_AES_CryptCtr(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *input, uint8_t *output, size_t size, uint8_t counter[16U], uint8_t counterlast[16U], size_t *szLeft)#

Encrypts or decrypts AES using CTR block mode.

Encrypts or decrypts AES using CTR block mode. AES CTR mode uses only forward AES cipher and same algorithm for encryption and decryption. The only difference between encryption and decryption is that, for encryption, the input argument is plain text and the output argument is cipher text. For decryption, the input argument is cipher text and the output argument is plain text.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
input – Input data for CTR block mode
output – [out] Output data for CTR block mode
size – Size of input and output data in bytes
counter – [inout] Input counter (updates on return)
counterlast – [out] Output cipher of last counter, for chained CTR calls (statefull encryption). NULL can be passed if chained calls are not used.
szLeft – [out] Output number of bytes in left unused in counterlast block. NULL can be passed if chained calls are not used.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_CryptOfb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *input, uint8_t *output, size_t size, const uint8_t iv[16U])#

Encrypts or decrypts AES using OFB block mode.

Encrypts or decrypts AES using OFB block mode. AES OFB mode uses only forward AES cipher and same algorithm for encryption and decryption. The only difference between encryption and decryption is that, for encryption, the input argument is plain text and the output argument is cipher text. For decryption, the input argument is cipher text and the output argument is plain text.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
input – Input data for OFB block mode
output – [out] Output data for OFB block mode
size – Size of input and output data in bytes
iv – Input initial vector to combine with the first input block.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_EncryptCfb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *plaintext, uint8_t *ciphertext, size_t size, const uint8_t iv[16])#

Encrypts AES using CFB block mode.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
plaintext – Input plain text to encrypt
ciphertext – [out] Output cipher text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input initial vector to combine with the first input block.

Returns:

Status from encrypt operation

status_t HASHCRYPT_AES_DecryptCfb(HASHCRYPT_Type *base, hashcrypt_handle_t *handle, const uint8_t *ciphertext, uint8_t *plaintext, size_t size, const uint8_t iv[16])#

Decrypts AES using CFB block mode.

Parameters:

base – HASHCRYPT peripheral base address
handle – Handle used for this request.
ciphertext – Input cipher text to decrypt
plaintext – [out] Output plaintext text
size – Size of input and output data in bytes. Must be multiple of 16 bytes.
iv – Input initial vector to combine with the first input block.

Returns:

Status from encrypt operation

HASHCRYPT_AES_BLOCK_SIZE#: AES block size in bytes

AES_ENCRYPT#

AES_DECRYPT#

struct _hashcrypt_handle#

#include <fsl_hashcrypt.h>

Specify HASHCRYPT’s key resource.

Public Members

uint32_t keyWord[8]#: Copy of user key (set by HASHCRYPT_AES_SetKey().

hashcrypt_key_t keyType#: For operations with key (such as AES encryption/decryption), specify key type.

Hashcrypt HASH#

typedef struct _hashcrypt_hash_ctx_t hashcrypt_hash_ctx_t#: Storage type used to save hash context.

typedef void (*hashcrypt_callback_t)(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, status_t status, void *userData)#: HASHCRYPT background hash callback function.

status_t HASHCRYPT_SHA(HASHCRYPT_Type *base, hashcrypt_algo_t algo, const uint8_t *input, size_t inputSize, uint8_t *output, size_t *outputSize)#

Create HASH on given data.

Perform the full SHA in one function call. The function is blocking.

Parameters:

base – HASHCRYPT peripheral base address
algo – Underlaying algorithm to use for hash computation.
input – Input data
inputSize – Size of input data in bytes
output – [out] Output hash data
outputSize – [out] Output parameter storing the size of the output hash in bytes

Returns:

Status of the one call hash operation.

status_t HASHCRYPT_SHA_Init(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, hashcrypt_algo_t algo)#

Initialize HASH context.

This function initializes the HASH.

Parameters:

base – HASHCRYPT peripheral base address
ctx – [out] Output hash context
algo – Underlaying algorithm to use for hash computation.

Returns:

Status of initialization

status_t HASHCRYPT_SHA_Update(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, const uint8_t *input, size_t inputSize)#

Add data to current HASH.

Add data to current HASH. This can be called repeatedly with an arbitrary amount of data to be hashed. The functions blocks. If it returns kStatus_Success, the running hash has been updated (HASHCRYPT has processed the input data), so the memory at input pointer can be released back to system. The HASHCRYPT context buffer is updated with the running hash and with all necessary information to support possible context switch.

Parameters:

base – HASHCRYPT peripheral base address
ctx – [inout] HASH context
input – Input data
inputSize – Size of input data in bytes

Returns:

Status of the hash update operation

status_t HASHCRYPT_SHA_Finish(HASHCRYPT_Type *base, hashcrypt_hash_ctx_t *ctx, uint8_t *output, size_t *outputSize)#

Finalize hashing.

Outputs the final hash (computed by HASHCRYPT_HASH_Update()) and erases the context.

Parameters:

base – HASHCRYPT peripheral base address
ctx – [inout] Input hash context
output – [out] Output hash data
outputSize – [inout] Optional parameter (can be passed as NULL). On function entry, it specifies the size of output[] buffer. On function return, it stores the number of updated output bytes.

Returns:

Status of the hash finish operation

HASHCRYPT_HASH_CTX_SIZE#: HASHCRYPT HASH Context size.

struct _hashcrypt_hash_ctx_t#

#include <fsl_hashcrypt.h>

Storage type used to save hash context.

Public Members

uint32_t x[31]#: storage

I2C: Inter-Integrated Circuit Driver#

I2C DMA Driver#

void I2C_MasterTransferCreateHandleDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, i2c_master_dma_transfer_callback_t callback, void *userData, dma_handle_t *dmaHandle)#

Init the I2C handle which is used in transactional functions.

Parameters:

base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
callback – pointer to user callback function
userData – user param passed to the callback function
dmaHandle – DMA handle pointer

status_t I2C_MasterTransferDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, i2c_master_transfer_t *xfer)#

Performs a master dma non-blocking transfer on the I2C bus.

Parameters:

base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
xfer – pointer to transfer structure of i2c_master_transfer_t

Return values:

kStatus_Success – Sucessully complete the data transmission.
kStatus_I2C_Busy – Previous transmission still not finished.
kStatus_I2C_Timeout – Transfer error, wait signal timeout.
kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.
kStataus_I2C_Nak – Transfer error, receive Nak during transfer.

status_t I2C_MasterTransferGetCountDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, size_t *count)#

Get master transfer status during a dma non-blocking transfer.

Parameters:

base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
count – Number of bytes transferred so far by the non-blocking transaction.

void I2C_MasterTransferAbortDMA(I2C_Type *base, i2c_master_dma_handle_t *handle)#

Abort a master dma non-blocking transfer in a early time.

Parameters:

base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure

FSL_I2C_DMA_DRIVER_VERSION#: I2C DMA driver version.

typedef struct _i2c_master_dma_handle i2c_master_dma_handle_t#: I2C master dma handle typedef.

typedef void (*i2c_master_dma_transfer_callback_t)(I2C_Type *base, i2c_master_dma_handle_t *handle, status_t status, void *userData)#: I2C master dma transfer callback typedef.

typedef void (*flexcomm_i2c_dma_master_irq_handler_t)(I2C_Type *base, i2c_master_dma_handle_t *handle)#: Typedef for master dma handler.

I2C_MAX_DMA_TRANSFER_COUNT#: Maximum lenght of single DMA transfer (determined by capability of the DMA engine)

struct _i2c_master_dma_handle#

#include <fsl_i2c_dma.h>

I2C master dma transfer structure.

Public Members

uint8_t state#: Transfer state machine current state.

uint32_t transferCount#: Indicates progress of the transfer

uint32_t remainingBytesDMA#: Remaining byte count to be transferred using DMA.

uint8_t *buf#: Buffer pointer for current state.

bool checkAddrNack#: Whether to check the nack signal is detected during addressing.

dma_handle_t *dmaHandle#: The DMA handler used.

i2c_master_transfer_t transfer#: Copy of the current transfer info.

i2c_master_dma_transfer_callback_t completionCallback#: Callback function called after dma transfer finished.

void *userData#: Callback parameter passed to callback function.

I2C Driver#

FSL_I2C_DRIVER_VERSION#: I2C driver version.

I2C status return codes.

Values:

enumerator kStatus_I2C_Busy#: The master is already performing a transfer.

enumerator kStatus_I2C_Idle#: The slave driver is idle.

enumerator kStatus_I2C_Nak#: The slave device sent a NAK in response to a byte.

enumerator kStatus_I2C_InvalidParameter#: Unable to proceed due to invalid parameter.

enumerator kStatus_I2C_BitError#: Transferred bit was not seen on the bus.

enumerator kStatus_I2C_ArbitrationLost#: Arbitration lost error.

enumerator kStatus_I2C_NoTransferInProgress#: Attempt to abort a transfer when one is not in progress.

enumerator kStatus_I2C_DmaRequestFail#: DMA request failed.

enumerator kStatus_I2C_StartStopError#: Start and stop error.

enumerator kStatus_I2C_UnexpectedState#: Unexpected state.

enumerator kStatus_I2C_Timeout#: Timeout when waiting for I2C master/slave pending status to set to continue transfer.

enumerator kStatus_I2C_Addr_Nak#: NAK received for Address

enumerator kStatus_I2C_EventTimeout#: Timeout waiting for bus event.

enumerator kStatus_I2C_SclLowTimeout#: Timeout SCL signal remains low.

enum _i2c_status_flags#

I2C status flags.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kI2C_MasterPendingFlag#: The I2C module is waiting for software interaction. bit 0

enumerator kI2C_MasterArbitrationLostFlag#: The arbitration of the bus was lost. There was collision on the bus. bit 4

enumerator kI2C_MasterStartStopErrorFlag#: There was an error during start or stop phase of the transaction. bit 6

enumerator kI2C_MasterIdleFlag#: The I2C master idle status. bit 5

enumerator kI2C_MasterRxReadyFlag#: The I2C master rx ready status. bit 1

enumerator kI2C_MasterTxReadyFlag#: The I2C master tx ready status. bit 2

enumerator kI2C_MasterAddrNackFlag#: The I2C master address nack status. bit 7

enumerator kI2C_MasterDataNackFlag#: The I2C master data nack status. bit 3

enumerator kI2C_SlavePendingFlag#: The I2C module is waiting for software interaction. bit 8

enumerator kI2C_SlaveNotStretching#: Indicates whether the slave is currently stretching clock (0 = yes, 1 = no). bit 11

enumerator kI2C_SlaveSelected#: Indicates whether the slave is selected by an address match. bit 14

enumerator kI2C_SaveDeselected#: Indicates that slave was previously deselected (deselect event took place, w1c). bit 15

enumerator kI2C_SlaveAddressedFlag#: One of the I2C slave’s 4 addresses is matched. bit 22

enumerator kI2C_SlaveReceiveFlag#: Slave receive data available. bit 9

enumerator kI2C_SlaveTransmitFlag#: Slave data can be transmitted. bit 10

enumerator kI2C_SlaveAddress0MatchFlag#: Slave address0 match. bit 20

enumerator kI2C_SlaveAddress1MatchFlag#: Slave address1 match. bit 12

enumerator kI2C_SlaveAddress2MatchFlag#: Slave address2 match. bit 13

enumerator kI2C_SlaveAddress3MatchFlag#: Slave address3 match. bit 21

enumerator kI2C_MonitorReadyFlag#: The I2C monitor ready interrupt. bit 16

enumerator kI2C_MonitorOverflowFlag#: The monitor data overrun interrupt. bit 17

enumerator kI2C_MonitorActiveFlag#: The monitor is active. bit 18

enumerator kI2C_MonitorIdleFlag#: The monitor idle interrupt. bit 19

enumerator kI2C_EventTimeoutFlag#: The bus event timeout interrupt. bit 24

enumerator kI2C_SclTimeoutFlag#: The SCL timeout interrupt. bit 25

enumerator kI2C_MasterAllClearFlags#

enumerator kI2C_SlaveAllClearFlags#

enumerator kI2C_CommonAllClearFlags#

enum _i2c_interrupt_enable#

I2C interrupt enable.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kI2C_MasterPendingInterruptEnable#: The I2C master communication pending interrupt.

enumerator kI2C_MasterArbitrationLostInterruptEnable#: The I2C master arbitration lost interrupt.

enumerator kI2C_MasterStartStopErrorInterruptEnable#: The I2C master start/stop timing error interrupt.

enumerator kI2C_SlavePendingInterruptEnable#: The I2C slave communication pending interrupt.

enumerator kI2C_SlaveNotStretchingInterruptEnable#: The I2C slave not streching interrupt, deep-sleep mode can be entered only when this interrupt occurs.

enumerator kI2C_SlaveDeselectedInterruptEnable#: The I2C slave deselection interrupt.

enumerator kI2C_MonitorReadyInterruptEnable#: The I2C monitor ready interrupt.

enumerator kI2C_MonitorOverflowInterruptEnable#: The monitor data overrun interrupt.

enumerator kI2C_MonitorIdleInterruptEnable#: The monitor idle interrupt.

enumerator kI2C_EventTimeoutInterruptEnable#: The bus event timeout interrupt.

enumerator kI2C_SclTimeoutInterruptEnable#: The SCL timeout interrupt.

enumerator kI2C_MasterAllInterruptEnable#

enumerator kI2C_SlaveAllInterruptEnable#

enumerator kI2C_CommonAllInterruptEnable#

I2C_RETRY_TIMES#: Retry times for waiting flag.

I2C_MASTER_TRANSMIT_IGNORE_LAST_NACK#: Whether to ignore the nack signal of the last byte during master transmit.

I2C_STAT_MSTCODE_IDLE#: Master Idle State Code

I2C_STAT_MSTCODE_RXREADY#: Master Receive Ready State Code

I2C_STAT_MSTCODE_TXREADY#: Master Transmit Ready State Code

I2C_STAT_MSTCODE_NACKADR#: Master NACK by slave on address State Code

I2C_STAT_MSTCODE_NACKDAT#: Master NACK by slave on data State Code

I2C_STAT_SLVST_ADDR#

I2C_STAT_SLVST_RX#

I2C_STAT_SLVST_TX#

I2C Master Driver#

void I2C_MasterGetDefaultConfig(i2c_master_config_t *masterConfig)#

Provides a default configuration for the I2C master peripheral.

This function provides the following default configuration for the I2C master peripheral:

masterConfig->enableMaster            = true;
masterConfig->baudRate_Bps            = 100000U;
masterConfig->enableTimeout           = false;

After calling this function, you can override any settings in order to customize the configuration, prior to initializing the master driver with I2C_MasterInit().

Parameters:

masterConfig – [out] User provided configuration structure for default values. Refer to i2c_master_config_t.

void I2C_MasterInit(I2C_Type *base, const i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)#

Initializes the I2C master peripheral.

This function enables the peripheral clock and initializes the I2C master peripheral as described by the user provided configuration. A software reset is performed prior to configuration.

Parameters:

base – The I2C peripheral base address.
masterConfig – User provided peripheral configuration. Use I2C_MasterGetDefaultConfig() to get a set of defaults that you can override.
srcClock_Hz – Frequency in Hertz of the I2C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods.

void I2C_MasterDeinit(I2C_Type *base)#

Deinitializes the I2C master peripheral.

This function disables the I2C master peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The I2C peripheral base address.

uint32_t I2C_GetInstance(I2C_Type *base)#

Returns an instance number given a base address.

If an invalid base address is passed, debug builds will assert. Release builds will just return instance number 0.

Parameters:

base – The I2C peripheral base address.

Returns:

I2C instance number starting from 0.

static inline void I2C_MasterReset(I2C_Type *base)#

Performs a software reset.

Restores the I2C master peripheral to reset conditions.

Parameters:

base – The I2C peripheral base address.

static inline void I2C_MasterEnable(I2C_Type *base, bool enable)#

Enables or disables the I2C module as master.

Parameters:

base – The I2C peripheral base address.
enable – Pass true to enable or false to disable the specified I2C as master.

uint32_t I2C_GetStatusFlags(I2C_Type *base)#

Gets the I2C status flags.

A bit mask with the state of all I2C status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also

_i2c_status_flags.

Parameters:

base – The I2C peripheral base address.

Returns:

State of the status flags:

1: related status flag is set.
0: related status flag is not set.

static inline void I2C_ClearStatusFlags(I2C_Type *base, uint32_t statusMask)#

Clears the I2C status flag state.

Refer to kI2C_CommonAllClearStatusFlags, kI2C_MasterAllClearStatusFlags and kI2C_SlaveAllClearStatusFlags to see the clearable flags. Attempts to clear other flags has no effect.

See also

_i2c_status_flags, _i2c_master_status_flags and _i2c_slave_status_flags.

Parameters:

base – The I2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of the members in kI2C_CommonAllClearStatusFlags, kI2C_MasterAllClearStatusFlags and kI2C_SlaveAllClearStatusFlags. You may pass the result of a previous call to I2C_GetStatusFlags().

static inline void I2C_MasterClearStatusFlags(I2C_Type *base, uint32_t statusMask)#

Clears the I2C master status flag state.

Deprecated:

Do not use this function. It has been superceded by I2C_ClearStatusFlags The following status register flags can be cleared:

kI2C_MasterArbitrationLostFlag
kI2C_MasterStartStopErrorFlag

Attempts to clear other flags has no effect.

See also

_i2c_status_flags.

Parameters:

base – The I2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i2c_status_flags enumerators OR’d together. You may pass the result of a previous call to I2C_GetStatusFlags().

static inline void I2C_EnableInterrupts(I2C_Type *base, uint32_t interruptMask)#

Enables the I2C interrupt requests.

Parameters:

base – The I2C peripheral base address.
interruptMask – Bit mask of interrupts to enable. See _i2c_interrupt_enable for the set of constants that should be OR’d together to form the bit mask.

static inline void I2C_DisableInterrupts(I2C_Type *base, uint32_t interruptMask)#

Disables the I2C interrupt requests.

Parameters:

base – The I2C peripheral base address.
interruptMask – Bit mask of interrupts to disable. See _i2c_interrupt_enable for the set of constants that should be OR’d together to form the bit mask.

static inline uint32_t I2C_GetEnabledInterrupts(I2C_Type *base)#

Returns the set of currently enabled I2C interrupt requests.

Parameters:

base – The I2C peripheral base address.

Returns:

A bitmask composed of _i2c_interrupt_enable enumerators OR’d together to indicate the set of enabled interrupts.

void I2C_MasterSetBaudRate(I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)#

Sets the I2C bus frequency for master transactions.

The I2C master is automatically disabled and re-enabled as necessary to configure the baud rate. Do not call this function during a transfer, or the transfer is aborted.

Parameters:

base – The I2C peripheral base address.
srcClock_Hz – I2C functional clock frequency in Hertz.
baudRate_Bps – Requested bus frequency in bits per second.

void I2C_MasterSetTimeoutValue(I2C_Type *base, uint8_t timeout_Ms, uint32_t srcClock_Hz)#

Sets the I2C bus timeout value.

If the SCL signal remains low or bus does not have event longer than the timeout value, kI2C_SclTimeoutFlag or kI2C_EventTimeoutFlag is set. This can indicete the bus is held by slave or any fault occurs to the I2C module.

Parameters:

base – The I2C peripheral base address.
timeout_Ms – Timeout value in millisecond.
srcClock_Hz – I2C functional clock frequency in Hertz.

static inline bool I2C_MasterGetBusIdleState(I2C_Type *base)#

Returns whether the bus is idle.

Requires the master mode to be enabled.

Parameters:

base – The I2C peripheral base address.

Return values:

true – Bus is busy.
false – Bus is idle.

status_t I2C_MasterStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)#

Sends a START on the I2C bus.

This function is used to initiate a new master mode transfer by sending the START signal. The slave address is sent following the I2C START signal.

Parameters:

base – I2C peripheral base pointer
address – 7-bit slave device address.
direction – Master transfer directions(transmit/receive).

Return values:

kStatus_Success – Successfully send the start signal.
kStatus_I2C_Busy – Current bus is busy.

status_t I2C_MasterStop(I2C_Type *base)#

Sends a STOP signal on the I2C bus.

Return values:

kStatus_Success – Successfully send the stop signal.
kStatus_I2C_Timeout – Send stop signal failed, timeout.

static inline status_t I2C_MasterRepeatedStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)#

Sends a REPEATED START on the I2C bus.

Parameters:

base – I2C peripheral base pointer
address – 7-bit slave device address.
direction – Master transfer directions(transmit/receive).

Return values:

kStatus_Success – Successfully send the start signal.
kStatus_I2C_Busy – Current bus is busy but not occupied by current I2C master.

status_t I2C_MasterWriteBlocking(I2C_Type *base, const void *txBuff, size_t txSize, uint32_t flags)#

Performs a polling send transfer on the I2C bus.

Sends up to txSize number of bytes to the previously addressed slave device. The slave may reply with a NAK to any byte in order to terminate the transfer early. If this happens, this function returns kStatus_I2C_Nak.

Parameters:

base – The I2C peripheral base address.
txBuff – The pointer to the data to be transferred.
txSize – The length in bytes of the data to be transferred.
flags – Transfer control flag to control special behavior like suppressing start or stop, for normal transfers use kI2C_TransferDefaultFlag

Return values:

kStatus_Success – Data was sent successfully.
kStatus_I2C_Busy – Another master is currently utilizing the bus.
kStatus_I2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_I2C_ArbitrationLost – Arbitration lost error.

status_t I2C_MasterReadBlocking(I2C_Type *base, void *rxBuff, size_t rxSize, uint32_t flags)#

Performs a polling receive transfer on the I2C bus.

Parameters:

base – The I2C peripheral base address.
rxBuff – The pointer to the data to be transferred.
rxSize – The length in bytes of the data to be transferred.
flags – Transfer control flag to control special behavior like suppressing start or stop, for normal transfers use kI2C_TransferDefaultFlag

Return values:

kStatus_Success – Data was received successfully.
kStatus_I2C_Busy – Another master is currently utilizing the bus.
kStatus_I2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_I2C_ArbitrationLost – Arbitration lost error.

status_t I2C_MasterTransferBlocking(I2C_Type *base, i2c_master_transfer_t *xfer)#

Performs a master polling transfer on the I2C bus.

Note

The API does not return until the transfer succeeds or fails due to arbitration lost or receiving a NAK.

Parameters:

base – I2C peripheral base address.
xfer – Pointer to the transfer structure.

Return values:

kStatus_Success – Successfully complete the data transmission.
kStatus_I2C_Busy – Previous transmission still not finished.
kStatus_I2C_Timeout – Transfer error, wait signal timeout.
kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.
kStataus_I2C_Nak – Transfer error, receive NAK during transfer.
kStataus_I2C_Addr_Nak – Transfer error, receive NAK during addressing.

void I2C_MasterTransferCreateHandle(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_callback_t callback, void *userData)#

Creates a new handle for the I2C master non-blocking APIs.

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I2C_MasterTransferAbort() API shall be called.

Parameters:

base – The I2C peripheral base address.
handle – [out] Pointer to the I2C master driver handle.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.

status_t I2C_MasterTransferNonBlocking(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_t *xfer)#

Performs a non-blocking transaction on the I2C bus.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.
xfer – The pointer to the transfer descriptor.

Return values:

kStatus_Success – The transaction was started successfully.
kStatus_I2C_Busy – Either another master is currently utilizing the bus, or a non-blocking transaction is already in progress.

status_t I2C_MasterTransferGetCount(I2C_Type *base, i2c_master_handle_t *handle, size_t *count)#

Returns number of bytes transferred so far.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.
count – [out] Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_Success –
kStatus_I2C_Busy –

status_t I2C_MasterTransferAbort(I2C_Type *base, i2c_master_handle_t *handle)#

Terminates a non-blocking I2C master transmission early.

Note

It is not safe to call this function from an IRQ handler that has a higher priority than the I2C peripheral’s IRQ priority.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.

Return values:

kStatus_Success – A transaction was successfully aborted.
kStatus_I2C_Timeout – Timeout during polling for flags.

void I2C_MasterTransferHandleIRQ(I2C_Type *base, i2c_master_handle_t *handle)#

Reusable routine to handle master interrupts.

Note

This function does not need to be called unless you are reimplementing the nonblocking API’s interrupt handler routines to add special functionality.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.

enum _i2c_direction#

Direction of master and slave transfers.

Values:

enumerator kI2C_Write#: Master transmit.

enumerator kI2C_Read#: Master receive.

enum _i2c_master_transfer_flags#

Transfer option flags.

Note

These enumerations are intended to be OR’d together to form a bit mask of options for the _i2c_master_transfer::flags field.

Values:

enumerator kI2C_TransferDefaultFlag#: Transfer starts with a start signal, stops with a stop signal.

enumerator kI2C_TransferNoStartFlag#: Don’t send a start condition, address, and sub address

enumerator kI2C_TransferRepeatedStartFlag#: Send a repeated start condition

enumerator kI2C_TransferNoStopFlag#: Don’t send a stop condition.

enum _i2c_transfer_states#

States for the state machine used by transactional APIs.

Values:

enumerator kIdleState#

enumerator kTransmitSubaddrState#

enumerator kTransmitDataState#

enumerator kReceiveDataBeginState#

enumerator kReceiveDataState#

enumerator kReceiveLastDataState#

enumerator kStartState#

enumerator kStopState#

enumerator kWaitForCompletionState#

typedef enum _i2c_direction i2c_direction_t#: Direction of master and slave transfers.

typedef struct _i2c_master_config i2c_master_config_t#

Structure with settings to initialize the I2C master module.

This structure holds configuration settings for the I2C peripheral. To initialize this structure to reasonable defaults, call the I2C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

typedef struct _i2c_master_transfer i2c_master_transfer_t#: I2C master transfer typedef.

typedef struct _i2c_master_handle i2c_master_handle_t#: I2C master handle typedef.

typedef void (*i2c_master_transfer_callback_t)(I2C_Type *base, i2c_master_handle_t *handle, status_t completionStatus, void *userData)#

Master completion callback function pointer type.

This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use in the call to I2C_MasterTransferCreateHandle().

Param base:: The I2C peripheral base address.
Param completionStatus:: Either kStatus_Success or an error code describing how the transfer completed.
Param userData:: Arbitrary pointer-sized value passed from the application.

struct _i2c_master_config#

#include <fsl_i2c.h>

Structure with settings to initialize the I2C master module.

The configuration structure can be made constant so it resides in flash.

Public Members

bool enableMaster#: Whether to enable master mode.

uint32_t baudRate_Bps#: Desired baud rate in bits per second.

bool enableTimeout#: Enable internal timeout function.

uint8_t timeout_Ms#: Event timeout and SCL low timeout value.

struct _i2c_master_transfer#

#include <fsl_i2c.h>

Non-blocking transfer descriptor structure.

This structure is used to pass transaction parameters to the I2C_MasterTransferNonBlocking() API.

Public Members

uint32_t flags#: Bit mask of options for the transfer. See enumeration _i2c_master_transfer_flags for available options. Set to 0 or kI2C_TransferDefaultFlag for normal transfers.

uint8_t slaveAddress#: The 7-bit slave address.

i2c_direction_t direction#: Either kI2C_Read or kI2C_Write.

uint32_t subaddress#: Sub address. Transferred MSB first.

size_t subaddressSize#: Length of sub address to send in bytes. Maximum size is 4 bytes.

void *data#: Pointer to data to transfer.

size_t dataSize#: Number of bytes to transfer.

struct _i2c_master_handle#

#include <fsl_i2c.h>

Driver handle for master non-blocking APIs.

Note

The contents of this structure are private and subject to change.

Public Members

uint8_t state#: Transfer state machine current state.

uint32_t transferCount#: Indicates progress of the transfer

uint32_t remainingBytes#: Remaining byte count in current state.

uint8_t *buf#: Buffer pointer for current state.

bool checkAddrNack#: Whether to check the nack signal is detected during addressing.

i2c_master_transfer_t transfer#: Copy of the current transfer info.

i2c_master_transfer_callback_t completionCallback#: Callback function pointer.

void *userData#: Application data passed to callback.

I2C Slave Driver#

void I2C_SlaveGetDefaultConfig(i2c_slave_config_t *slaveConfig)#

Provides a default configuration for the I2C slave peripheral.

This function provides the following default configuration for the I2C slave peripheral:

slaveConfig->enableSlave = true;
slaveConfig->address0.disable = false;
slaveConfig->address0.address = 0u;
slaveConfig->address1.disable = true;
slaveConfig->address2.disable = true;
slaveConfig->address3.disable = true;
slaveConfig->busSpeed = kI2C_SlaveStandardMode;

After calling this function, override any settings to customize the configuration, prior to initializing the master driver with I2C_SlaveInit(). Be sure to override at least the address0.address member of the configuration structure with the desired slave address.

Parameters:

slaveConfig – [out] User provided configuration structure that is set to default values. Refer to i2c_slave_config_t.

status_t I2C_SlaveInit(I2C_Type *base, const i2c_slave_config_t *slaveConfig, uint32_t srcClock_Hz)#

Initializes the I2C slave peripheral.

This function enables the peripheral clock and initializes the I2C slave peripheral as described by the user provided configuration.

Parameters:

base – The I2C peripheral base address.
slaveConfig – User provided peripheral configuration. Use I2C_SlaveGetDefaultConfig() to get a set of defaults that you can override.
srcClock_Hz – Frequency in Hertz of the I2C functional clock. Used to calculate CLKDIV value to provide enough data setup time for master when slave stretches the clock.

void I2C_SlaveSetAddress(I2C_Type *base, i2c_slave_address_register_t addressRegister, uint8_t address, bool addressDisable)#

Configures Slave Address n register.

This function writes new value to Slave Address register.

Parameters:

base – The I2C peripheral base address.
addressRegister – The module supports multiple address registers. The parameter determines which one shall be changed.
address – The slave address to be stored to the address register for matching.
addressDisable – Disable matching of the specified address register.

void I2C_SlaveDeinit(I2C_Type *base)#

Deinitializes the I2C slave peripheral.

This function disables the I2C slave peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The I2C peripheral base address.

static inline void I2C_SlaveEnable(I2C_Type *base, bool enable)#

Enables or disables the I2C module as slave.

Parameters:

base – The I2C peripheral base address.
enable – True to enable or flase to disable.

static inline void I2C_SlaveClearStatusFlags(I2C_Type *base, uint32_t statusMask)#

Clears the I2C status flag state.

The following status register flags can be cleared:

slave deselected flag

Attempts to clear other flags has no effect.

See also

_i2c_slave_flags.

Parameters:

base – The I2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i2c_slave_flags enumerators OR’d together. You may pass the result of a previous call to I2C_SlaveGetStatusFlags().

status_t I2C_SlaveWriteBlocking(I2C_Type *base, const uint8_t *txBuff, size_t txSize)#

Performs a polling send transfer on the I2C bus.

The function executes blocking address phase and blocking data phase.

Parameters:

base – The I2C peripheral base address.
txBuff – The pointer to the data to be transferred.
txSize – The length in bytes of the data to be transferred.

Returns:

kStatus_Success Data has been sent.

Returns:

kStatus_Fail Unexpected slave state (master data write while master read from slave is expected).

status_t I2C_SlaveReadBlocking(I2C_Type *base, uint8_t *rxBuff, size_t rxSize)#

Performs a polling receive transfer on the I2C bus.

The function executes blocking address phase and blocking data phase.

Parameters:

base – The I2C peripheral base address.
rxBuff – The pointer to the data to be transferred.
rxSize – The length in bytes of the data to be transferred.

Returns:

kStatus_Success Data has been received.

Returns:

kStatus_Fail Unexpected slave state (master data read while master write to slave is expected).

void I2C_SlaveTransferCreateHandle(I2C_Type *base, i2c_slave_handle_t *handle, i2c_slave_transfer_callback_t callback, void *userData)#

Creates a new handle for the I2C slave non-blocking APIs.

Parameters:

base – The I2C peripheral base address.
handle – [out] Pointer to the I2C slave driver handle.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.

status_t I2C_SlaveTransferNonBlocking(I2C_Type *base, i2c_slave_handle_t *handle, uint32_t eventMask)#

Starts accepting slave transfers.

Call this API after calling I2C_SlaveInit() and I2C_SlaveTransferCreateHandle() to start processing transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the callback that was passed into the call to I2C_SlaveTransferCreateHandle(). The callback is always invoked from the interrupt context.

If no slave Tx transfer is busy, a master read from slave request invokes kI2C_SlaveTransmitEvent callback. If no slave Rx transfer is busy, a master write to slave request invokes kI2C_SlaveReceiveEvent callback.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.
eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:

kStatus_Success – Slave transfers were successfully started.
kStatus_I2C_Busy – Slave transfers have already been started on this handle.

status_t I2C_SlaveSetSendBuffer(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, const void *txData, size_t txSize, uint32_t eventMask)#

Starts accepting master read from slave requests.

The function can be called in response to kI2C_SlaveTransmitEvent callback to start a new slave Tx transfer from within the transfer callback.

Parameters:

base – The I2C peripheral base address.
transfer – Pointer to i2c_slave_transfer_t structure.
txData – Pointer to data to send to master.
txSize – Size of txData in bytes.
eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:

kStatus_Success – Slave transfers were successfully started.
kStatus_I2C_Busy – Slave transfers have already been started on this handle.

status_t I2C_SlaveSetReceiveBuffer(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, void *rxData, size_t rxSize, uint32_t eventMask)#

Starts accepting master write to slave requests.

The function can be called in response to kI2C_SlaveReceiveEvent callback to start a new slave Rx transfer from within the transfer callback.

Parameters:

base – The I2C peripheral base address.
transfer – Pointer to i2c_slave_transfer_t structure.
rxData – Pointer to data to store data from master.
rxSize – Size of rxData in bytes.
eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:

kStatus_Success – Slave transfers were successfully started.
kStatus_I2C_Busy – Slave transfers have already been started on this handle.

static inline uint32_t I2C_SlaveGetReceivedAddress(I2C_Type *base, volatile i2c_slave_transfer_t *transfer)#

Returns the slave address sent by the I2C master.

This function should only be called from the address match event callback kI2C_SlaveAddressMatchEvent.

Parameters:

base – The I2C peripheral base address.
transfer – The I2C slave transfer.

Returns:

The 8-bit address matched by the I2C slave. Bit 0 contains the R/w direction bit, and the 7-bit slave address is in the upper 7 bits.

void I2C_SlaveTransferAbort(I2C_Type *base, i2c_slave_handle_t *handle)#

Aborts the slave non-blocking transfers.

Note

This API could be called at any time to stop slave for handling the bus events.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.

Return values:

kStatus_Success –
kStatus_I2C_Idle –

status_t I2C_SlaveTransferGetCount(I2C_Type *base, i2c_slave_handle_t *handle, size_t *count)#

Gets the slave transfer remaining bytes during a interrupt non-blocking transfer.

Parameters:

base – I2C base pointer.
handle – pointer to i2c_slave_handle_t structure.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void I2C_SlaveTransferHandleIRQ(I2C_Type *base, i2c_slave_handle_t *handle)#

Reusable routine to handle slave interrupts.

Note

This function does not need to be called unless you are reimplementing the non blocking API’s interrupt handler routines to add special functionality.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.

enum _i2c_slave_address_register#

I2C slave address register.

Values:

enumerator kI2C_SlaveAddressRegister0#: Slave Address 0 register.

enumerator kI2C_SlaveAddressRegister1#: Slave Address 1 register.

enumerator kI2C_SlaveAddressRegister2#: Slave Address 2 register.

enumerator kI2C_SlaveAddressRegister3#: Slave Address 3 register.

enum _i2c_slave_address_qual_mode#

I2C slave address match options.

Values:

enumerator kI2C_QualModeMask#: The SLVQUAL0 field (qualAddress) is used as a logical mask for matching address0.

enumerator kI2C_QualModeExtend#: The SLVQUAL0 (qualAddress) field is used to extend address 0 matching in a range of addresses.

enum _i2c_slave_bus_speed#

I2C slave bus speed options.

Values:

enumerator kI2C_SlaveStandardMode#

enumerator kI2C_SlaveFastMode#

enumerator kI2C_SlaveFastModePlus#

enumerator kI2C_SlaveHsMode#

enum _i2c_slave_transfer_event#

Set of events sent to the callback for non blocking slave transfers.

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

Values:

enumerator kI2C_SlaveAddressMatchEvent#: Received the slave address after a start or repeated start.

enumerator kI2C_SlaveTransmitEvent#: Callback is requested to provide data to transmit (slave-transmitter role).

enumerator kI2C_SlaveReceiveEvent#: Callback is requested to provide a buffer in which to place received data (slave-receiver role).

enumerator kI2C_SlaveCompletionEvent#: All data in the active transfer have been consumed.

enumerator kI2C_SlaveDeselectedEvent#: The slave function has become deselected (SLVSEL flag changing from 1 to 0.

enumerator kI2C_SlaveAllEvents#: Bit mask of all available events.

enum _i2c_slave_fsm#

I2C slave software finite state machine states.

Values:

enumerator kI2C_SlaveFsmAddressMatch#

enumerator kI2C_SlaveFsmReceive#

enumerator kI2C_SlaveFsmTransmit#

typedef enum _i2c_slave_address_register i2c_slave_address_register_t#: I2C slave address register.

typedef struct _i2c_slave_address i2c_slave_address_t#: Data structure with 7-bit Slave address and Slave address disable.

typedef enum _i2c_slave_address_qual_mode i2c_slave_address_qual_mode_t#: I2C slave address match options.

typedef enum _i2c_slave_bus_speed i2c_slave_bus_speed_t#: I2C slave bus speed options.

typedef struct _i2c_slave_config i2c_slave_config_t#

Structure with settings to initialize the I2C slave module.

This structure holds configuration settings for the I2C slave peripheral. To initialize this structure to reasonable defaults, call the I2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

typedef enum _i2c_slave_transfer_event i2c_slave_transfer_event_t#

Set of events sent to the callback for non blocking slave transfers.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

typedef struct _i2c_slave_handle i2c_slave_handle_t#: I2C slave handle typedef.

typedef struct _i2c_slave_transfer i2c_slave_transfer_t#: I2C slave transfer structure.

typedef void (*i2c_slave_transfer_callback_t)(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, void *userData)#

Slave event callback function pointer type.

This callback is used only for the slave non-blocking transfer API. To install a callback, use the I2C_SlaveSetCallback() function after you have created a handle.

Param base:: Base address for the I2C instance on which the event occurred.
Param transfer:: Pointer to transfer descriptor containing values passed to and/or from the callback.
Param userData:: Arbitrary pointer-sized value passed from the application.

typedef enum _i2c_slave_fsm i2c_slave_fsm_t#: I2C slave software finite state machine states.

typedef void (*flexcomm_i2c_master_irq_handler_t)(I2C_Type *base, i2c_master_handle_t *handle)#: Typedef for master interrupt handler.

typedef void (*flexcomm_i2c_slave_irq_handler_t)(I2C_Type *base, i2c_slave_handle_t *handle)#: Typedef for slave interrupt handler.

struct _i2c_slave_address#

#include <fsl_i2c.h>

Data structure with 7-bit Slave address and Slave address disable.

Public Members

uint8_t address#: 7-bit Slave address SLVADR.

bool addressDisable#: Slave address disable SADISABLE.

struct _i2c_slave_config#

#include <fsl_i2c.h>

Structure with settings to initialize the I2C slave module.

The configuration structure can be made constant so it resides in flash.

Public Members

i2c_slave_address_t address0#: Slave’s 7-bit address and disable.

i2c_slave_address_t address1#: Alternate slave 7-bit address and disable.

i2c_slave_address_t address2#: Alternate slave 7-bit address and disable.

i2c_slave_address_t address3#: Alternate slave 7-bit address and disable.

i2c_slave_address_qual_mode_t qualMode#: Qualify mode for slave address 0.

uint8_t qualAddress#: Slave address qualifier for address 0.

i2c_slave_bus_speed_t busSpeed#: Slave bus speed mode. If the slave function stretches SCL to allow for software response, it must provide sufficient data setup time to the master before releasing the stretched clock. This is accomplished by inserting one clock time of CLKDIV at that point. The busSpeed value is used to configure CLKDIV such that one clock time is greater than the tSU;DAT value noted in the I2C bus specification for the I2C mode that is being used. If the busSpeed mode is unknown at compile time, use the longest data setup time kI2C_SlaveStandardMode (250 ns)

bool enableSlave#: Enable slave mode.

struct _i2c_slave_transfer#

#include <fsl_i2c.h>

I2C slave transfer structure.

Public Members

i2c_slave_handle_t *handle#: Pointer to handle that contains this transfer.

i2c_slave_transfer_event_t event#: Reason the callback is being invoked.

uint8_t receivedAddress#: Matching address send by master. 7-bits plus R/nW bit0

uint32_t eventMask#: Mask of enabled events.

uint8_t *rxData#: Transfer buffer for receive data

const uint8_t *txData#: Transfer buffer for transmit data

size_t txSize#: Transfer size

size_t rxSize#: Transfer size

size_t transferredCount#: Number of bytes transferred during this transfer.

status_t completionStatus#: Success or error code describing how the transfer completed. Only applies for kI2C_SlaveCompletionEvent.

struct _i2c_slave_handle#

#include <fsl_i2c.h>

I2C slave handle structure.

Note

The contents of this structure are private and subject to change.

Public Members

volatile i2c_slave_transfer_t transfer#: I2C slave transfer.

volatile bool isBusy#: Whether transfer is busy.

volatile i2c_slave_fsm_t slaveFsm#: slave transfer state machine.

i2c_slave_transfer_callback_t callback#: Callback function called at transfer event.

void *userData#: Callback parameter passed to callback.

INPUTMUX: Input Multiplexing Driver#

FSL_INPUTMUX_DRIVER_VERSION#: Group interrupt driver version for SDK.

void INPUTMUX_Init(void *base)#

Initialize INPUTMUX peripheral.

This function enables the INPUTMUX clock.

Parameters:

base – Base address of the INPUTMUX peripheral.

void INPUTMUX_AttachSignal(void *base, uint16_t index, inputmux_connection_t connection)#

Attaches a signal.

This function writes a source signal selection into an INPUTMUX multiplexer register. The target register address is computed as:

target address = base + pmux_id + index * 4

Each inputmux_connection_t enum value encodes two fields via PMUX_SHIFT (20):

31          20 19                    0
+------------+------------------------+
|  pmux_id   |       output_id        |
+------------+------------------------+
     |                   |
group base          signal value
addr offset         to write

When N consecutive registers all accept the same set of source signals (same pmux_id), only one set of enum values is defined for the whole group; index (0 ~ N-1) selects which register to write, avoiding duplicate enum entries.

Example: SCT0 has 8 input mux registers sharing SCT0_INMUX0 = 0x000 as the group base:

base
 |
 +--[+0x000] SCT0_INMUX0  <-- index=0
 +--[+0x004] SCT0_INMUX1  <-- index=1
 +--[+0x008] SCT0_INMUX2  <-- index=2
 :   ...
 +--[+0x014] SCT0_INMUX5  <-- index=5  (write target for the call below)
 :   ...
 +--[+0x01C] SCT0_INMUX7  <-- index=7

To connect CMP0 output to SCT0 input 5:

INPUTMUX_AttachSignal(INPUTMUX, 5, kINPUTMUX_Cmp0OutToSct0);
// write address = base + 0x000 + 5*4 = base + 0x014  (SCT0_INMUX5)

For peripherals with only a single register per function (e.g. FREQMEAS_REF_REG = 0x180, FREQMEAS_TAR_REG = 0x184), each register has its own unique pmux_id and index must be 0. The two registers are distinguished by their different pmux_id values, not by index:

base
 |
 +--[+0x180] FREQMEAS_REF_REG  (pmux_id=0x180, index=0)
 +--[+0x184] FREQMEAS_TAR_REG  (pmux_id=0x184, index=0)

Parameters:

base – Base address of the INPUTMUX peripheral.
index – Zero-based index of the destination register within its group. Each increment advances the address by 4 bytes. Use 0 for single-register groups.
connection – Encodes the group base offset (bits [31:PMUX_SHIFT]) and the source signal value (bits [PMUX_SHIFT-1:0]).

void INPUTMUX_EnableSignal(void *base, inputmux_signal_t signal, bool enable)#

Enable/disable a signal.

This function gates the INPUTMUX clock.

Parameters:

base – Base address of the INPUTMUX peripheral.
signal – Enable signal register id and bit offset.
enable – Selects enable or disable.

void INPUTMUX_Deinit(void *base)#

Deinitialize INPUTMUX peripheral.

This function disables the INPUTMUX clock.

Parameters:

base – Base address of the INPUTMUX peripheral.

Common Driver#

FSL_COMMON_DRIVER_VERSION#: common driver version.

DEBUG_CONSOLE_DEVICE_TYPE_NONE#: No debug console.

DEBUG_CONSOLE_DEVICE_TYPE_UART#: Debug console based on UART.

DEBUG_CONSOLE_DEVICE_TYPE_LPUART#: Debug console based on LPUART.

DEBUG_CONSOLE_DEVICE_TYPE_LPSCI#: Debug console based on LPSCI.

DEBUG_CONSOLE_DEVICE_TYPE_USBCDC#: Debug console based on USBCDC.

DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM#: Debug console based on FLEXCOMM.

DEBUG_CONSOLE_DEVICE_TYPE_IUART#: Debug console based on i.MX UART.

DEBUG_CONSOLE_DEVICE_TYPE_VUSART#: Debug console based on LPC_VUSART.

DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART#: Debug console based on LPC_USART.

DEBUG_CONSOLE_DEVICE_TYPE_SWO#: Debug console based on SWO.

DEBUG_CONSOLE_DEVICE_TYPE_QSCI#: Debug console based on QSCI.

MIN(a, b)#: Computes the minimum of a and b.

MAX(a, b)#: Computes the maximum of a and b.

UINT16_MAX#: Max value of uint16_t type.

UINT32_MAX#: Max value of uint32_t type.

UINTPTR_SIZE#

UINT64_H(X)#: Macro to get upper 32 bits of a 64-bit value

UINT64_L(X)#: Macro to get lower 32 bits of a 64-bit value

MCUX_MASK_INVERT_8(mask)#: 8-bit mask inversion.

MCUX_MASK_INVERT_16(mask)#: 16-bit mask inversion.

MCUX_MASK_INVERT_32(mask)#: 32-bit mask inversion for completeness.

MCUX_REG_WRITE8(reg, value)#: 8-bit register write macro

MCUX_REG_WRITE16(reg, value)#: 16-bit register write macro

MCUX_REG_WRITE32(reg, value)#: 32-bit register write macro

MCUX_REG_READ8(reg)#: 8-bit register read macro

MCUX_REG_READ16(reg)#: 16-bit register read macro

MCUX_REG_READ32(reg)#: 32-bit register read macro

MCUX_REG_BIT_SET8(reg, mask)#: 8-bit register bit set macro

MCUX_REG_BIT_SET16(reg, mask)#: 16-bit register bit set macro

MCUX_REG_BIT_SET32(reg, mask)#: 32-bit register bit set macro

MCUX_REG_BIT_CLEAR8(reg, mask)#: 8-bit register bit clear macro

MCUX_REG_BIT_CLEAR16(reg, mask)#: 16-bit register bit clear macro

MCUX_REG_BIT_CLEAR32(reg, mask)#: 32-bit register bit clear macro

MCUX_REG_BIT_GET8(reg, mask)#: 8-bit register bit get macro

MCUX_REG_BIT_GET16(reg, mask)#: 16-bit register bit get macro

MCUX_REG_BIT_GET32(reg, mask)#: 32-bit register bit get macro

MCUX_REG_MODIFY8(reg, mask, value)#: 32-bit register read-modify-write macro

MCUX_REG_MODIFY16(reg, mask, value)#: 16-bit register read-modify-write macro

MCUX_REG_MODIFY32(reg, mask, value)#: 32-bit register read-modify-write macro

SDK_ATOMIC_LOCAL_ADD(addr, val)#: Add value val from the variable at address address.

SDK_ATOMIC_LOCAL_SUB(addr, val)#: Subtract value val to the variable at address address.

SDK_ATOMIC_LOCAL_SET(addr, bits)#: Set the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_CLEAR(addr, bits)#: Clear the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_TOGGLE(addr, bits)#: Toggle the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits)#: For the variable at address address, clear the bits specifiled by clearBits and set the bits specifiled by setBits.

SDK_ATOMIC_LOCAL_COMPARE_AND_SET(addr, expected, newValue)#: For the variable at address address, check whether the value equal to expected. If value same as expected then update newValue to address and return true , else return false .

SDK_ATOMIC_LOCAL_TEST_AND_SET(addr, newValue)#: For the variable at address address, set as newValue value and return old value.

USEC_TO_COUNT(us, clockFreqInHz)#: Macro to convert a microsecond period to raw count value

COUNT_TO_USEC(count, clockFreqInHz)#: Macro to convert a raw count value to microsecond

MSEC_TO_COUNT(ms, clockFreqInHz)#: Macro to convert a millisecond period to raw count value

COUNT_TO_MSEC(count, clockFreqInHz)#: Macro to convert a raw count value to millisecond

SDK_ISR_EXIT_BARRIER#

SDK_ALIGN(var, alignbytes)#: Macro to define a variable with alignbytes alignment

SDK_SIZEALIGN(var, alignbytes)#

Macro to define a variable with L1 d-cache line size alignment

Macro to define a variable with L2 cache line size alignment

Macro to change a value to a given size aligned value (rounded up)

SDK_SIZEALIGN_UP(var, alignbytes)#: Macro to change a value to a given size aligned value (rounded up), the wrapper of SDK_SIZEALIGN

SDK_SIZEALIGN_DOWN(var, alignbytes)#: Macro to change a value to a given size aligned value (rounded down)

SDK_IS_ALIGNED(var, alignbytes)#: Macro to check if a value is aligned to a given size

AT_NONCACHEABLE_SECTION(var)#: Define a variable var, and place it in non-cacheable section.

AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes)#: Define a variable var, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.

AT_NONCACHEABLE_SECTION_INIT(var)#: Define a variable var with initial value, and place it in non-cacheable section.

AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes)#: Define a variable var with initial value, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.

AT_CACHE_LINE_SECTION(var)#: Define a variable var, which is cache line size aligned and be placed in CacheLineData section.

AT_CACHE_LINE_SECTION_INIT(var)#: Define a variable var with initial value, which is cache line size aligned and be placed in CacheLineData.init section.

AT_QUICKACCESS_SECTION_CODE(func)#: Place function in a section which can be accessed quickly by core.

AT_QUICKACCESS_SECTION_DATA(var)#: Place data in a section which can be accessed quickly by core.

AT_QUICKACCESS_SECTION_DATA_ALIGN(var, alignbytes)#: Place data in a section which can be accessed quickly by core, and the variable address is set to align with alignbytes.

MCUX_RAMFUNC#

Function attribute to place function in RAM. For example, to place function my_func in ram, use like:

MCUX_RAMFUNC my_func

RAMFUNCTION_SECTION_CODE(func)#: Place function in ram.

MCUX_DEPRECATED#: Deprecated APIs.

MCUX_DEPRECATED_MACRO#: Deprecated macros.

MCUX_EXPERIMENTAL#: Experimental APIs.

MCUX_EXPERIMENTAL_MACRO#: Experimental macros.

enum _status_groups#

Status group numbers.

Values:

enumerator kStatusGroup_Generic#: Group number for generic status codes.

enumerator kStatusGroup_FLASH#: Group number for FLASH status codes.

enumerator kStatusGroup_LPSPI#: Group number for LPSPI status codes.

enumerator kStatusGroup_FLEXIO_SPI#: Group number for FLEXIO SPI status codes.

enumerator kStatusGroup_DSPI#: Group number for DSPI status codes.

enumerator kStatusGroup_FLEXIO_UART#: Group number for FLEXIO UART status codes.

enumerator kStatusGroup_FLEXIO_I2C#: Group number for FLEXIO I2C status codes.

enumerator kStatusGroup_LPI2C#: Group number for LPI2C status codes.

enumerator kStatusGroup_UART#: Group number for UART status codes.

enumerator kStatusGroup_I2C#: Group number for UART status codes.

enumerator kStatusGroup_LPSCI#: Group number for LPSCI status codes.

enumerator kStatusGroup_LPUART#: Group number for LPUART status codes.

enumerator kStatusGroup_SPI#: Group number for SPI status code.

enumerator kStatusGroup_XRDC#: Group number for XRDC status code.

enumerator kStatusGroup_SEMA42#: Group number for SEMA42 status code.

enumerator kStatusGroup_SDHC#: Group number for SDHC status code

enumerator kStatusGroup_SDMMC#: Group number for SDMMC status code

enumerator kStatusGroup_SAI#: Group number for SAI status code

enumerator kStatusGroup_MCG#: Group number for MCG status codes.

enumerator kStatusGroup_SCG#: Group number for SCG status codes.

enumerator kStatusGroup_SDSPI#: Group number for SDSPI status codes.

enumerator kStatusGroup_FLEXIO_I2S#: Group number for FLEXIO I2S status codes

enumerator kStatusGroup_FLEXIO_MCULCD#: Group number for FLEXIO LCD status codes

enumerator kStatusGroup_FLASHIAP#: Group number for FLASHIAP status codes

enumerator kStatusGroup_FLEXCOMM_I2C#: Group number for FLEXCOMM I2C status codes

enumerator kStatusGroup_I2S#: Group number for I2S status codes

enumerator kStatusGroup_IUART#: Group number for IUART status codes

enumerator kStatusGroup_CSI#: Group number for CSI status codes

enumerator kStatusGroup_MIPI_DSI#: Group number for MIPI DSI status codes

enumerator kStatusGroup_SDRAMC#: Group number for SDRAMC status codes.

enumerator kStatusGroup_POWER#: Group number for POWER status codes.

enumerator kStatusGroup_ENET#: Group number for ENET status codes.

enumerator kStatusGroup_PHY#: Group number for PHY status codes.

enumerator kStatusGroup_TRGMUX#: Group number for TRGMUX status codes.

enumerator kStatusGroup_SMARTCARD#: Group number for SMARTCARD status codes.

enumerator kStatusGroup_LMEM#: Group number for LMEM status codes.

enumerator kStatusGroup_QSPI#: Group number for QSPI status codes.

enumerator kStatusGroup_DMA#: Group number for DMA status codes.

enumerator kStatusGroup_EDMA#: Group number for EDMA status codes.

enumerator kStatusGroup_DMAMGR#: Group number for DMAMGR status codes.

enumerator kStatusGroup_FLEXCAN#: Group number for FlexCAN status codes.

enumerator kStatusGroup_LTC#: Group number for LTC status codes.

enumerator kStatusGroup_FLEXIO_CAMERA#: Group number for FLEXIO CAMERA status codes.

enumerator kStatusGroup_LPC_SPI#: Group number for LPC_SPI status codes.

enumerator kStatusGroup_LPC_USART#: Group number for LPC_USART status codes.

enumerator kStatusGroup_DMIC#: Group number for DMIC status codes.

enumerator kStatusGroup_SDIF#: Group number for SDIF status codes.

enumerator kStatusGroup_SPIFI#: Group number for SPIFI status codes.

enumerator kStatusGroup_OTP#: Group number for OTP status codes.

enumerator kStatusGroup_MCAN#: Group number for MCAN status codes.

enumerator kStatusGroup_CAAM#: Group number for CAAM status codes.

enumerator kStatusGroup_ECSPI#: Group number for ECSPI status codes.

enumerator kStatusGroup_USDHC#: Group number for USDHC status codes.

enumerator kStatusGroup_LPC_I2C#: Group number for LPC_I2C status codes.

enumerator kStatusGroup_DCP#: Group number for DCP status codes.

enumerator kStatusGroup_MSCAN#: Group number for MSCAN status codes.

enumerator kStatusGroup_ESAI#: Group number for ESAI status codes.

enumerator kStatusGroup_FLEXSPI#: Group number for FLEXSPI status codes.

enumerator kStatusGroup_MMDC#: Group number for MMDC status codes.

enumerator kStatusGroup_PDM#: Group number for MIC status codes.

enumerator kStatusGroup_SDMA#: Group number for SDMA status codes.

enumerator kStatusGroup_ICS#: Group number for ICS status codes.

enumerator kStatusGroup_SPDIF#: Group number for SPDIF status codes.

enumerator kStatusGroup_LPC_MINISPI#: Group number for LPC_MINISPI status codes.

enumerator kStatusGroup_HASHCRYPT#: Group number for Hashcrypt status codes

enumerator kStatusGroup_LPC_SPI_SSP#: Group number for LPC_SPI_SSP status codes.

enumerator kStatusGroup_I3C#: Group number for I3C status codes

enumerator kStatusGroup_LPC_I2C_1#: Group number for LPC_I2C_1 status codes.

enumerator kStatusGroup_NOTIFIER#: Group number for NOTIFIER status codes.

enumerator kStatusGroup_DebugConsole#: Group number for debug console status codes.

enumerator kStatusGroup_SEMC#: Group number for SEMC status codes.

enumerator kStatusGroup_ApplicationRangeStart#: Starting number for application groups.

enumerator kStatusGroup_IAP#: Group number for IAP status codes

enumerator kStatusGroup_SFA#: Group number for SFA status codes

enumerator kStatusGroup_SPC#: Group number for SPC status codes.

enumerator kStatusGroup_PUF#: Group number for PUF status codes.

enumerator kStatusGroup_TOUCH_PANEL#: Group number for touch panel status codes

enumerator kStatusGroup_VBAT#: Group number for VBAT status codes

enumerator kStatusGroup_XSPI#: Group number for XSPI status codes

enumerator kStatusGroup_PNGDEC#: Group number for PNGDEC status codes

enumerator kStatusGroup_JPEGDEC#: Group number for JPEGDEC status codes

enumerator kStatusGroup_AUDMIX#: Group number for AUDMIX status codes

enumerator kStatusGroup_HAL_GPIO#: Group number for HAL GPIO status codes.

enumerator kStatusGroup_HAL_UART#: Group number for HAL UART status codes.

enumerator kStatusGroup_HAL_TIMER#: Group number for HAL TIMER status codes.

enumerator kStatusGroup_HAL_SPI#: Group number for HAL SPI status codes.

enumerator kStatusGroup_HAL_I2C#: Group number for HAL I2C status codes.

enumerator kStatusGroup_HAL_FLASH#: Group number for HAL FLASH status codes.

enumerator kStatusGroup_HAL_PWM#: Group number for HAL PWM status codes.

enumerator kStatusGroup_HAL_RNG#: Group number for HAL RNG status codes.

enumerator kStatusGroup_HAL_I2S#: Group number for HAL I2S status codes.

enumerator kStatusGroup_HAL_ADC_SENSOR#: Group number for HAL ADC SENSOR status codes.

enumerator kStatusGroup_TIMERMANAGER#: Group number for TiMER MANAGER status codes.

enumerator kStatusGroup_SERIALMANAGER#: Group number for SERIAL MANAGER status codes.

enumerator kStatusGroup_LED#: Group number for LED status codes.

enumerator kStatusGroup_BUTTON#: Group number for BUTTON status codes.

enumerator kStatusGroup_EXTERN_EEPROM#: Group number for EXTERN EEPROM status codes.

enumerator kStatusGroup_SHELL#: Group number for SHELL status codes.

enumerator kStatusGroup_MEM_MANAGER#: Group number for MEM MANAGER status codes.

enumerator kStatusGroup_LIST#: Group number for List status codes.

enumerator kStatusGroup_OSA#: Group number for OSA status codes.

enumerator kStatusGroup_COMMON_TASK#: Group number for Common task status codes.

enumerator kStatusGroup_MSG#: Group number for messaging status codes.

enumerator kStatusGroup_SDK_OCOTP#: Group number for OCOTP status codes.

enumerator kStatusGroup_SDK_FLEXSPINOR#: Group number for FLEXSPINOR status codes.

enumerator kStatusGroup_CODEC#: Group number for codec status codes.

enumerator kStatusGroup_ASRC#: Group number for codec status ASRC.

enumerator kStatusGroup_OTFAD#: Group number for codec status codes.

enumerator kStatusGroup_SDIOSLV#: Group number for SDIOSLV status codes.

enumerator kStatusGroup_MECC#: Group number for MECC status codes.

enumerator kStatusGroup_ENET_QOS#: Group number for ENET_QOS status codes.

enumerator kStatusGroup_LOG#: Group number for LOG status codes.

enumerator kStatusGroup_I3CBUS#: Group number for I3CBUS status codes.

enumerator kStatusGroup_QSCI#: Group number for QSCI status codes.

enumerator kStatusGroup_ELEMU#: Group number for ELEMU status codes.

enumerator kStatusGroup_QUEUEDSPI#: Group number for QSPI status codes.

enumerator kStatusGroup_POWER_MANAGER#: Group number for POWER_MANAGER status codes.

enumerator kStatusGroup_IPED#: Group number for IPED status codes.

enumerator kStatusGroup_ELS_PKC#: Group number for ELS PKC status codes.

enumerator kStatusGroup_CSS_PKC#: Group number for CSS PKC status codes.

enumerator kStatusGroup_HOSTIF#: Group number for HOSTIF status codes.

enumerator kStatusGroup_CLIF#: Group number for CLIF status codes.

enumerator kStatusGroup_BMA#: Group number for BMA status codes.

enumerator kStatusGroup_NETC#: Group number for NETC status codes.

enumerator kStatusGroup_ELE#: Group number for ELE status codes.

enumerator kStatusGroup_GLIKEY#: Group number for GLIKEY status codes.

enumerator kStatusGroup_AON_POWER#: Group number for AON_POWER status codes.

enumerator kStatusGroup_AON_COMMON#: Group number for AON_COMMON status codes.

enumerator kStatusGroup_ENDAT3#: Group number for ENDAT3 status codes.

enumerator kStatusGroup_HIPERFACE#: Group number for HIPERFACE status codes.

enumerator kStatusGroup_NPX#: Group number for NPX status codes.

enumerator kStatusGroup_ELA_CSEC#: Group number for ELA_CSEC status codes.

enumerator kStatusGroup_FLEXIO_T_FORMAT#: Group number for T-format status codes.

enumerator kStatusGroup_FLEXIO_A_FORMAT#: Group number for A-format status codes.

enumerator kStatusGroup_LPC_QSPI#: Group number for LPC QSPI status codes.

enumerator kStatusGroup_EVENT_CTRL#: Group number for Event controller status codes.

Generic status return codes.

Values:

enumerator kStatus_Success#: Generic status for Success.

enumerator kStatus_Fail#: Generic status for Fail.

enumerator kStatus_ReadOnly#: Generic status for read only failure.

enumerator kStatus_OutOfRange#: Generic status for out of range access.

enumerator kStatus_InvalidArgument#: Generic status for invalid argument check.

enumerator kStatus_Timeout#: Generic status for timeout.

enumerator kStatus_NoTransferInProgress#: Generic status for no transfer in progress.

enumerator kStatus_Busy#: Generic status for module is busy.

enumerator kStatus_NoData#: Generic status for no data is found for the operation.

typedef int32_t status_t#: Type used for all status and error return values.

void *SDK_Malloc(size_t size, size_t alignbytes)#

Allocate memory with given alignment and aligned size.

This is provided to support the dynamically allocated memory used in cache-able region.

Parameters:

size – The length required to malloc.
alignbytes – The alignment size.

Return values:

The – allocated memory.

void SDK_Free(void *ptr)#

Free memory.

Parameters:

ptr – The memory to be release.

void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz)#

Delay at least for some time. Please note that, this API uses while loop for delay, different run-time environments make the time not precise, if precise delay count was needed, please implement a new delay function with hardware timer.

Parameters:

delayTime_us – Delay time in unit of microsecond.
coreClock_Hz – Core clock frequency with Hz.

static inline status_t EnableIRQ(IRQn_Type interrupt)#

Enable specific interrupt.

Enable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only enables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ number.

Return values:

kStatus_Success – Interrupt enabled successfully
kStatus_Fail – Failed to enable the interrupt

static inline status_t DisableIRQ(IRQn_Type interrupt)#

Disable specific interrupt.

Disable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only disables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ number.

Return values:

kStatus_Success – Interrupt disabled successfully
kStatus_Fail – Failed to disable the interrupt

static inline status_t EnableIRQWithPriority(IRQn_Type interrupt, uint8_t priNum)#

Enable the IRQ, and also set the interrupt priority.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ to Enable.
priNum – Priority number set to interrupt controller register.

Return values:

kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.

static inline status_t IRQ_SetPriority(IRQn_Type interrupt, uint8_t priNum)#

Set the IRQ priority.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ to set.
priNum – Priority number set to interrupt controller register.

Return values:

kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.

static inline status_t IRQ_ClearPendingIRQ(IRQn_Type interrupt)#

Clear the pending IRQ flag.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The flag which IRQ to clear.

Return values:

kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.

static inline uint32_t DisableGlobalIRQ(void)#

Disable the global IRQ.

Disable the global interrupt and return the current primask register. User is required to provided the primask register for the EnableGlobalIRQ().

Returns:: Current primask value.

static inline void EnableGlobalIRQ(uint32_t primask)#

Enable the global IRQ.

Set the primask register with the provided primask value but not just enable the primask. The idea is for the convenience of integration of RTOS. some RTOS get its own management mechanism of primask. User is required to use the EnableGlobalIRQ() and DisableGlobalIRQ() in pair.

Parameters:

primask – value of primask register to be restored. The primask value is supposed to be provided by the DisableGlobalIRQ().

static inline bool _SDK_AtomicLocalCompareAndSet(uint32_t *addr, uint32_t expected, uint32_t newValue)#

static inline uint32_t _SDK_AtomicTestAndSet(uint32_t *addr, uint32_t newValue)#

FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ#: Macro to use the default weak IRQ handler in drivers.

MAKE_STATUS(group, code)#: Construct a status code value from a group and code number.

MAKE_VERSION(major, minor, bugfix)#

Construct the version number for drivers.

The driver version is a 32-bit number, for both 32-bit platforms(such as Cortex M) and 16-bit platforms(such as DSC).

| Unused    || Major Version || Minor Version ||  Bug Fix    |
31        25  24           17  16            9  8            0

ARRAY_SIZE(x)#: Computes the number of elements in an array.

SUPPRESS_FALL_THROUGH_WARNING()#: For switch case code block, if case section ends without “break;” statement, there wil be fallthrough warning with compiler flag -Wextra or -Wimplicit-fallthrough=n when using armgcc. To suppress this warning, “SUPPRESS_FALL_THROUGH_WARNING();” need to be added at the end of each case section which misses “break;”statement.

MSDK_REG_SECURE_ADDR(x)#: Convert the register address to the one used in secure mode.

MSDK_REG_NONSECURE_ADDR(x)#: Convert the register address to the one used in non-secure mode.

MSDK_HAS_DWT_CYCCNT#: The chip supports DWT CYCCNT or not.

MSDK_INVALID_IRQ_HANDLER#: Invalid IRQ handler address.

GPIO: General Purpose I/O#

void GPIO_PortInit(GPIO_Type *base, uint32_t port)#

Initializes the GPIO peripheral.

This function ungates the GPIO clock.

Parameters:

base – GPIO peripheral base pointer.
port – GPIO port number.

void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_config_t *config)#

Initializes a GPIO pin used by the board.

To initialize the GPIO, define a pin configuration, either input or output, in the user file. Then, call the GPIO_PinInit() function.

This is an example to define an input pin or output pin configuration:

Define a digital input pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalInput,
  0,
}
Define a digital output pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalOutput,
  0,
}

Parameters:

base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
pin – GPIO pin number
config – GPIO pin configuration pointer

static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t port, uint32_t pin, uint8_t output)#

Sets the output level of the one GPIO pin to the logic 1 or 0.

Parameters:

base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
pin – GPIO pin number
output – GPIO pin output logic level.
- 0: corresponding pin output low-logic level.
- 1: corresponding pin output high-logic level.

static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t port, uint32_t pin)#

Reads the current input value of the GPIO PIN.

Parameters:

base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
pin – GPIO pin number

Return values:

GPIO – port input value

0: corresponding pin input low-logic level.
1: corresponding pin input high-logic level.

FSL_GPIO_DRIVER_VERSION#: LPC GPIO driver version.

enum _gpio_pin_direction#

LPC GPIO direction definition.

Values:

enumerator kGPIO_DigitalInput#: Set current pin as digital input

enumerator kGPIO_DigitalOutput#: Set current pin as digital output

typedef enum _gpio_pin_direction gpio_pin_direction_t#: LPC GPIO direction definition.

typedef struct _gpio_pin_config gpio_pin_config_t#

The GPIO pin configuration structure.

Every pin can only be configured as either output pin or input pin at a time. If configured as a input pin, then leave the outputConfig unused.

static inline void GPIO_PortSet(GPIO_Type *base, uint32_t port, uint32_t mask)#

Sets the output level of the multiple GPIO pins to the logic 1.

Parameters:

base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
mask – GPIO pin number macro

static inline void GPIO_PortClear(GPIO_Type *base, uint32_t port, uint32_t mask)#

Sets the output level of the multiple GPIO pins to the logic 0.

Parameters:

base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
mask – GPIO pin number macro

static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t port, uint32_t mask)#

Reverses current output logic of the multiple GPIO pins.

Parameters:

base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
mask – GPIO pin number macro

struct _gpio_pin_config#

#include <fsl_gpio.h>

The GPIO pin configuration structure.

Every pin can only be configured as either output pin or input pin at a time. If configured as a input pin, then leave the outputConfig unused.

Public Members

gpio_pin_direction_t pinDirection#: GPIO direction, input or output

uint8_t outputLogic#: Set default output logic, no use in input

IOCON: I/O pin configuration#

FSL_IOCON_DRIVER_VERSION#: IOCON driver version.

typedef struct _iocon_group iocon_group_t#: Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format.

__STATIC_INLINE void IOCON_PinMuxSet (IOCON_Type *base, uint8_t port, uint8_t pin, uint32_t modefunc)

Sets I/O Control pin mux.

Parameters:

base – : The base of IOCON peripheral on the chip
port – : GPIO port to mux
pin – : GPIO pin to mux
modefunc – : OR’ed values of type IOCON_*

Returns:

Nothing

__STATIC_INLINE void IOCON_SetPinMuxing (IOCON_Type *base, const iocon_group_t *pinArray, uint32_t arrayLength)

Set all I/O Control pin muxing.

Parameters:

base – : The base of IOCON peripheral on the chip
pinArray – : Pointer to array of pin mux selections
arrayLength – : Number of entries in pinArray

Returns:

Nothing

FSL_COMPONENT_ID#

IOCON_FUNC0#: IOCON function and mode selection definitions.

Note

See the User Manual for specific modes and functions supported by the various pins. Selects pin function 0

IOCON_FUNC1#: Selects pin function 1

IOCON_FUNC2#: Selects pin function 2

IOCON_FUNC3#: Selects pin function 3

IOCON_FUNC4#: Selects pin function 4

IOCON_FUNC5#: Selects pin function 5

IOCON_FUNC6#: Selects pin function 6

IOCON_FUNC7#: Selects pin function 7

struct _iocon_group#: #include <fsl_iocon.h>

Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format.

Mailbox#

static inline void MAILBOX_Init(MAILBOX_Type *base)#

Initializes the MAILBOX module.

This function enables the MAILBOX clock only.

Parameters:

base – MAILBOX peripheral base address.

static inline void MAILBOX_Deinit(MAILBOX_Type *base)#

De-initializes the MAILBOX module.

This function disables the MAILBOX clock only.

Parameters:

base – MAILBOX peripheral base address.

FSL_MAILBOX_DRIVER_VERSION#: MAILBOX driver version.

static inline uint32_t MAILBOX_GetMutex(MAILBOX_Type *base)#

Get MUTEX state and lock mutex.

Note

Returns ‘1’ if the mutex was taken or ‘0’ if another resources has the mutex locked. Once a mutex is taken, it can be returned with the MAILBOX_SetMutex() function.

Parameters:

base – MAILBOX peripheral base address.

Returns:

See note

static inline void MAILBOX_SetMutex(MAILBOX_Type *base)#

Set MUTEX state.

Note

Sets mutex state to ‘1’ and allows other resources to get the mutex.

Parameters:

base – MAILBOX peripheral base address.

FSL_COMPONENT_ID

MRT: Multi-Rate Timer#

void MRT_Init(MRT_Type *base, const mrt_config_t *config)#

Ungates the MRT clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application using the MRT driver.

Parameters:

base – Multi-Rate timer peripheral base address
config – Pointer to user’s MRT config structure. If MRT has MULTITASK bit field in MODCFG reigster, param config is useless.

void MRT_Deinit(MRT_Type *base)#

Gate the MRT clock.

Parameters:

base – Multi-Rate timer peripheral base address

static inline void MRT_GetDefaultConfig(mrt_config_t *config)#

Fill in the MRT config struct with the default settings.

The default values are:

config->enableMultiTask = false;

Parameters:

config – Pointer to user’s MRT config structure.

static inline void MRT_SetupChannelMode(MRT_Type *base, mrt_chnl_t channel, const mrt_timer_mode_t mode)#

Sets up an MRT channel mode.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Channel that is being configured.
mode – Timer mode to use for the channel.

static inline void MRT_EnableInterrupts(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)#

Enables the MRT interrupt.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number
mask – The interrupts to enable. This is a logical OR of members of the enumeration mrt_interrupt_enable_t

static inline void MRT_DisableInterrupts(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)#

Disables the selected MRT interrupt.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number
mask – The interrupts to disable. This is a logical OR of members of the enumeration mrt_interrupt_enable_t

static inline uint32_t MRT_GetEnabledInterrupts(MRT_Type *base, mrt_chnl_t channel)#

Gets the enabled MRT interrupts.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration mrt_interrupt_enable_t

static inline uint32_t MRT_GetStatusFlags(MRT_Type *base, mrt_chnl_t channel)#

Gets the MRT status flags.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number

Returns:

The status flags. This is the logical OR of members of the enumeration mrt_status_flags_t

static inline void MRT_ClearStatusFlags(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)#

Clears the MRT status flags.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number
mask – The status flags to clear. This is a logical OR of members of the enumeration mrt_status_flags_t

void MRT_UpdateTimerPeriod(MRT_Type *base, mrt_chnl_t channel, uint32_t count, bool immediateLoad)#

Used to update the timer period in units of count.

The new value will be immediately loaded or will be loaded at the end of the current time interval. For one-shot interrupt mode the new value will be immediately loaded.

Note

User can call the utility macros provided in fsl_common.h to convert to ticks

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number
count – Timer period in units of ticks
immediateLoad – true: Load the new value immediately into the TIMER register; false: Load the new value at the end of current timer interval

static inline uint32_t MRT_GetCurrentTimerCount(MRT_Type *base, mrt_chnl_t channel)#

Reads the current timer counting value.

This function returns the real-time timer counting value, in a range from 0 to a timer period.

Note

User can call the utility macros provided in fsl_common.h to convert ticks to usec or msec

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number

Returns:

Current timer counting value in ticks

static inline void MRT_StartTimer(MRT_Type *base, mrt_chnl_t channel, uint32_t count)#

Starts the timer counting.

After calling this function, timers load period value, counts down to 0 and depending on the timer mode it will either load the respective start value again or stop.

Note

User can call the utility macros provided in fsl_common.h to convert to ticks

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number.
count – Timer period in units of ticks. Count can contain the LOAD bit, which control the force load feature.

static inline void MRT_StopTimer(MRT_Type *base, mrt_chnl_t channel)#

Stops the timer counting.

This function stops the timer from counting.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number.

static inline uint32_t MRT_GetIdleChannel(MRT_Type *base)#

Find the available channel.

This function returns the lowest available channel number.

Parameters:

base – Multi-Rate timer peripheral base address

static inline void MRT_ReleaseChannel(MRT_Type *base, mrt_chnl_t channel)#

Release the channel when the timer is using the multi-task mode.

In multi-task mode, the INUSE flags allow more control over when MRT channels are released for further use. The user can hold on to a channel acquired by calling MRT_GetIdleChannel() for as long as it is needed and release it by calling this function. This removes the need to ask for an available channel for every use.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number.

FSL_MRT_DRIVER_VERSION#

enum _mrt_chnl#

List of MRT channels.

Values:

enumerator kMRT_Channel_0#: MRT channel number 0

enumerator kMRT_Channel_1#: MRT channel number 1

enumerator kMRT_Channel_2#: MRT channel number 2

enumerator kMRT_Channel_3#: MRT channel number 3

enum _mrt_timer_mode#

List of MRT timer modes.

Values:

enumerator kMRT_RepeatMode#: Repeat Interrupt mode

enumerator kMRT_OneShotMode#: One-shot Interrupt mode

enumerator kMRT_OneShotStallMode#: One-shot stall mode

enum _mrt_interrupt_enable#

List of MRT interrupts.

Values:

enumerator kMRT_TimerInterruptEnable#: Timer interrupt enable

enum _mrt_status_flags#

List of MRT status flags.

Values:

enumerator kMRT_TimerInterruptFlag#: Timer interrupt flag

enumerator kMRT_TimerRunFlag#: Indicates state of the timer

typedef enum _mrt_chnl mrt_chnl_t#: List of MRT channels.

typedef enum _mrt_timer_mode mrt_timer_mode_t#: List of MRT timer modes.

typedef enum _mrt_interrupt_enable mrt_interrupt_enable_t#: List of MRT interrupts.

typedef enum _mrt_status_flags mrt_status_flags_t#: List of MRT status flags.

typedef struct _mrt_config mrt_config_t#

MRT configuration structure.

This structure holds the configuration settings for the MRT peripheral. To initialize this structure to reasonable defaults, call the MRT_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

struct _mrt_config#

#include <fsl_mrt.h>

MRT configuration structure.

The config struct can be made const so it resides in flash

Public Members

bool enableMultiTask#: true: Timers run in multi-task mode; false: Timers run in hardware status mode

OSTIMER: OS Event Timer Driver#

void OSTIMER_Init(OSTIMER_Type *base)#: Initializes an OSTIMER by turning its bus clock on.

void OSTIMER_Deinit(OSTIMER_Type *base)#

Deinitializes a OSTIMER instance.

This function shuts down OSTIMER bus clock

Parameters:

base – OSTIMER peripheral base address.

uint64_t OSTIMER_GrayToDecimal(uint64_t gray)#

Translate the value from gray-code to decimal.

Parameters:

gray – The gray value input.

Returns:

The decimal value.

static inline uint64_t OSTIMER_DecimalToGray(uint64_t dec)#

Translate the value from decimal to gray-code.

Parameters:

dec – The decimal value.

Returns:

The gray code of the input value.

uint32_t OSTIMER_GetStatusFlags(OSTIMER_Type *base)#

Get OSTIMER status Flags.

This returns the status flag. Currently, only match interrupt flag can be got.

Parameters:

base – OSTIMER peripheral base address.

Returns:

status register value

void OSTIMER_ClearStatusFlags(OSTIMER_Type *base, uint32_t mask)#

Clear Status Interrupt Flags.

This clears interrupt status flag. Currently, only match interrupt flag can be cleared.

Parameters:

base – OSTIMER peripheral base address.
mask – Clear bit mask.

Returns:

none

status_t OSTIMER_SetMatchRawValue(OSTIMER_Type *base, uint64_t count, ostimer_callback_t cb)#

Set the match raw value for OSTIMER.

This function will set a match value for OSTIMER with an optional callback. And this callback will be called while the data in dedicated pair match register is equals to the value of central EVTIMER. Please note that, the data format may be gray-code, if so, please use OSTIMER_SetMatchValue().

Parameters:

base – OSTIMER peripheral base address.
count – OSTIMER timer match value.(Value may be gray-code format)
cb – OSTIMER callback (can be left as NULL if none, otherwise should be a void func(void)).

Return values:

kStatus_Success – Match raw value written and interrupt enabled successfully.

status_t OSTIMER_SetMatchValue(OSTIMER_Type *base, uint64_t count, ostimer_callback_t cb)#

Set the match value for OSTIMER.

This function will set a match value for OSTIMER with an optional callback. And this callback will be called while the data in dedicated pair match register is equals to the value of central EVTIMER.

The function disables the match interrupt before writing the match registers and re-enables it immediately after. This function is suitable when the delta between the current timer value and count is comfortably larger than the match-register synchronisation latency (more than 7 OSTimer ticks). However, it does NOT wait for OSEVENT_CTRL[MATCH_WR_RDY]) after writing MATCH, and it does NOT check whether the requested match time has already passed. If there is any possibility that count is close to or has already passed the current timer value, use OSTIMER_SetMatchValueSafe() instead, which polls MATCH_WR_RDY and checks whether the match moment has been missed.

Parameters:

base – OSTIMER peripheral base address.
count – Match value in decimal (binary) format. The driver converts to Gray code internally when the hardware counter is Gray-encoded.
cb – OSTIMER callback (can be left as NULL if none, otherwise should be a void func(void)).

Return values:

kStatus_Success – Match value written and interrupt enabled successfully.

status_t OSTIMER_SetMatchValueSafe(OSTIMER_Type *base, uint64_t count, ostimer_callback_t cb)#

Set the match value for OSTIMER with full synchronisation and missed-event detection.

This function will set a match value for OSTIMER with an optional callback. And this callback will be called while the data in dedicated pair match register is equals to the value of central EVTIMER.

Unlike OSTIMER_SetMatchValue(), this function performs the following additional steps after writing the match registers:

Wait for write synchronisation (MATCH_WR_RDY). On devices that expose OSEVENT_CTRL[MATCH_WR_RDY], the function spins until that bit is cleared, which indicates that the written value has been transferred from the shadow registers to the active compare registers in the OSTimer clock domain. This eliminates the race condition where the timer advances past the match value before the hardware has latched it.
Check whether the match moment has already been missed. After MATCH_WR_RDY clears, the function reads the current timer value and compares it with count:
- If the current timer value is still below count, the match has not yet occurred. The interrupt is enabled and the function returns kStatus_Success.
- If the current timer value has reached or passed count:
  - If the hardware interrupt flag (OSTIMER_INTRFLAG) is already set, the match event was captured by hardware. The interrupt is enabled so the pending flag triggers the ISR, and the function returns kStatus_Success.
  - If the interrupt flag is NOT set, the match moment passed without the hardware capturing it (the compare logic had not yet latched the value when the timer advanced). The interrupt is left DISABLED and the function returns kStatus_Fail. The caller is responsible for handling this missed event, for example by scheduling a new match immediately or executing the intended action directly.

Note

This function is recommended whenever the requested match delta is small or unpredictable relative to the OSTimer source clock period. If the overhead of polling MATCH_WR_RDY is unacceptable (e.g. at 32 KHz with tight real-time constraints), use OSTIMER_SetMatchValue() and ensure the match delta is always large enough.

Parameters:

base – OSTIMER peripheral base address.
count – Match value in decimal (binary) format. The driver converts to Gray code internally when the hardware counter is Gray-encoded.
cb – OSTIMER callback (can be left as NULL if none, otherwise should be a void func(void)).

Return values:

kStatus_Success – Match value written and interrupt enabled. The match event will occur in the future, or the hardware interrupt flag was already set and the pending interrupt will fire immediately upon enabling.
kStatus_Fail – Match time already passed and the hardware interrupt flag was not set. The interrupt remains disabled. The caller must handle the missed event.

static inline void OSTIMER_SetMatchRegister(OSTIMER_Type *base, uint64_t value)#

Set value to OSTIMER MATCH register directly.

This function writes the input value to OSTIMER MATCH register directly, it does not touch any other registers. Note that, the data format is gray-code if the hardware register is gray-encoded. The function OSTIMER_DecimalToGray could convert decimal value to gray code.

Parameters:

base – OSTIMER peripheral base address.
value – OSTIMER timer match value (Value is gray-code format if the hardware register is gray-encoded).

static inline uint64_t OSTIMER_GetMatchRegister(OSTIMER_Type *base)#

Get the match value from OSTIMER.

This function will get the match value from OSTIMER. The value of timer match is gray code format if the hardware is Gray-encoded.

Parameters:

base – OSTIMER peripheral base address.

Returns:

Value of match register, data format is gray code if the register is Gray-encoded.

static inline uint64_t OSTIMER_GetMatchValue(OSTIMER_Type *base)#

Get the match value from OSTIMER.

This function will get a match value from OSTIMER.

Parameters:

base – OSTIMER peripheral base address.

Returns:

Value of match register in decimal format.

static inline void OSTIMER_EnableMatchInterrupt(OSTIMER_Type *base)#

Enable the OSTIMER counter match interrupt.

Enable the timer counter match interrupt. The interrupt happens when OSTIMER counter matches the value in MATCH registers.

Parameters:

base – OSTIMER peripheral base address.

static inline void OSTIMER_DisableMatchInterrupt(OSTIMER_Type *base)#

Disable the OSTIMER counter match interrupt.

Disable the timer counter match interrupt. The interrupt happens when OSTIMER counter matches the value in MATCH registers.

Parameters:

base – OSTIMER peripheral base address.

static inline uint64_t OSTIMER_GetCurrentTimerRawValue(OSTIMER_Type *base)#

Get current timer raw count value from OSTIMER.

This function will get the timer count value from OS timer register. The raw value of timer count may be gray code format.

Parameters:

base – OSTIMER peripheral base address.

Returns:

Raw value of OSTIMER, may be gray code format if the hardware register is Gray-encoded.

uint64_t OSTIMER_GetCurrentTimerValue(OSTIMER_Type *base)#

Get current timer count value from OSTIMER.

This function will get a decimal timer count value. If the RAW value of timer count is gray code format, it will be translated to decimal data internally.

Parameters:

base – OSTIMER peripheral base address.

Returns:

Value of OSTIMER which will be formated to decimal value.

static inline uint64_t OSTIMER_GetCaptureRawValue(OSTIMER_Type *base)#

Get the capture value from OSTIMER.

This function will get a captured value from OSTIMER. The Raw value of timer capture may be gray code format if the hardware register is Gray-encoded.

Parameters:

base – OSTIMER peripheral base address.

Returns:

Raw value of capture register, data format may be gray code if the hardware register is Gray-encoded.

uint64_t OSTIMER_GetCaptureValue(OSTIMER_Type *base)#

Get the capture value from OSTIMER.

This function will get a capture decimal-value from OSTIMER. If the RAW value of timer count is gray code format, it will be translated to decimal data internally.

Parameters:

base – OSTIMER peripheral base address.

Returns:

Value of capture register, data format is decimal.

void OSTIMER_HandleIRQ(OSTIMER_Type *base, ostimer_callback_t cb)#

OS timer interrupt Service Handler.

This function handles the interrupt and refers to the callback array in the driver to callback user (as per request in OSTIMER_SetMatchValue()). if no user callback is scheduled, the interrupt will simply be cleared.

Parameters:

base – OS timer peripheral base address.
cb – callback scheduled for this instance of OS timer

Returns:

none

void OSTIMER_DriverIRQHandler(uint32_t instance)#

OSTIMER parameterized IRQ handler entry.

Parameters:

instance – OSTIMER instance index.

FSL_OSTIMER_DRIVER_VERSION#: OSTIMER driver version.

enum _ostimer_flags#

OSTIMER status flags.

Values:

enumerator kOSTIMER_MatchInterruptFlag#: Match interrupt flag bit, sets if the match value was reached.

typedef void (*ostimer_callback_t)(void)#: ostimer callback function.

PINT: Pin Interrupt and Pattern Match Driver#

FSL_PINT_DRIVER_VERSION#

enum _pint_pin_enable#

PINT Pin Interrupt enable type.

Values:

enumerator kPINT_PinIntEnableNone#: Do not generate Pin Interrupt

enumerator kPINT_PinIntEnableRiseEdge#: Generate Pin Interrupt on rising edge

enumerator kPINT_PinIntEnableFallEdge#: Generate Pin Interrupt on falling edge

enumerator kPINT_PinIntEnableBothEdges#: Generate Pin Interrupt on both edges

enumerator kPINT_PinIntEnableLowLevel#: Generate Pin Interrupt on low level

enumerator kPINT_PinIntEnableHighLevel#: Generate Pin Interrupt on high level

enum _pint_int#

PINT Pin Interrupt type.

Values:

enumerator kPINT_PinInt0#: Pin Interrupt 0

enumerator kPINT_SecPinInt0#: Secure Pin Interrupt 0

enum _pint_pmatch_input_src#

PINT Pattern Match bit slice input source type.

Values:

enumerator kPINT_PatternMatchInp0Src#: Input source 0

enumerator kPINT_PatternMatchInp1Src#: Input source 1

enumerator kPINT_PatternMatchInp2Src#: Input source 2

enumerator kPINT_PatternMatchInp3Src#: Input source 3

enumerator kPINT_PatternMatchInp4Src#: Input source 4

enumerator kPINT_PatternMatchInp5Src#: Input source 5

enumerator kPINT_PatternMatchInp6Src#: Input source 6

enumerator kPINT_PatternMatchInp7Src#: Input source 7

enumerator kPINT_SecPatternMatchInp0Src#: Input source 0

enumerator kPINT_SecPatternMatchInp1Src#: Input source 1

enum _pint_pmatch_bslice#

PINT Pattern Match bit slice type.

Values:

enumerator kPINT_PatternMatchBSlice0#: Bit slice 0

enumerator kPINT_SecPatternMatchBSlice0#: Bit slice 0

enum _pint_pmatch_bslice_cfg#

PINT Pattern Match configuration type.

Values:

enumerator kPINT_PatternMatchAlways#: Always Contributes to product term match

enumerator kPINT_PatternMatchStickyRise#: Sticky Rising edge

enumerator kPINT_PatternMatchStickyFall#: Sticky Falling edge

enumerator kPINT_PatternMatchStickyBothEdges#: Sticky Rising or Falling edge

enumerator kPINT_PatternMatchHigh#: High level

enumerator kPINT_PatternMatchLow#: Low level

enumerator kPINT_PatternMatchNever#: Never contributes to product term match

enumerator kPINT_PatternMatchBothEdges#: Either rising or falling edge

typedef enum _pint_pin_enable pint_pin_enable_t#: PINT Pin Interrupt enable type.

typedef enum _pint_int pint_pin_int_t#: PINT Pin Interrupt type.

typedef enum _pint_pmatch_input_src pint_pmatch_input_src_t#: PINT Pattern Match bit slice input source type.

typedef enum _pint_pmatch_bslice pint_pmatch_bslice_t#: PINT Pattern Match bit slice type.

typedef enum _pint_pmatch_bslice_cfg pint_pmatch_bslice_cfg_t#: PINT Pattern Match configuration type.

typedef struct _pint_status pint_status_t#: PINT event status.

typedef void (*pint_cb_t)(pint_pin_int_t pintr, pint_status_t *status)#: PINT Callback function.

typedef struct _pint_pmatch_cfg pint_pmatch_cfg_t#

void PINT_Init(PINT_Type *base)#

Initialize PINT peripheral.

This function initializes the PINT peripheral and enables the clock.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

void PINT_SetCallback(PINT_Type *base, pint_cb_t callback)#

Set PINT callback.

This function set the callback for PINT interupt handler.

Parameters:

base – Base address of the PINT peripheral.
callback – Callback.

Return values:

None. –

void PINT_PinInterruptConfig(PINT_Type *base, pint_pin_int_t intr, pint_pin_enable_t enable)#

Configure PINT peripheral pin interrupt.

This function configures a given pin interrupt.

Parameters:

base – Base address of the PINT peripheral.
intr – Pin interrupt.
enable – Selects detection logic.

Return values:

None. –

void PINT_PinInterruptGetConfig(PINT_Type *base, pint_pin_int_t pintr, pint_pin_enable_t *enable)#

Get PINT peripheral pin interrupt configuration.

This function returns the configuration of a given pin interrupt.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.
enable – Pointer to store the detection logic.

Return values:

None. –

void PINT_PinInterruptClrStatus(PINT_Type *base, pint_pin_int_t pintr)#

Clear Selected pin interrupt status only when the pin was triggered by edge-sensitive.

This function clears the selected pin interrupt status.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.

Return values:

None. –

static inline uint32_t PINT_PinInterruptGetStatus(PINT_Type *base, pint_pin_int_t pintr)#

Get Selected pin interrupt status.

This function returns the selected pin interrupt status.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.

Return values:

status – = 0 No pin interrupt request. = 1 Selected Pin interrupt request active.

void PINT_PinInterruptClrStatusAll(PINT_Type *base)#

Clear all pin interrupts status only when pins were triggered by edge-sensitive.

This function clears the status of all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

static inline uint32_t PINT_PinInterruptGetStatusAll(PINT_Type *base)#

Get all pin interrupts status.

This function returns the status of all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.

Return values:

status – Each bit position indicates the status of corresponding pin interrupt. = 0 No pin interrupt request. = 1 Pin interrupt request active.

static inline void PINT_PinInterruptClrFallFlag(PINT_Type *base, pint_pin_int_t pintr)#

Clear Selected pin interrupt fall flag.

This function clears the selected pin interrupt fall flag.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.

Return values:

None. –

static inline uint32_t PINT_PinInterruptGetFallFlag(PINT_Type *base, pint_pin_int_t pintr)#

Get selected pin interrupt fall flag.

This function returns the selected pin interrupt fall flag.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.

Return values:

flag – = 0 Falling edge has not been detected. = 1 Falling edge has been detected.

static inline void PINT_PinInterruptClrFallFlagAll(PINT_Type *base)#

Clear all pin interrupt fall flags.

This function clears the fall flag for all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

static inline uint32_t PINT_PinInterruptGetFallFlagAll(PINT_Type *base)#

Get all pin interrupt fall flags.

This function returns the fall flag of all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.

Return values:

flags – Each bit position indicates the falling edge detection of the corresponding pin interrupt. 0 Falling edge has not been detected. = 1 Falling edge has been detected.

static inline void PINT_PinInterruptClrRiseFlag(PINT_Type *base, pint_pin_int_t pintr)#

Clear Selected pin interrupt rise flag.

This function clears the selected pin interrupt rise flag.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.

Return values:

None. –

static inline uint32_t PINT_PinInterruptGetRiseFlag(PINT_Type *base, pint_pin_int_t pintr)#

Get selected pin interrupt rise flag.

This function returns the selected pin interrupt rise flag.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.

Return values:

flag – = 0 Rising edge has not been detected. = 1 Rising edge has been detected.

static inline void PINT_PinInterruptClrRiseFlagAll(PINT_Type *base)#

Clear all pin interrupt rise flags.

This function clears the rise flag for all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

static inline uint32_t PINT_PinInterruptGetRiseFlagAll(PINT_Type *base)#

Get all pin interrupt rise flags.

This function returns the rise flag of all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.

Return values:

flags – Each bit position indicates the rising edge detection of the corresponding pin interrupt. 0 Rising edge has not been detected. = 1 Rising edge has been detected.

void PINT_PatternMatchConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg)#

Configure PINT pattern match.

This function configures a given pattern match bit slice.

Parameters:

base – Base address of the PINT peripheral.
bslice – Pattern match bit slice number.
cfg – Pointer to bit slice configuration.

Return values:

None. –

void PINT_PatternMatchGetConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg)#

Get PINT pattern match configuration.

This function returns the configuration of a given pattern match bit slice.

Parameters:

base – Base address of the PINT peripheral.
bslice – Pattern match bit slice number.
cfg – Pointer to bit slice configuration.

Return values:

None. –

static inline uint32_t PINT_PatternMatchGetStatus(PINT_Type *base, pint_pmatch_bslice_t bslice)#

Get pattern match bit slice status.

This function returns the status of selected bit slice.

Parameters:

base – Base address of the PINT peripheral.
bslice – Pattern match bit slice number.

Return values:

status – = 0 Match has not been detected. = 1 Match has been detected.

static inline uint32_t PINT_PatternMatchGetStatusAll(PINT_Type *base)#

Get status of all pattern match bit slices.

This function returns the status of all bit slices.

Parameters:

base – Base address of the PINT peripheral.

Return values:

status – Each bit position indicates the match status of corresponding bit slice. = 0 Match has not been detected. = 1 Match has been detected.

uint32_t PINT_PatternMatchResetDetectLogic(PINT_Type *base)#

Reset pattern match detection logic.

This function resets the pattern match detection logic if any of the product term is matching.

Parameters:

base – Base address of the PINT peripheral.

Return values:

pmstatus – Each bit position indicates the match status of corresponding bit slice. = 0 Match was detected. = 1 Match was not detected.

static inline void PINT_PatternMatchEnable(PINT_Type *base)#

Enable pattern match function.

This function enables the pattern match function.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

static inline void PINT_PatternMatchDisable(PINT_Type *base)#

Disable pattern match function.

This function disables the pattern match function.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

static inline void PINT_PatternMatchEnableRXEV(PINT_Type *base)#

Enable RXEV output.

This function enables the pattern match RXEV output.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

static inline void PINT_PatternMatchDisableRXEV(PINT_Type *base)#

Disable RXEV output.

This function disables the pattern match RXEV output.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

void PINT_EnableCallback(PINT_Type *base)#

Enable callback.

This function enables the interrupt for the selected PINT peripheral. Although the pin(s) are monitored as soon as they are enabled, the callback function is not enabled until this function is called.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

void PINT_DisableCallback(PINT_Type *base)#

Disable callback.

This function disables the interrupt for the selected PINT peripheral. Although the pins are still being monitored but the callback function is not called.

Parameters:

base – Base address of the peripheral.

Return values:

None. –

void PINT_Deinit(PINT_Type *base)#

Deinitialize PINT peripheral.

This function disables the PINT clock.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

void PINT_EnableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx)#

enable callback by pin index.

This function enables callback by pin index instead of enabling all pins.

Parameters:

base – Base address of the peripheral.
pintIdx – pin index.

Return values:

None. –

void PINT_EnableInterruptByIndex(PINT_Type *base, pint_pin_int_t pintIdx)#

enable interrupt in NVIC by pin index.

This function enables the interrupt in the NVIC. The difference with PINT_EnableCallbackByIndex() is that PINT_EnableCallbackByIndex() not only enables the interrupt in the NVIC but also clears pending interrupts. Use this function together with PINT_DisableInterruptByIndex() to temporarily disable/enable the pin interrupt. Use PINT_EnableCallbackByIndex() to enable the interrupt after installing the callback.

Parameters:

base – Base address of the peripheral.
pinIdx – pin index.

Return values:

None. –

void PINT_DisableInterruptByIndex(PINT_Type *base, pint_pin_int_t pintIdx)#

disable interrupt in NVIC by pin index.

This function disables the interrupt in the NVIC. The difference with PINT_DisableCallbackByIndex() is that PINT_DisableCallbackByIndex() not only disables the interrupt in the NVIC but also clears pending interrupts. Use this function together with PINT_EnableInterruptByIndex() to temporarily disable/enable the pin interrupt. Use PINT_DisableCallbackByIndex() to disable the interrupt in a de-init function.

Parameters:

base – Base address of the peripheral.
pinIdx – pin index.

Return values:

None. –

void PINT_DisableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx)#

disable callback by pin index.

This function disables callback by pin index instead of disabling all pins.

Parameters:

base – Base address of the peripheral.
pintIdx – pin index.

Return values:

None. –

void PINT_DriverIRQHandler(uint32_t instance)#

PINT parameterized IRQ handler entry.

Parameters:

instance – PINT instance index.

PINT_USE_LEGACY_CALLBACK#

PININT_BITSLICE_SRC_START#

PININT_BITSLICE_SRC_MASK#

PININT_BITSLICE_CFG_START#

PININT_BITSLICE_CFG_MASK#

PININT_BITSLICE_ENDP_MASK#

PINT_PIN_INT_LEVEL#

PINT_PIN_INT_EDGE#

PINT_PIN_INT_FALL_OR_HIGH_LEVEL#

PINT_PIN_INT_RISE#

PINT_PIN_RISE_EDGE#

PINT_PIN_FALL_EDGE#

PINT_PIN_BOTH_EDGE#

PINT_PIN_LOW_LEVEL#

PINT_PIN_HIGH_LEVEL#

struct _pint_status#: #include <fsl_pint.h>

PINT event status.

struct _pint_pmatch_cfg#

PLU: Programmable Logic Unit#

void PLU_Init(PLU_Type *base)#

Enable the PLU clock and reset the module.

Note

This API should be called at the beginning of the application using the PLU driver.

Parameters:

base – PLU peripheral base address

void PLU_Deinit(PLU_Type *base)#

Gate the PLU clock.

Parameters:

base – PLU peripheral base address

static inline void PLU_SetLutInputSource(PLU_Type *base, plu_lut_index_t lutIndex, plu_lut_in_index_t lutInIndex, plu_lut_input_source_t inputSrc)#

Set Input source of LUT.

Note: An external clock must be applied to the PLU_CLKIN input when using FFs. For each LUT, the slot associated with the output from LUTn itself is tied low.

Parameters:

base – PLU peripheral base address.
lutIndex – LUT index (see plu_lut_index_t typedef enumeration).
lutInIndex – LUT input index (see plu_lut_in_index_t typedef enumeration).
inputSrc – LUT input source (see plu_lut_input_source_t typedef enumeration).

static inline void PLU_SetOutputSource(PLU_Type *base, plu_output_index_t outputIndex, plu_output_source_t outputSrc)#

Set Output source of PLU.

Note: An external clock must be applied to the PLU_CLKIN input when using FFs.

Parameters:

base – PLU peripheral base address.
outputIndex – PLU output index (see plu_output_index_t typedef enumeration).
outputSrc – PLU output source (see plu_output_source_t typedef enumeration).

static inline void PLU_SetLutTruthTable(PLU_Type *base, plu_lut_index_t lutIndex, uint32_t truthTable)#

Set Truth Table of LUT.

Parameters:

base – PLU peripheral base address.
lutIndex – LUT index (see plu_lut_index_t typedef enumeration).
truthTable – Truth Table value.

static inline uint32_t PLU_ReadOutputState(PLU_Type *base)#

Read the current state of the 8 designated PLU Outputs.

Note: The PLU bus clock must be re-enabled prior to reading the Outpus Register if PLU bus clock is shut-off.

Parameters:

base – PLU peripheral base address.

Returns:

Current PLU output state value.

void PLU_GetDefaultWakeIntConfig(plu_wakeint_config_t *config)#

Gets an available pre-defined settings for wakeup/interrupt control.

This function initializes the initial configuration structure with an available settings. The default values are:

config->filterMode = kPLU_WAKEINT_FILTER_MODE_BYPASS;
config->clockSource = kPLU_WAKEINT_FILTER_CLK_SRC_1MHZ_LPOSC;

Parameters:

config – Pointer to configuration structure.

void PLU_EnableWakeIntRequest(PLU_Type *base, uint32_t interruptMask, const plu_wakeint_config_t *config)#

Enable PLU outputs wakeup/interrupt request.

This function enables Any of the eight selected PLU outputs to contribute to an asynchronous wake-up or an interrupt request.

Note: If a PLU_CLKIN is provided, the raw wake-up/interrupt request will be set on the rising-edge of the PLU_CLKIN whenever the raw request signal is high. This registered signal will be glitch-free and just use the default wakeint config by PLU_GetDefaultWakeIntConfig(). If not, have to specify the filter mode and clock source to eliminate the glitches caused by long and widely disparate delays through the network of LUTs making up the PLU. This way may increase power consumption in low-power operating modes and inject delay before the wake-up/interrupt request is generated.

Parameters:

base – PLU peripheral base address.
interruptMask – PLU interrupt mask (see _plu_interrupt_mask enumeration).
config – Pointer to configuration structure (see plu_wakeint_config_t typedef enumeration)

static inline void PLU_LatchInterrupt(PLU_Type *base)#

Latch an interrupt.

This function latches the interrupt and then it can be cleared with PLU_ClearLatchedInterrupt().

Note: This mode is not compatible with use of the glitch filter. If this bit is set, the FILTER MODE should be set to kPLU_WAKEINT_FILTER_MODE_BYPASS (Bypass Mode) and PLU_CLKIN should be provided. If this bit is set, the wake-up/interrupt request will be set on the rising-edge of PLU_CLKIN whenever the raw wake-up/interrupt signal is high. The request must be cleared by software.

Parameters:

base – PLU peripheral base address.

void PLU_ClearLatchedInterrupt(PLU_Type *base)#

Clear the latched interrupt.

This function clears the wake-up/interrupt request flag latched by PLU_LatchInterrupt()

Note: It is not necessary for the PLU bus clock to be enabled in order to write-to or read-back this bit.

Parameters:

base – PLU peripheral base address.

FSL_PLU_DRIVER_VERSION#: Version 2.2.1

enum _plu_lut_index#

Index of LUT.

Values:

enumerator kPLU_LUT_0#: 5-input Look-up Table 0

enumerator kPLU_LUT_1#: 5-input Look-up Table 1

enumerator kPLU_LUT_2#: 5-input Look-up Table 2

enumerator kPLU_LUT_3#: 5-input Look-up Table 3

enumerator kPLU_LUT_4#: 5-input Look-up Table 4

enumerator kPLU_LUT_5#: 5-input Look-up Table 5

enumerator kPLU_LUT_6#: 5-input Look-up Table 6

enumerator kPLU_LUT_7#: 5-input Look-up Table 7

enumerator kPLU_LUT_8#: 5-input Look-up Table 8

enumerator kPLU_LUT_9#: 5-input Look-up Table 9

enumerator kPLU_LUT_10#: 5-input Look-up Table 10

enumerator kPLU_LUT_11#: 5-input Look-up Table 11

enumerator kPLU_LUT_12#: 5-input Look-up Table 12

enumerator kPLU_LUT_13#: 5-input Look-up Table 13

enumerator kPLU_LUT_14#: 5-input Look-up Table 14

enumerator kPLU_LUT_15#: 5-input Look-up Table 15

enumerator kPLU_LUT_16#: 5-input Look-up Table 16

enumerator kPLU_LUT_17#: 5-input Look-up Table 17

enumerator kPLU_LUT_18#: 5-input Look-up Table 18

enumerator kPLU_LUT_19#: 5-input Look-up Table 19

enumerator kPLU_LUT_20#: 5-input Look-up Table 20

enumerator kPLU_LUT_21#: 5-input Look-up Table 21

enumerator kPLU_LUT_22#: 5-input Look-up Table 22

enumerator kPLU_LUT_23#: 5-input Look-up Table 23

enumerator kPLU_LUT_24#: 5-input Look-up Table 24

enumerator kPLU_LUT_25#: 5-input Look-up Table 25

enum _plu_lut_in_index#

Inputs of LUT. 5 input present for each LUT.

Values:

enumerator kPLU_LUT_IN_0#: LUT input 0

enumerator kPLU_LUT_IN_1#: LUT input 1

enumerator kPLU_LUT_IN_2#: LUT input 2

enumerator kPLU_LUT_IN_3#: LUT input 3

enumerator kPLU_LUT_IN_4#: LUT input 4

enum _plu_lut_input_source#

Available sources of LUT input.

Values:

enumerator kPLU_LUT_IN_SRC_PLU_IN_0#: Select PLU input 0 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_PLU_IN_1#: Select PLU input 1 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_PLU_IN_2#: Select PLU input 2 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_PLU_IN_3#: Select PLU input 3 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_PLU_IN_4#: Select PLU input 4 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_PLU_IN_5#: Select PLU input 5 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_0#: Select LUT output 0 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_1#: Select LUT output 1 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_2#: Select LUT output 2 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_3#: Select LUT output 3 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_4#: Select LUT output 4 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_5#: Select LUT output 5 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_6#: Select LUT output 6 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_7#: Select LUT output 7 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_8#: Select LUT output 8 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_9#: Select LUT output 9 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_10#: Select LUT output 10 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_11#: Select LUT output 11 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_12#: Select LUT output 12 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_13#: Select LUT output 13 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_14#: Select LUT output 14 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_15#: Select LUT output 15 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_16#: Select LUT output 16 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_17#: Select LUT output 17 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_18#: Select LUT output 18 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_19#: Select LUT output 19 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_20#: Select LUT output 20 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_21#: Select LUT output 21 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_22#: Select LUT output 22 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_23#: Select LUT output 23 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_24#: Select LUT output 24 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_LUT_OUT_25#: Select LUT output 25 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_FLIPFLOP_0#: Select Flip-Flops state 0 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_FLIPFLOP_1#: Select Flip-Flops state 1 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_FLIPFLOP_2#: Select Flip-Flops state 2 to be connected to LUTn Input x

enumerator kPLU_LUT_IN_SRC_FLIPFLOP_3#: Select Flip-Flops state 3 to be connected to LUTn Input x

enum _plu_output_index#

PLU output multiplexer registers.

Values:

enumerator kPLU_OUTPUT_0#: PLU OUTPUT 0

enumerator kPLU_OUTPUT_1#: PLU OUTPUT 1

enumerator kPLU_OUTPUT_2#: PLU OUTPUT 2

enumerator kPLU_OUTPUT_3#: PLU OUTPUT 3

enumerator kPLU_OUTPUT_4#: PLU OUTPUT 4

enumerator kPLU_OUTPUT_5#: PLU OUTPUT 5

enumerator kPLU_OUTPUT_6#: PLU OUTPUT 6

enumerator kPLU_OUTPUT_7#: PLU OUTPUT 7

enum _plu_output_source#

Available sources of PLU output.

Values:

enumerator kPLU_OUT_SRC_LUT_0#: Select LUT0 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_1#: Select LUT1 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_2#: Select LUT2 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_3#: Select LUT3 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_4#: Select LUT4 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_5#: Select LUT5 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_6#: Select LUT6 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_7#: Select LUT7 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_8#: Select LUT8 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_9#: Select LUT9 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_10#: Select LUT10 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_11#: Select LUT11 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_12#: Select LUT12 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_13#: Select LUT13 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_14#: Select LUT14 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_15#: Select LUT15 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_16#: Select LUT16 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_17#: Select LUT17 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_18#: Select LUT18 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_19#: Select LUT19 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_20#: Select LUT20 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_21#: Select LUT21 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_22#: Select LUT22 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_23#: Select LUT23 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_24#: Select LUT24 output to be connected to PLU output

enumerator kPLU_OUT_SRC_LUT_25#: Select LUT25 output to be connected to PLU output

enumerator kPLU_OUT_SRC_FLIPFLOP_0#: Select Flip-Flops state(0) to be connected to PLU output

enumerator kPLU_OUT_SRC_FLIPFLOP_1#: Select Flip-Flops state(1) to be connected to PLU output

enumerator kPLU_OUT_SRC_FLIPFLOP_2#: Select Flip-Flops state(2) to be connected to PLU output

enumerator kPLU_OUT_SRC_FLIPFLOP_3#: Select Flip-Flops state(3) to be connected to PLU output

enum _plu_interrupt_mask#

The enumerator of PLU Interrupt.

Values:

enumerator kPLU_OUTPUT_0_INTERRUPT_MASK#: Select PLU output 0 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_1_INTERRUPT_MASK#: Select PLU output 1 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_2_INTERRUPT_MASK#: Select PLU output 2 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_3_INTERRUPT_MASK#: Select PLU output 3 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_4_INTERRUPT_MASK#: Select PLU output 4 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_5_INTERRUPT_MASK#: Select PLU output 5 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_6_INTERRUPT_MASK#: Select PLU output 6 contribute to interrupt/wake-up generation

enumerator kPLU_OUTPUT_7_INTERRUPT_MASK#: Select PLU output 7 contribute to interrupt/wake-up generation

enum _plu_wakeint_filter_mode#

Control input of the PLU, add filtering for glitch.

Values:

enumerator kPLU_WAKEINT_FILTER_MODE_BYPASS#: Select Bypass mode

enumerator kPLU_WAKEINT_FILTER_MODE_1_CLK_PERIOD#: Filter 1 clock period

enumerator kPLU_WAKEINT_FILTER_MODE_2_CLK_PERIOD#: Filter 2 clock period

enumerator kPLU_WAKEINT_FILTER_MODE_3_CLK_PERIOD#: Filter 3 clock period

enum _plu_wakeint_filter_clock_source#

Clock source for filter mode.

Values:

enumerator kPLU_WAKEINT_FILTER_CLK_SRC_1MHZ_LPOSC#: Select the 1MHz low-power oscillator as the filter clock

enumerator kPLU_WAKEINT_FILTER_CLK_SRC_12MHZ_FRO#: Select the 12MHz FRO as the filer clock

enumerator kPLU_WAKEINT_FILTER_CLK_SRC_ALT#: Select a third clock source

typedef enum _plu_lut_index plu_lut_index_t#: Index of LUT.

typedef enum _plu_lut_in_index plu_lut_in_index_t#: Inputs of LUT. 5 input present for each LUT.

typedef enum _plu_lut_input_source plu_lut_input_source_t#: Available sources of LUT input.

typedef enum _plu_output_index plu_output_index_t#: PLU output multiplexer registers.

typedef enum _plu_output_source plu_output_source_t#: Available sources of PLU output.

typedef enum _plu_wakeint_filter_mode plu_wakeint_filter_mode_t#: Control input of the PLU, add filtering for glitch.

typedef enum _plu_wakeint_filter_clock_source plu_wakeint_filter_clock_source_t#: Clock source for filter mode.

typedef struct _plu_wakeint_config plu_wakeint_config_t#: Wake configuration.

struct _plu_wakeint_config#

#include <fsl_plu.h>

Wake configuration.

Public Members

plu_wakeint_filter_mode_t filterMode#: Filter Mode.

plu_wakeint_filter_clock_source_t clockSource#: The clock source for filter mode.

PUF: Physical Unclonable Function#

FSL_PUF_DRIVER_VERSION#

PUF driver version. Version 2.2.1.

Current version: 2.2.1

Change log:

2.0.0
- Initial version.
2.0.1
- Fixed puf_wait_usec function optimization issue.
2.0.2
- Add PUF configuration structure and support for PUF SRAM controller. Remove magic constants.
2.0.3
- Fix MISRA C-2012 issue.
2.1.0
- Align driver with PUF SRAM controller registers on LPCXpresso55s16.
- Update initizalition logic .
2.1.1
- Fix ARMGCC build warning .
2.1.2
- Update: Add automatic big to little endian swap for user (pre-shared) keys destinated to secret hardware bus (PUF key index 0).
2.1.3
- Fix MISRA C-2012 issue.
2.1.4
- Replace register uint32_t ticksCount with volatile uint32_t ticksCount in puf_wait_usec() to prevent optimization out delay loop.
2.1.5
- Use common SDK delay in puf_wait_usec()
2.1.6
- Changed wait time in PUF_Init(), when initialization fails it will try PUF_Powercycle() with shorter time. If this shorter time will also fail, initialization will be tried with worst case time as before.
2.2.0
Add support for kPUF_KeySlot4.
Add new PUF_ClearKey() function, that clears a desired PUF internal HW key register.
2.2.1
- Fix CERT-C violations (ARR30-C/OVERRUN in PUF_GetHwKey, INT30-C in PUF_GetKey).

enum _puf_key_index_register#

Values:

enumerator kPUF_KeyIndex_00#

enumerator kPUF_KeyIndex_01#

enumerator kPUF_KeyIndex_02#

enumerator kPUF_KeyIndex_03#

enumerator kPUF_KeyIndex_04#

enumerator kPUF_KeyIndex_05#

enumerator kPUF_KeyIndex_06#

enumerator kPUF_KeyIndex_07#

enumerator kPUF_KeyIndex_08#

enumerator kPUF_KeyIndex_09#

enumerator kPUF_KeyIndex_10#

enumerator kPUF_KeyIndex_11#

enumerator kPUF_KeyIndex_12#

enumerator kPUF_KeyIndex_13#

enumerator kPUF_KeyIndex_14#

enumerator kPUF_KeyIndex_15#

enum _puf_min_max#

Values:

enumerator kPUF_KeySizeMin#

enumerator kPUF_KeySizeMax#

enumerator kPUF_KeyIndexMax#

enum _puf_key_slot#

PUF key slot.

Values:

enumerator kPUF_KeySlot0#: PUF key slot 0

enumerator kPUF_KeySlot1#: PUF key slot 1

PUF status return codes.

Values:

enumerator kStatus_EnrollNotAllowed#

enumerator kStatus_StartNotAllowed#

typedef enum _puf_key_index_register puf_key_index_register_t#

typedef enum _puf_min_max puf_min_max_t#

typedef enum _puf_key_slot puf_key_slot_t#: PUF key slot.

PUF_GET_KEY_CODE_SIZE_FOR_KEY_SIZE(x)#: Get Key Code size in bytes from key size in bytes at compile time.

PUF_MIN_KEY_CODE_SIZE#

PUF_ACTIVATION_CODE_SIZE#

KEYSTORE_PUF_DISCHARGE_TIME_FIRST_TRY_MS#

KEYSTORE_PUF_DISCHARGE_TIME_MAX_MS#

struct puf_config_t#

RTC: Real Time Clock#

void RTC_Init(RTC_Type *base)#

Un-gate the RTC clock and enable the RTC oscillator.

Note

This API should be called at the beginning of the application using the RTC driver.

Parameters:

base – RTC peripheral base address

static inline void RTC_Deinit(RTC_Type *base)#

Stop the timer and gate the RTC clock.

Parameters:

base – RTC peripheral base address

status_t RTC_SetDatetime(RTC_Type *base, const rtc_datetime_t *datetime)#

Set the RTC date and time according to the given time structure.

The RTC counter must be stopped prior to calling this function as writes to the RTC seconds register will fail if the RTC counter is running.

Parameters:

base – RTC peripheral base address
datetime – Pointer to structure where the date and time details to set are stored

Returns:

kStatus_Success: Success in setting the time and starting the RTC kStatus_InvalidArgument: Error because the datetime format is incorrect

void RTC_GetDatetime(RTC_Type *base, rtc_datetime_t *datetime)#

Get the RTC time and stores it in the given time structure.

Parameters:

base – RTC peripheral base address
datetime – Pointer to structure where the date and time details are stored.

status_t RTC_SetAlarm(RTC_Type *base, const rtc_datetime_t *alarmTime)#

Set the RTC alarm time.

The function checks whether the specified alarm time is greater than the present time. If not, the function does not set the alarm and returns an error.

Parameters:

base – RTC peripheral base address
alarmTime – Pointer to structure where the alarm time is stored.

Returns:

kStatus_Success: success in setting the RTC alarm kStatus_InvalidArgument: Error because the alarm datetime format is incorrect kStatus_Fail: Error because the alarm time has already passed

void RTC_GetAlarm(RTC_Type *base, rtc_datetime_t *datetime)#

Return the RTC alarm time.

Parameters:

base – RTC peripheral base address
datetime – Pointer to structure where the alarm date and time details are stored.

static inline void RTC_EnableWakeupTimer(RTC_Type *base, bool enable)#

Enable the RTC wake-up timer (1KHZ).

After calling this function, the RTC driver will use/un-use the RTC wake-up (1KHZ) at the same time.

Parameters:

base – RTC peripheral base address
enable – Use/Un-use the RTC wake-up timer.
- true: Use RTC wake-up timer at the same time.
- false: Un-use RTC wake-up timer, RTC only use the normal seconds timer by default.

static inline uint32_t RTC_GetEnabledWakeupTimer(RTC_Type *base)#

Get the enabled status of the RTC wake-up timer (1KHZ).

Parameters:

base – RTC peripheral base address

Returns:

The enabled status of RTC wake-up timer (1KHZ).

static inline void RTC_EnableSubsecCounter(RTC_Type *base, bool enable)#

Enable the RTC Sub-second counter (32KHZ).

Note

Only enable sub-second counter after RTC_ENA bit has been set to 1.

Parameters:

base – RTC peripheral base address
enable – Enable/Disable RTC sub-second counter.
- true: Enable RTC sub-second counter.
- false: Disable RTC sub-second counter.

static inline uint32_t RTC_GetSubsecValue(const RTC_Type *base)#

A read of 32KHZ sub-seconds counter.

Parameters:

base – RTC peripheral base address

Returns:

Current value of the SUBSEC register

static inline void RTC_EnableWakeUpTimerInterruptFromDPD(RTC_Type *base, bool enable)#

Enable the wake-up timer interrupt from deep power down mode.

Parameters:

base – RTC peripheral base address
enable – Enable/Disable wake-up timer interrupt from deep power down mode.
- true: Enable wake-up timer interrupt from deep power down mode.
- false: Disable wake-up timer interrupt from deep power down mode.

static inline void RTC_EnableAlarmTimerInterruptFromDPD(RTC_Type *base, bool enable)#

Enable the alarm timer interrupt from deep power down mode.

Parameters:

base – RTC peripheral base address
enable – Enable/Disable alarm timer interrupt from deep power down mode.
- true: Enable alarm timer interrupt from deep power down mode.
- false: Disable alarm timer interrupt from deep power down mode.

static inline void RTC_EnableInterrupts(RTC_Type *base, uint32_t mask)#

Enables the selected RTC interrupts.

Deprecated:: Do not use this function. It has been superceded by RTC_EnableAlarmTimerInterruptFromDPD and RTC_EnableWakeUpTimerInterruptFromDPD

Parameters:

base – RTC peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration rtc_interrupt_enable_t

static inline void RTC_DisableInterrupts(RTC_Type *base, uint32_t mask)#

Disables the selected RTC interrupts.

Deprecated:: Do not use this function. It has been superceded by RTC_EnableAlarmTimerInterruptFromDPD and RTC_EnableWakeUpTimerInterruptFromDPD

Parameters:

base – RTC peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration rtc_interrupt_enable_t

static inline uint32_t RTC_GetEnabledInterrupts(RTC_Type *base)#

Get the enabled RTC interrupts.

Deprecated:: Do not use this function. It will be deleted in next release version.

Parameters:

base – RTC peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration rtc_interrupt_enable_t

static inline uint32_t RTC_GetStatusFlags(RTC_Type *base)#

Get the RTC status flags.

Parameters:

base – RTC peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration rtc_status_flags_t

static inline void RTC_ClearStatusFlags(RTC_Type *base, uint32_t mask)#

Clear the RTC status flags.

Parameters:

base – RTC peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration rtc_status_flags_t

static inline void RTC_EnableTimer(RTC_Type *base, bool enable)#

Enable the RTC timer counter.

After calling this function, the RTC inner counter increments once a second when only using the RTC seconds timer (1hz), while the RTC inner wake-up timer countdown once a millisecond when using RTC wake-up timer (1KHZ) at the same time. RTC timer contain two timers, one is the RTC normal seconds timer, the other one is the RTC wake-up timer, the RTC enable bit is the master switch for the whole RTC timer, so user can use the RTC seconds (1HZ) timer independly, but they can’t use the RTC wake-up timer (1KHZ) independently.

Parameters:

base – RTC peripheral base address
enable – Enable/Disable RTC Timer counter.
- true: Enable RTC Timer counter.
- false: Disable RTC Timer counter.

static inline void RTC_StartTimer(RTC_Type *base)#

Starts the RTC time counter.

Deprecated:: Do not use this function. It has been superceded by RTC_EnableTimer

After calling this function, the timer counter increments once a second provided SR[TOF] or SR[TIF] are not set.

Parameters:

base – RTC peripheral base address

static inline void RTC_StopTimer(RTC_Type *base)#

Stops the RTC time counter.

Deprecated:: Do not use this function. It has been superceded by RTC_EnableTimer

RTC’s seconds register can be written to only when the timer is stopped.

Parameters:

base – RTC peripheral base address

FSL_RTC_DRIVER_VERSION#: Version 2.2.0

enum _rtc_interrupt_enable#

List of RTC interrupts.

Values:

enumerator kRTC_AlarmInterruptEnable#: Alarm interrupt.

enumerator kRTC_WakeupInterruptEnable#: Wake-up interrupt.

enum _rtc_status_flags#

List of RTC flags.

Values:

enumerator kRTC_AlarmFlag#: Alarm flag

enumerator kRTC_WakeupFlag#: 1kHz wake-up timer flag

typedef enum _rtc_interrupt_enable rtc_interrupt_enable_t#: List of RTC interrupts.

typedef enum _rtc_status_flags rtc_status_flags_t#: List of RTC flags.

typedef struct _rtc_datetime rtc_datetime_t#: Structure is used to hold the date and time.

static inline void RTC_SetSecondsTimerMatch(RTC_Type *base, uint32_t matchValue)#

Set the RTC seconds timer (1HZ) MATCH value.

Parameters:

base – RTC peripheral base address
matchValue – The value to be set into the RTC MATCH register

static inline uint32_t RTC_GetSecondsTimerMatch(RTC_Type *base)#

Read actual RTC seconds timer (1HZ) MATCH value.

Parameters:

base – RTC peripheral base address

Returns:

The actual RTC seconds timer (1HZ) MATCH value.

static inline void RTC_SetSecondsTimerCount(RTC_Type *base, uint32_t countValue)#

Set the RTC seconds timer (1HZ) COUNT value.

Parameters:

base – RTC peripheral base address
countValue – The value to be loaded into the RTC COUNT register

static inline uint32_t RTC_GetSecondsTimerCount(RTC_Type *base)#

Read the actual RTC seconds timer (1HZ) COUNT value.

Parameters:

base – RTC peripheral base address

Returns:

The actual RTC seconds timer (1HZ) COUNT value.

static inline void RTC_SetWakeupCount(RTC_Type *base, uint16_t wakeupValue)#

Enable the RTC wake-up timer (1KHZ) and set countdown value to the RTC WAKE register.

Parameters:

base – RTC peripheral base address
wakeupValue – The value to be loaded into the WAKE register in RTC wake-up timer (1KHZ).

static inline uint16_t RTC_GetWakeupCount(RTC_Type *base)#

Read the actual value from the WAKE register value in RTC wake-up timer (1KHZ)

Read the WAKE register twice and compare the result, if the value match,the time can be used.

Parameters:

base – RTC peripheral base address

Returns:

The actual value of the WAKE register value in RTC wake-up timer (1KHZ).

static inline void RTC_Reset(RTC_Type *base)#

Perform a software reset on the RTC module.

This resets all RTC registers to their reset value. The bit is cleared by software explicitly clearing it.

Parameters:

base – RTC peripheral base address

struct _rtc_datetime#

#include <fsl_rtc.h>

Structure is used to hold the date and time.

Public Members

uint16_t year#: Range from 1970 to 2099.

uint8_t month#: Range from 1 to 12.

uint8_t day#: Range from 1 to 31 (depending on month).

uint8_t hour#: Range from 0 to 23.

uint8_t minute#: Range from 0 to 59.

uint8_t second#: Range from 0 to 59.

SCTimer: SCTimer/PWM (SCT)#

status_t SCTIMER_Init(SCT_Type *base, const sctimer_config_t *config)#

Ungates the SCTimer clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application using the SCTimer driver.

Parameters:

base – SCTimer peripheral base address
config – Pointer to the user configuration structure.

Returns:

kStatus_Success indicates success; Else indicates failure.

void SCTIMER_Deinit(SCT_Type *base)#

Gates the SCTimer clock.

Parameters:

base – SCTimer peripheral base address

void SCTIMER_GetDefaultConfig(sctimer_config_t *config)#

Fills in the SCTimer configuration structure with the default settings.

The default values are:

config->enableCounterUnify = true;
config->clockMode = kSCTIMER_System_ClockMode;
config->clockSelect = kSCTIMER_Clock_On_Rise_Input_0;
config->enableBidirection_l = false;
config->enableBidirection_h = false;
config->prescale_l = 0U;
config->prescale_h = 0U;
config->outInitState = 0U;
config->inputsync  = 0xFU;

Parameters:

config – Pointer to the user configuration structure.

status_t SCTIMER_SetupPwm(SCT_Type *base, const sctimer_pwm_signal_param_t *pwmParams, sctimer_pwm_mode_t mode, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz, uint32_t *event)#

Configures the PWM signal parameters.

Deprecated:: Use SCTIMER_SetupSharedPeriodPwm() instead. That function configures one channel per call and reuses a single shared period/limit event across same-frequency channels (N + 1 events for N channels instead of 2 * N), and returns the pulse event explicitly so the duty cycle can be updated with SCTIMER_UpdatePwmDutycycleByEvent(). This function remains functional for backward compatibility.

Call this function to configure the PWM signal period, mode, duty cycle, and edge. This function will create 2 events; one of the events will trigger on match with the pulse value and the other will trigger when the counter matches the PWM period. The PWM period event is also used as a limit event to reset the counter or change direction. Both events are enabled for the same state. The state number can be retrieved by calling the function SCTIMER_GetCurrentStateNumber(). The counter is set to operate as one 32-bit counter (unify bit is set to 1). The counter operates in bi-directional mode when generating a center-aligned PWM.

Note

When setting PWM output from multiple output pins, they all should use the same PWM mode i.e all PWM’s should be either edge-aligned or center-aligned. When using this API, the PWM signal frequency of all the initialized channels must be the same. Otherwise all the initialized channels’ PWM signal frequency is equal to the last call to the API’s pwmFreq_Hz.

Parameters:

base – SCTimer peripheral base address
pwmParams – PWM parameters to configure the output
mode – PWM operation mode, options available in enumeration sctimer_pwm_mode_t
pwmFreq_Hz – PWM signal frequency in Hz
srcClock_Hz – SCTimer counter clock in Hz
event – Pointer to a variable where the PWM period event number is stored

Returns:

kStatus_Success on success kStatus_Fail If we have hit the limit in terms of number of events created or if an incorrect PWM dutycylce is passed in.

void SCTIMER_UpdatePwmDutycycle(SCT_Type *base, sctimer_out_t output, uint8_t dutyCyclePercent, uint32_t event)#

Updates the duty cycle of an active PWM signal.

Deprecated:: Use SCTIMER_UpdatePwmDutycycleByEvent() instead. That function takes the period and pulse events explicitly (it does not assume the pulse event is event + 1), so it works with channels created by SCTIMER_SetupSharedPeriodPwm(), and it can update immediately or glitchlessly at the next period. This function remains functional for backward compatibility.

Before calling this function, the counter is set to operate as one 32-bit counter (unify bit is set to 1).

Parameters:

base – SCTimer peripheral base address
output – The output to configure
dutyCyclePercent – New PWM pulse width; the value should be between 1 to 100
event – Event number associated with this PWM signal. This was returned to the user by the function SCTIMER_SetupPwm().

status_t SCTIMER_SetupSharedPeriodPwm(SCT_Type *base, const sctimer_pwm_signal_param_t *pwmParam, sctimer_pwm_mode_t mode, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz, uint32_t *periodEvent, uint32_t *pulseEvent)#

Configures one PWM channel that shares an auto-detected period event across calls.

Unlike SCTIMER_SetupPwm() (which spends two events per channel and recreates a period event each call), this function configures a single channel and reuses one shared period/limit event for all same-frequency channels. On each call it inspects the unified-counter limit mask (LIMIT[LIMMSK_L]) for an existing period/limit event:

none present -> it creates the shared period/limit event (1 period + 1 pulse event), or
one present whose period (its MATCH value) and alignment (CTRL[BIDIR_L] set <=> center-aligned) match the requested pwmFreq_Hz/mode -> it reuses that event and only creates this channel’s pulse event (1 pulse event), or
one present whose period or alignment differs -> it returns kStatus_InvalidArgument without creating or modifying anything (two periods cannot share one unified counter).

So K same-frequency channels built by K calls consume K + 1 events / K + 1 match registers instead of 2 * K. A period/limit event left by a prior SCTIMER_SetupPwm() at the same period/alignment is also reusable. The counter must already be configured as one unified 32-bit counter (CONFIG[UNIFY] = 1).

Note

Period detection assumes the shared PWM period/limit is the lowest-numbered unified-counter limit event (the only limit events created by this function and SCTIMER_SetupPwm()). If the application created other unified-counter limit events before calling this function, detection may match the wrong event; in that case create the PWM channels before any unrelated limit events.

Note

Each call configures exactly one channel and is atomic for that channel only (on failure it creates nothing). Building a multi-channel group is a sequence of independent calls; this API does NOT roll the whole group back if a later call fails.

Note

The channel is enabled in the current state only. In a multi-state design the caller must re-enable the returned periodEvent and each channel’s pulseEvent in every state that should run the group (via SCTIMER_ScheduleEvent()). Because the period event is shared, failing to re-schedule it in a state disrupts ALL channels in that state, not just one.

Parameters:

base – SCTimer peripheral base address
pwmParam – Pointer to this channel’s PWM parameters (output, level, duty)
mode – PWM operation mode (all sharing channels must use the same mode), see sctimer_pwm_mode_t
pwmFreq_Hz – Common PWM signal frequency in Hz (all sharing channels must use the same frequency)
srcClock_Hz – SCTimer counter clock in Hz
periodEvent – Pointer to a variable where the shared period event number (new or reused) is stored
pulseEvent – Pointer to a variable where this channel’s pulse event number is stored

Returns:

kStatus_Success on success kStatus_InvalidArgument if arguments are invalid, the counter is not in unified mode, or an existing shared period event has a different frequency/alignment kStatus_OutOfRange if the event or match-register budget would be exceeded

void SCTIMER_UpdatePwmDutycycleByEvent(SCT_Type *base, sctimer_out_t output, uint8_t dutyCyclePercent, uint32_t periodEvent, uint32_t pulseEvent, sctimer_pwm_update_mode_t updateMode)#

Updates the duty cycle of a PWM signal using explicit period and pulse events.

Unlike SCTIMER_UpdatePwmDutycycle(), this function does not assume the pulse event is periodEvent + 1, so it works for channels created by SCTIMER_SetupSharedPeriodPwm() where the pulse events are not adjacent to the shared period event. The counter must be in unified 32-bit mode.

Parameters:

base – SCTimer peripheral base address
output – The output to configure
dutyCyclePercent – New PWM pulse width; the value should be between 0 and 100
periodEvent – The shared period event (as returned by SCTIMER_SetupSharedPeriodPwm())
pulseEvent – The channel’s pulse event (as returned by SCTIMER_SetupSharedPeriodPwm())
updateMode – When the new duty cycle takes effect, see sctimer_pwm_update_mode_t

status_t SCTIMER_SetupComplementaryPwm(SCT_Type *base, sctimer_out_t outHigh, sctimer_out_t outLow, uint8_t dutyCyclePercent, uint32_t deadTimeTicks, sctimer_pwm_mode_t mode, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz, sctimer_complementary_pwm_handle_t *handle)#

Configures a complementary PWM output pair with programmable dead time.

Builds a high-side/low-side complementary pair on the unified 32-bit counter from one duty value plus a dead time expressed in SCT counter clock ticks. Dead time is inserted by delaying each output’s turn-on by deadTimeTicks while keeping turn-off immediate, which guarantees a non-overlap (dead-time) gap at both switching edges so the two outputs are never simultaneously active (no shoot-through).

The shared period event also limits (resets) the counter. The returned handle is used to update the pair’s duty cycle later with SCTIMER_UpdateComplementaryPwmDutycycle().

Note

Dead time is inserted by delaying the relevant turn-on edge - the high side in edge-aligned mode, the low side in center-aligned mode - so that output’s active width shrinks by deadTimeTicks (the usual cost of dead time).

Note

For a switching duty the valid range is 0 < duty < 100 (needs deadTimeTicks < duty and duty + deadTimeTicks < period); deadTimeTicks = 0 is allowed (strict complementary). 0 % and 100 % are accepted as constant complementary levels (high-side fully off / fully on): the pair is driven to static opposite levels with no switching and no dead-time window. A both-off fault state is not expressible as a duty - use a separate output force/disable path for that.

Note

Call this function once per complementary pair. To drive several pairs on the same SCTimer (for example the three half-bridges of a 3-phase inverter), call it once for each pair — but all pairs MUST use the same pwmFreq_Hz and the same mode, because they share one unified counter (a single count direction and period). Mixing frequencies or alignments across pairs creates conflicting limit events on the counter and produces an incorrect waveform.

Parameters:

base – SCTimer peripheral base address
outHigh – High-side output pin
outLow – Low-side output pin (complement of outHigh)
dutyCyclePercent – High-side duty cycle, value should be between 0 and 100
deadTimeTicks – Dead time in SCT counter clock ticks, inserted at both edges; 0 = no dead time (strict complementary)
mode – PWM operation mode, see sctimer_pwm_mode_t
pwmFreq_Hz – PWM signal frequency in Hz
srcClock_Hz – SCTimer counter clock in Hz
handle – Pointer to a handle that receives the pair’s event numbers and parameters

Returns:

kStatus_Success on success kStatus_InvalidArgument if arguments are invalid, the counter is not unified, or the dead time does not fit the requested duty/period without causing overlap kStatus_OutOfRange if the event or match-register budget would be exceeded

status_t SCTIMER_UpdateComplementaryPwmDutycycle(SCT_Type *base, const sctimer_complementary_pwm_handle_t *handle, uint8_t dutyCyclePercent, sctimer_pwm_update_mode_t updateMode)#

Updates the duty cycle of a complementary PWM pair, preserving dead time.

Recomputes both moving switching edges (high-side turn-off and low-side turn-on) from the new duty cycle while keeping the dead-time offset, and writes them so the no-overlap guarantee holds across the update. In kSCTIMER_UpdateOnNextPeriod mode both edges reload together at the next counter cycle, so the dead-time relationship is updated atomically and glitchlessly.

Note

A switching duty must keep the dead time inside the period (deadTimeTicks < duty and duty + deadTimeTicks < period). 0 % and 100 % are accepted as constant complementary levels: the pair is driven to static opposite levels (no switching, no dead time). Switching between a constant level and a switching duty briefly halts the counter to re-bind the outputs. A both-off fault state is not a duty - use a separate output force/disable path.

Note

updateMode is honored only for a switching duty (0 < duty < 100). A 0 % or 100 % update is always applied immediately (counter briefly halted), regardless of updateMode, because a constant level cannot be loaded through the glitchless reload-register (MATCHREL) path: it requires detaching the events and forcing the output levels, which needs a halt. kSCTIMER_UpdateOnNextPeriod therefore does not defer a 0 %/100 % change to the next period boundary.

Parameters:

base – SCTimer peripheral base address
handle – Handle returned by SCTIMER_SetupComplementaryPwm()
dutyCyclePercent – New high-side duty cycle, value should be between 0 and 100
updateMode – When the new duty cycle takes effect, see sctimer_pwm_update_mode_t. Ignored for a 0 %/100 % update, which is always immediate; see the note above.

Returns:

kStatus_Success on success kStatus_InvalidArgument if the dead time does not fit the requested duty/period

static inline void SCTIMER_EnableInterrupts(SCT_Type *base, uint32_t mask)#

Enables the selected SCTimer interrupts.

Parameters:

base – SCTimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration sctimer_interrupt_enable_t

static inline void SCTIMER_DisableInterrupts(SCT_Type *base, uint32_t mask)#

Disables the selected SCTimer interrupts.

Parameters:

base – SCTimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration sctimer_interrupt_enable_t

static inline uint32_t SCTIMER_GetEnabledInterrupts(SCT_Type *base)#

Gets the enabled SCTimer interrupts.

Parameters:

base – SCTimer peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration sctimer_interrupt_enable_t

static inline uint32_t SCTIMER_GetStatusFlags(SCT_Type *base)#

Gets the SCTimer status flags.

Parameters:

base – SCTimer peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration sctimer_status_flags_t

static inline void SCTIMER_ClearStatusFlags(SCT_Type *base, uint32_t mask)#

Clears the SCTimer status flags.

Parameters:

base – SCTimer peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration sctimer_status_flags_t

static inline void SCTIMER_StartTimer(SCT_Type *base, uint32_t countertoStart)#

Starts the SCTimer counter.

Note

In 16-bit mode, we can enable both Counter_L and Counter_H, In 32-bit mode, we only can select Counter_U.

Parameters:

base – SCTimer peripheral base address
countertoStart – The SCTimer counters to enable. This is a logical OR of members of the enumeration sctimer_counter_t.

static inline void SCTIMER_StopTimer(SCT_Type *base, uint32_t countertoStop)#

Halts the SCTimer counter.

Parameters:

base – SCTimer peripheral base address
countertoStop – The SCTimer counters to stop. This is a logical OR of members of the enumeration sctimer_counter_t.

status_t SCTIMER_CreateAndScheduleEvent(SCT_Type *base, sctimer_event_t howToMonitor, uint32_t matchValue, uint32_t whichIO, sctimer_counter_t whichCounter, uint32_t *event)#

Create an event that is triggered on a match or IO and schedule in current state.

This function will configure an event using the options provided by the user. If the event type uses the counter match, then the function will set the user provided match value into a match register and put this match register number into the event control register. The event is enabled for the current state and the event number is increased by one at the end. The function returns the event number; this event number can be used to configure actions to be done when this event is triggered.

Parameters:

base – SCTimer peripheral base address
howToMonitor – Event type; options are available in the enumeration sctimer_interrupt_enable_t
matchValue – The match value that will be programmed to a match register
whichIO – The input or output that will be involved in event triggering. This field is ignored if the event type is “match only”
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Pointer to a variable where the new event number is stored

Returns:

kStatus_Success on success kStatus_Error if we have hit the limit in terms of number of events created or if we have reached the limit in terms of number of match registers

void SCTIMER_ScheduleEvent(SCT_Type *base, uint32_t event)#

Enable an event in the current state.

This function will allow the event passed in to trigger in the current state. The event must be created earlier by either calling the function SCTIMER_SetupPwm() or function SCTIMER_CreateAndScheduleEvent() .

Parameters:

base – SCTimer peripheral base address
event – Event number to enable in the current state

status_t SCTIMER_IncreaseState(SCT_Type *base)#

Increase the state by 1.

All future events created by calling the function SCTIMER_ScheduleEvent() will be enabled in this new state.

Parameters:

base – SCTimer peripheral base address

Returns:

kStatus_Success on success kStatus_Error if we have hit the limit in terms of states used

uint32_t SCTIMER_GetCurrentState(SCT_Type *base)#

Provides the current state.

User can use this to set the next state by calling the function SCTIMER_SetupNextStateAction().

Parameters:

base – SCTimer peripheral base address

Returns:

The current state

static inline void SCTIMER_SetCounterState(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t state)#

Set the counter current state.

The function is to set the state variable bit field of STATE register. Writing to the STATE_L, STATE_H, or unified register is only allowed when the corresponding counter is halted (HALT bits are set to 1 in the CTRL register).

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
state – The counter current state number (only support range from 0~31).

static inline uint16_t SCTIMER_GetCounterState(SCT_Type *base, sctimer_counter_t whichCounter)#

Get the counter current state value.

The function is to get the state variable bit field of STATE register.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

Returns:

The the counter current state value.

status_t SCTIMER_SetupCaptureAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t *captureRegister, uint32_t event)#

Setup capture of the counter value on trigger of a selected event.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
captureRegister – Pointer to a variable where the capture register number will be returned. User can read the captured value from this register when the specified event is triggered.
event – Event number that will trigger the capture

Returns:

kStatus_Success on success kStatus_Error if we have hit the limit in terms of number of match/capture registers available

void SCTIMER_SetCallback(SCT_Type *base, sctimer_event_callback_t callback, uint32_t event)#

Receive noticification when the event trigger an interrupt.

If the interrupt for the event is enabled by the user, then a callback can be registered which will be invoked when the event is triggered

Parameters:

base – SCTimer peripheral base address
event – Event number that will trigger the interrupt
callback – Function to invoke when the event is triggered

static inline void SCTIMER_SetupStateLdMethodAction(SCT_Type *base, uint32_t event, bool fgLoad)#

Change the load method of transition to the specified state.

Change the load method of transition, it will be triggered by the event number that is passed in by the user.

Parameters:

base – SCTimer peripheral base address
event – Event number that will change the method to trigger the state transition
fgLoad – The method to load highest-numbered event occurring for that state to the STATE register.
- true: Load the STATEV value to STATE when the event occurs to be the next state.
- false: Add the STATEV value to STATE when the event occurs to be the next state.

static inline void SCTIMER_SetupNextStateActionwithLdMethod(SCT_Type *base, uint32_t nextState, uint32_t event, bool fgLoad)#

Transition to the specified state with Load method.

This transition will be triggered by the event number that is passed in by the user, the method decide how to load the highest-numbered event occurring for that state to the STATE register.

Parameters:

base – SCTimer peripheral base address
nextState – The next state SCTimer will transition to
event – Event number that will trigger the state transition
fgLoad – The method to load the highest-numbered event occurring for that state to the STATE register.
- true: Load the STATEV value to STATE when the event occurs to be the next state.
- false: Add the STATEV value to STATE when the event occurs to be the next state.

static inline void SCTIMER_SetupNextStateAction(SCT_Type *base, uint32_t nextState, uint32_t event)#

Transition to the specified state.

Deprecated:: Do not use this function. It has been superceded by SCTIMER_SetupNextStateActionwithLdMethod

This transition will be triggered by the event number that is passed in by the user.

Parameters:

base – SCTimer peripheral base address
nextState – The next state SCTimer will transition to
event – Event number that will trigger the state transition

static inline void SCTIMER_SetupEventActiveDirection(SCT_Type *base, sctimer_event_active_direction_t activeDirection, uint32_t event)#

Setup event active direction when the counters are operating in BIDIR mode.

Parameters:

base – SCTimer peripheral base address
activeDirection – Event generation active direction, see sctimer_event_active_direction_t.
event – Event number that need setup the active direction.

static inline void SCTIMER_SetupOutputSetAction(SCT_Type *base, uint32_t whichIO, uint32_t event)#

Set the Output.

This output will be set when the event number that is passed in by the user is triggered.

Parameters:

base – SCTimer peripheral base address
whichIO – The output to set
event – Event number that will trigger the output change

static inline void SCTIMER_SetupOutputClearAction(SCT_Type *base, uint32_t whichIO, uint32_t event)#

Clear the Output.

This output will be cleared when the event number that is passed in by the user is triggered.

Parameters:

base – SCTimer peripheral base address
whichIO – The output to clear
event – Event number that will trigger the output change

void SCTIMER_SetupOutputToggleAction(SCT_Type *base, uint32_t whichIO, uint32_t event)#

Toggle the output level.

This change in the output level is triggered by the event number that is passed in by the user.

Parameters:

base – SCTimer peripheral base address
whichIO – The output to toggle
event – Event number that will trigger the output change

static inline void SCTIMER_SetupCounterLimitAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)#

Limit the running counter.

The counter is limited when the event number that is passed in by the user is triggered.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Event number that will trigger the counter to be limited

static inline void SCTIMER_SetupCounterStopAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)#

Stop the running counter.

The counter is stopped when the event number that is passed in by the user is triggered.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Event number that will trigger the counter to be stopped

static inline void SCTIMER_SetupCounterStartAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)#

Re-start the stopped counter.

The counter will re-start when the event number that is passed in by the user is triggered.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Event number that will trigger the counter to re-start

static inline void SCTIMER_SetupCounterHaltAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)#

Halt the running counter.

The counter is disabled (halted) when the event number that is passed in by the user is triggered. When the counter is halted, all further events are disabled. The HALT condition can only be removed by calling the SCTIMER_StartTimer() function.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Event number that will trigger the counter to be halted

static inline void SCTIMER_SetupDmaTriggerAction(SCT_Type *base, uint32_t dmaNumber, uint32_t event)#

Generate a DMA request.

DMA request will be triggered by the event number that is passed in by the user.

Parameters:

base – SCTimer peripheral base address
dmaNumber – The DMA request to generate
event – Event number that will trigger the DMA request

static inline void SCTIMER_SetCOUNTValue(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t value)#

Set the value of counter.

The function is to set the value of Count register, Writing to the COUNT_L, COUNT_H, or unified register is only allowed when the corresponding counter is halted (HALT bits are set to 1 in the CTRL register).

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
value – the counter value update to the COUNT register.

static inline uint32_t SCTIMER_GetCOUNTValue(SCT_Type *base, sctimer_counter_t whichCounter)#

Get the value of counter.

The function is to read the value of Count register, software can read the counter registers at any time..

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

Returns:

The value of counter selected.

static inline void SCTIMER_SetEventInState(SCT_Type *base, uint32_t event, uint32_t state)#

Set the state mask bit field of EV_STATE register.

Parameters:

base – SCTimer peripheral base address
event – The EV_STATE register be set.
state – The state value in which the event is enabled to occur.

static inline void SCTIMER_ClearEventInState(SCT_Type *base, uint32_t event, uint32_t state)#

Clear the state mask bit field of EV_STATE register.

Parameters:

base – SCTimer peripheral base address
event – The EV_STATE register be clear.
state – The state value in which the event is disabled to occur.

static inline bool SCTIMER_GetEventInState(SCT_Type *base, uint32_t event, uint32_t state)#

Get the state mask bit field of EV_STATE register.

Note

This function is to check whether the event is enabled in a specific state.

Parameters:

base – SCTimer peripheral base address
event – The EV_STATE register be read.
state – The state value.

Returns:

The the state mask bit field of EV_STATE register.

true: The event is enable in state.
false: The event is disable in state.

static inline uint32_t SCTIMER_GetCaptureValue(SCT_Type *base, sctimer_counter_t whichCounter, uint8_t capChannel)#

Get the value of capture register.

This function returns the captured value upon occurrence of the events selected by the corresponding Capture Control registers occurred.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
capChannel – SCTimer capture register of capture channel.

Returns:

The SCTimer counter value at which this register was last captured.

void SCTIMER_EventHandleIRQ(SCT_Type *base)#

SCTimer interrupt handler.

Parameters:

base – SCTimer peripheral base address.

void SCTIMER_DriverIRQHandler(uint32_t instance)#

Common IRQ handler for SCTimer, which can be used for SCTimer IRQ remapping.

Parameters:

instance – SCTimer instance number.

FSL_SCTIMER_DRIVER_VERSION#: Version

enum _sctimer_pwm_mode#

SCTimer PWM operation modes.

Values:

enumerator kSCTIMER_EdgeAlignedPwm#: Edge-aligned PWM

enumerator kSCTIMER_CenterAlignedPwm#: Center-aligned PWM

enum _sctimer_counter#

SCTimer counters type.

Values:

enumerator kSCTIMER_Counter_L#: 16-bit Low counter.

enumerator kSCTIMER_Counter_H#: 16-bit High counter.

enumerator kSCTIMER_Counter_U#: 32-bit Unified counter.

enum _sctimer_input#

List of SCTimer input pins.

Values:

enumerator kSCTIMER_Input_0#: SCTIMER input 0

enumerator kSCTIMER_Input_1#: SCTIMER input 1

enumerator kSCTIMER_Input_2#: SCTIMER input 2

enumerator kSCTIMER_Input_3#: SCTIMER input 3

enumerator kSCTIMER_Input_4#: SCTIMER input 4

enumerator kSCTIMER_Input_5#: SCTIMER input 5

enumerator kSCTIMER_Input_6#: SCTIMER input 6

enumerator kSCTIMER_Input_7#: SCTIMER input 7

enum _sctimer_out#

List of SCTimer output pins.

Values:

enumerator kSCTIMER_Out_0#: SCTIMER output 0

enumerator kSCTIMER_Out_1#: SCTIMER output 1

enumerator kSCTIMER_Out_2#: SCTIMER output 2

enumerator kSCTIMER_Out_3#: SCTIMER output 3

enumerator kSCTIMER_Out_4#: SCTIMER output 4

enumerator kSCTIMER_Out_5#: SCTIMER output 5

enumerator kSCTIMER_Out_6#: SCTIMER output 6

enumerator kSCTIMER_Out_7#: SCTIMER output 7

enumerator kSCTIMER_Out_8#: SCTIMER output 8

enumerator kSCTIMER_Out_9#: SCTIMER output 9

enum _sctimer_pwm_level_select#

SCTimer PWM output pulse mode: high-true, low-true or no output.

Values:

enumerator kSCTIMER_LowTrue#: Low true pulses

enumerator kSCTIMER_HighTrue#: High true pulses

enum _sctimer_pwm_update_mode#

When an updated PWM duty cycle takes effect.

Values:

enumerator kSCTIMER_UpdateImmediately#: Halt the counter, write the active MATCH register (and its reload), then restart: the new duty cycle takes effect at once. Writing the active MATCH register requires the counter halted.

enumerator kSCTIMER_UpdateOnNextPeriod#: Write only the MATCH reload register while the counter keeps running: the new duty cycle takes effect at the next counter cycle (glitchless, no counter stall). Requires CONFIG[NORELOAD] clear for the affected counter.

enum _sctimer_clock_mode#

SCTimer clock mode options.

Values:

enumerator kSCTIMER_System_ClockMode#: System Clock Mode

enumerator kSCTIMER_Sampled_ClockMode#: Sampled System Clock Mode

enumerator kSCTIMER_Input_ClockMode#: SCT Input Clock Mode

enumerator kSCTIMER_Asynchronous_ClockMode#: Asynchronous Mode

enum _sctimer_clock_select#

SCTimer clock select options.

Values:

enumerator kSCTIMER_Clock_On_Rise_Input_0#: Rising edges on input 0

enumerator kSCTIMER_Clock_On_Fall_Input_0#: Falling edges on input 0

enumerator kSCTIMER_Clock_On_Rise_Input_1#: Rising edges on input 1

enumerator kSCTIMER_Clock_On_Fall_Input_1#: Falling edges on input 1

enumerator kSCTIMER_Clock_On_Rise_Input_2#: Rising edges on input 2

enumerator kSCTIMER_Clock_On_Fall_Input_2#: Falling edges on input 2

enumerator kSCTIMER_Clock_On_Rise_Input_3#: Rising edges on input 3

enumerator kSCTIMER_Clock_On_Fall_Input_3#: Falling edges on input 3

enumerator kSCTIMER_Clock_On_Rise_Input_4#: Rising edges on input 4

enumerator kSCTIMER_Clock_On_Fall_Input_4#: Falling edges on input 4

enumerator kSCTIMER_Clock_On_Rise_Input_5#: Rising edges on input 5

enumerator kSCTIMER_Clock_On_Fall_Input_5#: Falling edges on input 5

enumerator kSCTIMER_Clock_On_Rise_Input_6#: Rising edges on input 6

enumerator kSCTIMER_Clock_On_Fall_Input_6#: Falling edges on input 6

enumerator kSCTIMER_Clock_On_Rise_Input_7#: Rising edges on input 7

enumerator kSCTIMER_Clock_On_Fall_Input_7#: Falling edges on input 7

enum _sctimer_conflict_resolution#

SCTimer output conflict resolution options.

Specifies what action should be taken if multiple events dictate that a given output should be both set and cleared at the same time

Values:

enumerator kSCTIMER_ResolveNone#: No change

enumerator kSCTIMER_ResolveSet#: Set output

enumerator kSCTIMER_ResolveClear#: Clear output

enumerator kSCTIMER_ResolveToggle#: Toggle output

enum _sctimer_event_active_direction#

List of SCTimer event generation active direction when the counters are operating in BIDIR mode.

Values:

enumerator kSCTIMER_ActiveIndependent#: This event is triggered regardless of the count direction.

enumerator kSCTIMER_ActiveInCountUp#: This event is triggered only during up-counting when BIDIR = 1.

enumerator kSCTIMER_ActiveInCountDown#: This event is triggered only during down-counting when BIDIR = 1.

enum _sctimer_event#

List of SCTimer event types.

Values:

enumerator kSCTIMER_InputLowOrMatchEvent#

enumerator kSCTIMER_InputRiseOrMatchEvent#

enumerator kSCTIMER_InputFallOrMatchEvent#

enumerator kSCTIMER_InputHighOrMatchEvent#

enumerator kSCTIMER_MatchEventOnly#

enumerator kSCTIMER_InputLowEvent#

enumerator kSCTIMER_InputRiseEvent#

enumerator kSCTIMER_InputFallEvent#

enumerator kSCTIMER_InputHighEvent#

enumerator kSCTIMER_InputLowAndMatchEvent#

enumerator kSCTIMER_InputRiseAndMatchEvent#

enumerator kSCTIMER_InputFallAndMatchEvent#

enumerator kSCTIMER_InputHighAndMatchEvent#

enumerator kSCTIMER_OutputLowOrMatchEvent#

enumerator kSCTIMER_OutputRiseOrMatchEvent#

enumerator kSCTIMER_OutputFallOrMatchEvent#

enumerator kSCTIMER_OutputHighOrMatchEvent#

enumerator kSCTIMER_OutputLowEvent#

enumerator kSCTIMER_OutputRiseEvent#

enumerator kSCTIMER_OutputFallEvent#

enumerator kSCTIMER_OutputHighEvent#

enumerator kSCTIMER_OutputLowAndMatchEvent#

enumerator kSCTIMER_OutputRiseAndMatchEvent#

enumerator kSCTIMER_OutputFallAndMatchEvent#

enumerator kSCTIMER_OutputHighAndMatchEvent#

enum _sctimer_interrupt_enable#

List of SCTimer interrupts.

Values:

enumerator kSCTIMER_Event0InterruptEnable#: Event 0 interrupt

enumerator kSCTIMER_Event1InterruptEnable#: Event 1 interrupt

enumerator kSCTIMER_Event2InterruptEnable#: Event 2 interrupt

enumerator kSCTIMER_Event3InterruptEnable#: Event 3 interrupt

enumerator kSCTIMER_Event4InterruptEnable#: Event 4 interrupt

enumerator kSCTIMER_Event5InterruptEnable#: Event 5 interrupt

enumerator kSCTIMER_Event6InterruptEnable#: Event 6 interrupt

enumerator kSCTIMER_Event7InterruptEnable#: Event 7 interrupt

enumerator kSCTIMER_Event8InterruptEnable#: Event 8 interrupt

enumerator kSCTIMER_Event9InterruptEnable#: Event 9 interrupt

enumerator kSCTIMER_Event10InterruptEnable#: Event 10 interrupt

enumerator kSCTIMER_Event11InterruptEnable#: Event 11 interrupt

enumerator kSCTIMER_Event12InterruptEnable#: Event 12 interrupt

enum _sctimer_status_flags#

List of SCTimer flags.

Values:

enumerator kSCTIMER_Event0Flag#: Event 0 Flag

enumerator kSCTIMER_Event1Flag#: Event 1 Flag

enumerator kSCTIMER_Event2Flag#: Event 2 Flag

enumerator kSCTIMER_Event3Flag#: Event 3 Flag

enumerator kSCTIMER_Event4Flag#: Event 4 Flag

enumerator kSCTIMER_Event5Flag#: Event 5 Flag

enumerator kSCTIMER_Event6Flag#: Event 6 Flag

enumerator kSCTIMER_Event7Flag#: Event 7 Flag

enumerator kSCTIMER_Event8Flag#: Event 8 Flag

enumerator kSCTIMER_Event9Flag#: Event 9 Flag

enumerator kSCTIMER_Event10Flag#: Event 10 Flag

enumerator kSCTIMER_Event11Flag#: Event 11 Flag

enumerator kSCTIMER_Event12Flag#: Event 12 Flag

enumerator kSCTIMER_BusErrorLFlag#: Bus error due to write when L counter was not halted

enumerator kSCTIMER_BusErrorHFlag#: Bus error due to write when H counter was not halted

typedef enum _sctimer_pwm_mode sctimer_pwm_mode_t#: SCTimer PWM operation modes.

typedef enum _sctimer_counter sctimer_counter_t#: SCTimer counters type.

typedef enum _sctimer_input sctimer_input_t#: List of SCTimer input pins.

typedef enum _sctimer_out sctimer_out_t#: List of SCTimer output pins.

typedef enum _sctimer_pwm_level_select sctimer_pwm_level_select_t#: SCTimer PWM output pulse mode: high-true, low-true or no output.

typedef struct _sctimer_pwm_signal_param sctimer_pwm_signal_param_t#: Options to configure a SCTimer PWM signal.

typedef struct _sctimer_complementary_pwm_handle sctimer_complementary_pwm_handle_t#

Handle for a complementary PWM output pair created by SCTIMER_SetupComplementaryPwm().

The handle stores the event numbers and parameters needed to update the pair’s duty cycle later with SCTIMER_UpdateComplementaryPwmDutycycle(). Dead time is inserted by delaying the relevant turn-on edge (the high side in edge-aligned mode, the low side in center-aligned mode) by deadTimeTicks, which guarantees a non-overlap gap at both switching edges.

typedef enum _sctimer_pwm_update_mode sctimer_pwm_update_mode_t#: When an updated PWM duty cycle takes effect.

typedef enum _sctimer_clock_mode sctimer_clock_mode_t#: SCTimer clock mode options.

typedef enum _sctimer_clock_select sctimer_clock_select_t#: SCTimer clock select options.

typedef enum _sctimer_conflict_resolution sctimer_conflict_resolution_t#

SCTimer output conflict resolution options.

Specifies what action should be taken if multiple events dictate that a given output should be both set and cleared at the same time

typedef enum _sctimer_event_active_direction sctimer_event_active_direction_t#: List of SCTimer event generation active direction when the counters are operating in BIDIR mode.

typedef enum _sctimer_event sctimer_event_t#: List of SCTimer event types.

typedef void (*sctimer_event_callback_t)(void)#: SCTimer callback typedef.

typedef enum _sctimer_interrupt_enable sctimer_interrupt_enable_t#: List of SCTimer interrupts.

typedef enum _sctimer_status_flags sctimer_status_flags_t#: List of SCTimer flags.

typedef struct _sctimer_config sctimer_config_t#

SCTimer configuration structure.

This structure holds the configuration settings for the SCTimer peripheral. To initialize this structure to reasonable defaults, call the SCTMR_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

SCT_EV_STATE_STATEMSKn(x)#

struct _sctimer_pwm_signal_param#

#include <fsl_sctimer.h>

Options to configure a SCTimer PWM signal.

Public Members

sctimer_out_t output#: The output pin to use to generate the PWM signal

sctimer_pwm_level_select_t level#: PWM output active level select.

uint8_t dutyCyclePercent#: PWM pulse width, value should be between 0 to 100 0 = always inactive signal (0% duty cycle) 100 = always active signal (100% duty cycle).

struct _sctimer_complementary_pwm_handle#

#include <fsl_sctimer.h>

Handle for a complementary PWM output pair created by SCTIMER_SetupComplementaryPwm().

Public Members

uint32_t periodEvent#: Shared period/limit event; match = period. Set by frequency, constant across duty updates.

uint32_t highRiseEvent#: Edge-aligned mode: the high-side turn-on event, match = deadTimeTicks (constant across duty updates). Center-aligned mode: there is no separate rise event, so this field is set equal to periodEvent and drives no output - do not treat it as a distinct event in that mode.

uint32_t highFallEvent#: High-side turn-off event; match = pulse (= period * duty / 100). Rewritten on each duty update.

uint32_t lowRiseEvent#: Low-side turn-on event; match = pulse + deadTimeTicks. Rewritten on each duty update.

uint32_t deadTimeTicks#: Dead time in SCT counter clock ticks.

sctimer_out_t outHigh#: High-side output pin.

sctimer_out_t outLow#: Low-side output pin.

struct _sctimer_config#

#include <fsl_sctimer.h>

SCTimer configuration structure.

The configuration structure can be made constant so as to reside in flash.

Public Members

bool enableCounterUnify#: true: SCT operates as a unified 32-bit counter; false: SCT operates as two 16-bit counters. User can use the 16-bit low counter and the 16-bit high counters at the same time; for Hardware limit, user can not use unified 32-bit counter and any 16-bit low/high counter at the same time.

sctimer_clock_mode_t clockMode#: SCT clock mode value

sctimer_clock_select_t clockSelect#: SCT clock select value

bool enableBidirection_l#: true: Up-down count mode for the L or unified counter false: Up count mode only for the L or unified counter

bool enableBidirection_h#: true: Up-down count mode for the H or unified counter false: Up count mode only for the H or unified counter. This field is used only if the enableCounterUnify is set to false

uint8_t prescale_l#: Prescale value to produce the L or unified counter clock

uint8_t prescale_h#: Prescale value to produce the H counter clock. This field is used only if the enableCounterUnify is set to false

uint8_t outInitState#: Defines the initial output value

uint8_t inputsync#: SCT INSYNC value, INSYNC field in the CONFIG register, from bit9 to bit 16. it is used to define synchronization for input N: bit 9 = input 0 bit 10 = input 1 bit 11 = input 2 bit 12 = input 3 All other bits are reserved (bit13 ~bit 16). How User to set the the value for the member inputsync. IE: delay for input0, and input 1, bypasses for input 2 and input 3 MACRO definition in user level. #define INPUTSYNC0 (0U) #define INPUTSYNC1 (1U) #define INPUTSYNC2 (2U) #define INPUTSYNC3 (3U) User Code. sctimerInfo.inputsync = (1 << INPUTSYNC2) | (1 << INPUTSYNC3);

SPI: Serial Peripheral Interface Driver#

SPI DMA Driver#

status_t SPI_MasterTransferCreateHandleDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_dma_callback_t callback, void *userData, dma_handle_t *txHandle, dma_handle_t *rxHandle)#

Initialize the SPI master DMA handle.

This function initializes the SPI master DMA handle which can be used for other SPI master transactional APIs. Usually, for a specified SPI instance, user need only call this API once to get the initialized handle.

Parameters:

base – SPI peripheral base address.
handle – SPI handle pointer.
callback – User callback function called at the end of a transfer.
userData – User data for callback.
txHandle – DMA handle pointer for SPI Tx, the handle shall be static allocated by users.
rxHandle – DMA handle pointer for SPI Rx, the handle shall be static allocated by users.

status_t SPI_MasterTransferDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_transfer_t *xfer)#

Perform a non-blocking SPI transfer using DMA.

Note

This interface returned immediately after transfer initiates, users should call SPI_GetTransferStatus to poll the transfer status to check whether SPI transfer finished.

Parameters:

base – SPI peripheral base address.
handle – SPI DMA handle pointer.
xfer – Pointer to dma transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_SPI_Busy – SPI is not idle, is running another transfer.

status_t SPI_MasterHalfDuplexTransferDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_half_duplex_transfer_t *xfer)#

Transfers a block of data using a DMA method.

This function using polling way to do the first half transimission and using DMA way to do the srcond half transimission, the transfer mechanism is half-duplex. When do the second half transimission, code will return right away. When all data is transferred, the callback function is called.

Parameters:

base – SPI base pointer
handle – A pointer to the spi_master_dma_handle_t structure which stores the transfer state.
xfer – A pointer to the spi_half_duplex_transfer_t structure.

Returns:

status of status_t.

static inline status_t SPI_SlaveTransferCreateHandleDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_dma_callback_t callback, void *userData, dma_handle_t *txHandle, dma_handle_t *rxHandle)#

Initialize the SPI slave DMA handle.

This function initializes the SPI slave DMA handle which can be used for other SPI master transactional APIs. Usually, for a specified SPI instance, user need only call this API once to get the initialized handle.

Parameters:

base – SPI peripheral base address.
handle – SPI handle pointer.
callback – User callback function called at the end of a transfer.
userData – User data for callback.
txHandle – DMA handle pointer for SPI Tx, the handle shall be static allocated by users.
rxHandle – DMA handle pointer for SPI Rx, the handle shall be static allocated by users.

static inline status_t SPI_SlaveTransferDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_transfer_t *xfer)#

Perform a non-blocking SPI transfer using DMA.

Note

This interface returned immediately after transfer initiates, users should call SPI_GetTransferStatus to poll the transfer status to check whether SPI transfer finished.

Parameters:

base – SPI peripheral base address.
handle – SPI DMA handle pointer.
xfer – Pointer to dma transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_SPI_Busy – SPI is not idle, is running another transfer.

void SPI_MasterTransferAbortDMA(SPI_Type *base, spi_dma_handle_t *handle)#

Abort a SPI transfer using DMA.

Parameters:

base – SPI peripheral base address.
handle – SPI DMA handle pointer.

status_t SPI_MasterTransferGetCountDMA(SPI_Type *base, spi_dma_handle_t *handle, size_t *count)#

Gets the master DMA transfered bytes.

This function gets the master DMA transfered bytes.

Parameters:

base – SPI peripheral base address.
handle – A pointer to the spi_dma_handle_t structure which stores the transfer state.
count – A number of bytes transferred by the non-blocking transaction.

Returns:

status of status_t.

static inline void SPI_SlaveTransferAbortDMA(SPI_Type *base, spi_dma_handle_t *handle)#

Abort a SPI transfer using DMA.

Parameters:

base – SPI peripheral base address.
handle – SPI DMA handle pointer.

static inline status_t SPI_SlaveTransferGetCountDMA(SPI_Type *base, spi_dma_handle_t *handle, size_t *count)#

Gets the slave DMA transfered bytes.

This function gets the slave DMA transfered bytes.

Parameters:

base – SPI peripheral base address.
handle – A pointer to the spi_dma_handle_t structure which stores the transfer state.
count – A number of bytes transferred by the non-blocking transaction.

Returns:

status of status_t.

FSL_SPI_DMA_DRIVER_VERSION#: SPI DMA driver version.

typedef struct _spi_dma_handle spi_dma_handle_t#

typedef void (*spi_dma_callback_t)(SPI_Type *base, spi_dma_handle_t *handle, status_t status, void *userData)#: SPI DMA callback called at the end of transfer.

struct _spi_dma_handle#

#include <fsl_spi_dma.h>

SPI DMA transfer handle, users should not touch the content of the handle.

Public Members

SPI_Type *base#: SPI base address

volatile bool txInProgress#: Send transfer finished

volatile bool rxInProgress#: Receive transfer finished

uint8_t bytesPerFrame#: Bytes in a frame for SPI transfer

uint8_t lastwordBytes#: The Bytes of lastword for master

uint16_t txDummy#: The dummy data for TX.

uint32_t lastword#: The last word for master TX.

dma_handle_t *txHandle#: DMA handler for SPI send

dma_handle_t *rxHandle#: DMA handler for SPI receive

spi_dma_callback_t callback#: Callback for SPI DMA transfer

void *userData#: User Data for SPI DMA callback

uint32_t state#: Internal state of SPI DMA transfer

size_t transferSize#: Bytes need to be transfer

uint32_t instance#: Index of SPI instance

const uint8_t *txNextData#: The pointer of next time tx data

size_t txRemainingBytes#: lastwordBytes + txRemainingBytes is number of data to be send [in bytes]

uint8_t *rxNextData#: The pointer of next time rx data

size_t rxRemainingBytes#: Number of data to be received [in bytes]

bool isSlave#: SPI work in slave mode.

SPI Driver#

FSL_SPI_DRIVER_VERSION#: SPI driver version.

enum _spi_xfer_option#

SPI transfer option.

Values:

enumerator kSPI_FrameDelay#: A delay may be inserted, defined in the DLY register.

enumerator kSPI_FrameAssert#: SSEL will be deasserted at the end of a transfer.

enumerator kSPI_FrameAssertEachFrame#: SSEL will be deasserted at the end of each frame.

enum _spi_shift_direction#

SPI data shifter direction options.

Values:

enumerator kSPI_MsbFirst#: Data transfers start with most significant bit.

enumerator kSPI_LsbFirst#: Data transfers start with least significant bit.

enum _spi_clock_polarity#

SPI clock polarity configuration.

Values:

enumerator kSPI_ClockPolarityActiveHigh#: Active-high SPI clock (idles low).

enumerator kSPI_ClockPolarityActiveLow#: Active-low SPI clock (idles high).

enum _spi_clock_phase#

SPI clock phase configuration.

Values:

enumerator kSPI_ClockPhaseFirstEdge#: First edge on SCK occurs at the middle of the first cycle of a data transfer.

enumerator kSPI_ClockPhaseSecondEdge#: First edge on SCK occurs at the start of the first cycle of a data transfer.

enum _spi_txfifo_watermark#

txFIFO watermark values

Values:

enumerator kSPI_TxFifo0#: SPI tx watermark is empty

enumerator kSPI_TxFifo1#: SPI tx watermark at 1 item

enumerator kSPI_TxFifo2#: SPI tx watermark at 2 items

enumerator kSPI_TxFifo3#: SPI tx watermark at 3 items

enumerator kSPI_TxFifo4#: SPI tx watermark at 4 items

enumerator kSPI_TxFifo5#: SPI tx watermark at 5 items

enumerator kSPI_TxFifo6#: SPI tx watermark at 6 items

enumerator kSPI_TxFifo7#: SPI tx watermark at 7 items

enum _spi_rxfifo_watermark#

rxFIFO watermark values

Values:

enumerator kSPI_RxFifo1#: SPI rx watermark at 1 item

enumerator kSPI_RxFifo2#: SPI rx watermark at 2 items

enumerator kSPI_RxFifo3#: SPI rx watermark at 3 items

enumerator kSPI_RxFifo4#: SPI rx watermark at 4 items

enumerator kSPI_RxFifo5#: SPI rx watermark at 5 items

enumerator kSPI_RxFifo6#: SPI rx watermark at 6 items

enumerator kSPI_RxFifo7#: SPI rx watermark at 7 items

enumerator kSPI_RxFifo8#: SPI rx watermark at 8 items

enum _spi_data_width#

Transfer data width.

Values:

enumerator kSPI_Data4Bits#: 4 bits data width

enumerator kSPI_Data5Bits#: 5 bits data width

enumerator kSPI_Data6Bits#: 6 bits data width

enumerator kSPI_Data7Bits#: 7 bits data width

enumerator kSPI_Data8Bits#: 8 bits data width

enumerator kSPI_Data9Bits#: 9 bits data width

enumerator kSPI_Data10Bits#: 10 bits data width

enumerator kSPI_Data11Bits#: 11 bits data width

enumerator kSPI_Data12Bits#: 12 bits data width

enumerator kSPI_Data13Bits#: 13 bits data width

enumerator kSPI_Data14Bits#: 14 bits data width

enumerator kSPI_Data15Bits#: 15 bits data width

enumerator kSPI_Data16Bits#: 16 bits data width

enum _spi_ssel#

Slave select.

Values:

enumerator kSPI_Ssel0#: Slave select 0

enumerator kSPI_Ssel1#: Slave select 1

enumerator kSPI_Ssel2#: Slave select 2

enumerator kSPI_Ssel3#: Slave select 3

enum _spi_spol#

ssel polarity

Values:

enumerator kSPI_Spol0ActiveHigh#

enumerator kSPI_Spol1ActiveHigh#

enumerator kSPI_Spol3ActiveHigh#

enumerator kSPI_SpolActiveAllHigh#

enumerator kSPI_SpolActiveAllLow#

SPI transfer status.

Values:

enumerator kStatus_SPI_Busy#: SPI bus is busy

enumerator kStatus_SPI_Idle#: SPI is idle

enumerator kStatus_SPI_Error#: SPI error

enumerator kStatus_SPI_BaudrateNotSupport#: Baudrate is not support in current clock source

enumerator kStatus_SPI_Timeout#: SPI timeout polling status flags.

enum _spi_interrupt_enable#

SPI interrupt sources.

Values:

enumerator kSPI_RxLvlIrq#: Rx level interrupt

enumerator kSPI_TxLvlIrq#: Tx level interrupt

enum _spi_statusflags#

SPI status flags.

Values:

enumerator kSPI_TxEmptyFlag#: txFifo is empty

enumerator kSPI_TxNotFullFlag#: txFifo is not full

enumerator kSPI_RxNotEmptyFlag#: rxFIFO is not empty

enumerator kSPI_RxFullFlag#: rxFIFO is full

typedef enum _spi_xfer_option spi_xfer_option_t#: SPI transfer option.

typedef enum _spi_shift_direction spi_shift_direction_t#: SPI data shifter direction options.

typedef enum _spi_clock_polarity spi_clock_polarity_t#: SPI clock polarity configuration.

typedef enum _spi_clock_phase spi_clock_phase_t#: SPI clock phase configuration.

typedef enum _spi_txfifo_watermark spi_txfifo_watermark_t#: txFIFO watermark values

typedef enum _spi_rxfifo_watermark spi_rxfifo_watermark_t#: rxFIFO watermark values

typedef enum _spi_data_width spi_data_width_t#: Transfer data width.

typedef enum _spi_ssel spi_ssel_t#: Slave select.

typedef enum _spi_spol spi_spol_t#: ssel polarity

typedef struct _spi_delay_config spi_delay_config_t#: SPI delay time configure structure. Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15.

typedef struct _spi_master_config spi_master_config_t#: SPI master user configure structure.

typedef struct _spi_slave_config spi_slave_config_t#: SPI slave user configure structure.

typedef struct _spi_transfer spi_transfer_t#: SPI transfer structure.

typedef struct _spi_half_duplex_transfer spi_half_duplex_transfer_t#: SPI half-duplex(master only) transfer structure.

typedef struct _spi_config spi_config_t#: Internal configuration structure used in ‘spi’ and ‘spi_dma’ driver.

typedef struct _spi_master_handle spi_master_handle_t#: Master handle type.

typedef spi_master_handle_t spi_slave_handle_t#: Slave handle type.

typedef void (*spi_master_callback_t)(SPI_Type *base, spi_master_handle_t *handle, status_t status, void *userData)#: SPI master callback for finished transmit.

typedef void (*spi_slave_callback_t)(SPI_Type *base, spi_slave_handle_t *handle, status_t status, void *userData)#: SPI slave callback for finished transmit.

typedef void (*flexcomm_spi_master_irq_handler_t)(SPI_Type *base, spi_master_handle_t *handle)#: Typedef for master interrupt handler.

typedef void (*flexcomm_spi_slave_irq_handler_t)(SPI_Type *base, spi_slave_handle_t *handle)#: Typedef for slave interrupt handler.

volatile uint8_t s_dummyData[]#

SPI default SSEL COUNT.

Global variable for dummy data value setting.

SPI_DUMMYDATA#: SPI dummy transfer data, the data is sent while txBuff is NULL.

SPI_RETRY_TIMES#: Retry times for waiting flag.

SPI_DATA(n)#

SPI_CTRLMASK#

SPI_ASSERTNUM_SSEL(n)#

SPI_DEASSERTNUM_SSEL(n)#

SPI_DEASSERT_ALL#

SPI_FIFOWR_FLAGS_MASK#

SPI_FIFOTRIG_TXLVL_GET(base)#

SPI_FIFOTRIG_RXLVL_GET(base)#

struct _spi_delay_config#

#include <fsl_spi.h>

SPI delay time configure structure. Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15.

Public Members

uint8_t preDelay#: Delay between SSEL assertion and the beginning of transfer.

uint8_t postDelay#: Delay between the end of transfer and SSEL deassertion.

uint8_t frameDelay#: Delay between frame to frame.

uint8_t transferDelay#: Delay between transfer to transfer.

struct _spi_master_config#

#include <fsl_spi.h>

SPI master user configure structure.

Public Members

bool enableLoopback#: Enable loopback for test purpose

bool enableMaster#: Enable SPI at initialization time

spi_clock_polarity_t polarity#: Clock polarity

spi_clock_phase_t phase#: Clock phase

spi_shift_direction_t direction#: MSB or LSB

uint32_t baudRate_Bps#: Baud Rate for SPI in Hz

spi_data_width_t dataWidth#: Width of the data

spi_ssel_t sselNum#: Slave select number

spi_spol_t sselPol#: Configure active CS polarity

uint8_t txWatermark#: txFIFO watermark

uint8_t rxWatermark#: rxFIFO watermark

spi_delay_config_t delayConfig#: Delay configuration.

struct _spi_slave_config#

#include <fsl_spi.h>

SPI slave user configure structure.

Public Members

bool enableSlave#: Enable SPI at initialization time

spi_clock_polarity_t polarity#: Clock polarity

spi_clock_phase_t phase#: Clock phase

spi_shift_direction_t direction#: MSB or LSB

spi_data_width_t dataWidth#: Width of the data

spi_spol_t sselPol#: Configure active CS polarity

uint8_t txWatermark#: txFIFO watermark

uint8_t rxWatermark#: rxFIFO watermark

struct _spi_transfer#

#include <fsl_spi.h>

SPI transfer structure.

Public Members

const uint8_t *txData#: Send buffer

uint8_t *rxData#: Receive buffer

uint32_t configFlags#: Additional option to control transfer, spi_xfer_option_t.

size_t dataSize#: Transfer bytes

struct _spi_half_duplex_transfer#

#include <fsl_spi.h>

SPI half-duplex(master only) transfer structure.

Public Members

const uint8_t *txData#: Send buffer

uint8_t *rxData#: Receive buffer

size_t txDataSize#: Transfer bytes for transmit

size_t rxDataSize#: Transfer bytes

uint32_t configFlags#: Transfer configuration flags, spi_xfer_option_t.

bool isPcsAssertInTransfer#: If PCS pin keep assert between transmit and receive. true for assert and false for deassert.

bool isTransmitFirst#: True for transmit first and false for receive first.

struct _spi_config#: #include <fsl_spi.h>

Internal configuration structure used in ‘spi’ and ‘spi_dma’ driver.

struct _spi_master_handle#

#include <fsl_spi.h>

SPI transfer handle structure.

Public Members

const uint8_t *volatile txData#: Transfer buffer

uint8_t *volatile rxData#: Receive buffer

volatile size_t txRemainingBytes#: Number of data to be transmitted [in bytes]

volatile size_t rxRemainingBytes#: Number of data to be received [in bytes]

volatile int8_t toReceiveCount#: The number of data expected to receive in data width. Since the received count and sent count should be the same to complete the transfer, if the sent count is x and the received count is y, toReceiveCount is x-y.

size_t totalByteCount#: A number of transfer bytes

volatile uint32_t state#: SPI internal state

spi_master_callback_t callback#: SPI callback

void *userData#: Callback parameter

uint8_t dataWidth#: Width of the data [Valid values: 1 to 16]

uint8_t txWatermark#: txFIFO watermark

uint8_t rxWatermark#: rxFIFO watermark

uint32_t txControl#: Precomputed FIFOWR control bits for non-last frames in interrupt transfer.

uint32_t lastControl#: Precomputed FIFOWR control bits for the last frame in interrupt transfer.

SPIFI: SPIFI flash interface driver#

void SPIFI_TransferTxCreateHandleDMA(SPIFI_Type *base, spifi_dma_handle_t *handle, spifi_dma_callback_t callback, void *userData, dma_handle_t *dmaHandle)#

Initializes the SPIFI handle for send which is used in transactional functions and set the callback.

Parameters:

base – SPIFI peripheral base address
handle – Pointer to spifi_dma_handle_t structure
callback – SPIFI callback, NULL means no callback.
userData – User callback function data.
dmaHandle – User requested DMA handle for DMA transfer

void SPIFI_TransferRxCreateHandleDMA(SPIFI_Type *base, spifi_dma_handle_t *handle, spifi_dma_callback_t callback, void *userData, dma_handle_t *dmaHandle)#

Initializes the SPIFI handle for receive which is used in transactional functions and set the callback.

Parameters:

base – SPIFI peripheral base address
handle – Pointer to spifi_dma_handle_t structure
callback – SPIFI callback, NULL means no callback.
userData – User callback function data.
dmaHandle – User requested DMA handle for DMA transfer

status_t SPIFI_TransferSendDMA(SPIFI_Type *base, spifi_dma_handle_t *handle, spifi_transfer_t *xfer)#

Transfers SPIFI data using an DMA non-blocking method.

This function writes data to the SPIFI transmit FIFO. This function is non-blocking.

Parameters:

base – Pointer to QuadSPI Type.
handle – Pointer to spifi_dma_handle_t structure
xfer – SPIFI transfer structure.

status_t SPIFI_TransferReceiveDMA(SPIFI_Type *base, spifi_dma_handle_t *handle, spifi_transfer_t *xfer)#

Receives data using an DMA non-blocking method.

This function receive data from the SPIFI receive buffer/FIFO. This function is non-blocking.

Parameters:

base – Pointer to QuadSPI Type.
handle – Pointer to spifi_dma_handle_t structure
xfer – SPIFI transfer structure.

void SPIFI_TransferAbortSendDMA(SPIFI_Type *base, spifi_dma_handle_t *handle)#

Aborts the sent data using DMA.

This function aborts the sent data using DMA.

Parameters:

base – SPIFI peripheral base address.
handle – Pointer to spifi_dma_handle_t structure

void SPIFI_TransferAbortReceiveDMA(SPIFI_Type *base, spifi_dma_handle_t *handle)#

Aborts the receive data using DMA.

This function abort receive data which using DMA.

Parameters:

base – SPIFI peripheral base address.
handle – Pointer to spifi_dma_handle_t structure

status_t SPIFI_TransferGetSendCountDMA(SPIFI_Type *base, spifi_dma_handle_t *handle, size_t *count)#

Gets the transferred counts of send.

Parameters:

base – Pointer to QuadSPI Type.
handle – Pointer to spifi_dma_handle_t structure.
count – Bytes sent.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

status_t SPIFI_TransferGetReceiveCountDMA(SPIFI_Type *base, spifi_dma_handle_t *handle, size_t *count)#

Gets the status of the receive transfer.

Parameters:

base – Pointer to QuadSPI Type.
handle – Pointer to spifi_dma_handle_t structure
count – Bytes received.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

uint32_t SPIFI_GetInstance(SPIFI_Type *base)#

Get the SPIFI instance from peripheral base address.

Parameters:

base – SPIFI peripheral base address.

Returns:

SPIFI instance.

void SPIFI_Init(SPIFI_Type *base, const spifi_config_t *config)#

Initializes the SPIFI with the user configuration structure.

This function configures the SPIFI module with the user-defined configuration.

Parameters:

base – SPIFI peripheral base address.
config – The pointer to the configuration structure.

void SPIFI_GetDefaultConfig(spifi_config_t *config)#

Get SPIFI default configure settings.

Parameters:

config – SPIFI config structure pointer.

void SPIFI_Deinit(SPIFI_Type *base)#

Deinitializes the SPIFI regions.

Parameters:

base – SPIFI peripheral base address.

void SPIFI_SetCommand(SPIFI_Type *base, spifi_command_t *cmd)#

Set SPIFI flash command.

Parameters:

base – SPIFI peripheral base address.
cmd – SPIFI command structure pointer.

static inline void SPIFI_SetCommandAddress(SPIFI_Type *base, uint32_t addr)#

Set SPIFI command address.

Parameters:

base – SPIFI peripheral base address.
addr – Address value for the command.

static inline void SPIFI_SetIntermediateData(SPIFI_Type *base, uint32_t val)#

Set SPIFI intermediate data.

Before writing a command wihch needs specific intermediate value, users shall call this function to write it. The main use of this function for current serial flash is to select no-opcode mode and cancelling this mode. As dummy cycle do not care about the value, no need to call this function.

Parameters:

base – SPIFI peripheral base address.
val – Intermediate data.

static inline void SPIFI_SetCacheLimit(SPIFI_Type *base, uint32_t val)#

Set SPIFI Cache limit value.

SPIFI includes caching of prevously-accessed data to improve performance. Software can write an address to this function, to prevent such caching at and above the address.

Parameters:

base – SPIFI peripheral base address.
val – Zero-based upper limit of cacheable memory.

static inline void SPIFI_ResetCommand(SPIFI_Type *base)#

Reset the command field of SPIFI.

This function is used to abort the current command or memory mode.

Parameters:

base – SPIFI peripheral base address.

void SPIFI_SetMemoryCommand(SPIFI_Type *base, spifi_command_t *cmd)#

Set SPIFI flash AHB read command.

Call this function means SPIFI enters to memory mode, while users need to use command, a SPIFI_ResetCommand shall be called.

Parameters:

base – SPIFI peripheral base address.
cmd – SPIFI command structure pointer.

static inline void SPIFI_EnableInterrupt(SPIFI_Type *base, uint32_t mask)#

Enable SPIFI interrupt.

The interrupt is triggered only in command mode, and it means the command now is finished.

Parameters:

base – SPIFI peripheral base address.
mask – SPIFI interrupt enable mask. It is a logic OR of members the enumeration :: spifi_interrupt_enable_t

static inline void SPIFI_DisableInterrupt(SPIFI_Type *base, uint32_t mask)#

Disable SPIFI interrupt.

The interrupt is triggered only in command mode, and it means the command now is finished.

Parameters:

base – SPIFI peripheral base address.
mask – SPIFI interrupt enable mask. It is a logic OR of members the enumeration :: spifi_interrupt_enable_t

static inline uint32_t SPIFI_GetStatusFlag(SPIFI_Type *base)#

Get the status of all interrupt flags for SPIFI.

Parameters:

base – SPIFI peripheral base address.

Returns:

SPIFI flag status

FSL_SPIFI_DMA_DRIVER_VERSION#: SPIFI DMA driver version 2.0.3.

FSL_SPIFI_DRIVER_VERSION#: SPIFI driver version 2.0.4.

Status structure of SPIFI.

Values:

enumerator kStatus_SPIFI_Idle#: SPIFI is in idle state

enumerator kStatus_SPIFI_Busy#: SPIFI is busy

enumerator kStatus_SPIFI_Error#: Error occurred during SPIFI transfer

enum _spifi_interrupt_enable#

SPIFI interrupt source.

Values:

enumerator kSPIFI_CommandFinishInterruptEnable#: Interrupt while command finished

enum _spifi_spi_mode#

SPIFI SPI mode select.

Values:

enumerator kSPIFI_SPISckLow#: SCK low after last bit of command, keeps low while CS high

enumerator kSPIFI_SPISckHigh#: SCK high after last bit of command and while CS high

enum _spifi_dual_mode#

SPIFI dual mode select.

Values:

enumerator kSPIFI_QuadMode#: SPIFI uses IO3:0

enumerator kSPIFI_DualMode#: SPIFI uses IO1:0

enum _spifi_data_direction#

SPIFI data direction.

Values:

enumerator kSPIFI_DataInput#: Data input from serial flash.

enumerator kSPIFI_DataOutput#: Data output to serial flash.

enum _spifi_command_format#

SPIFI command opcode format.

Values:

enumerator kSPIFI_CommandAllSerial#: All fields of command are serial.

enumerator kSPIFI_CommandDataQuad#: Only data field is dual/quad, others are serial.

enumerator kSPIFI_CommandOpcodeSerial#: Only opcode field is serial, others are quad/dual.

enumerator kSPIFI_CommandAllQuad#: All fields of command are dual/quad mode.

enum _spifi_command_type#

SPIFI command type.

Values:

enumerator kSPIFI_CommandOpcodeOnly#: Command only have opcode, no address field

enumerator kSPIFI_CommandOpcodeAddrOneByte#: Command have opcode and also one byte address field

enumerator kSPIFI_CommandOpcodeAddrTwoBytes#: Command have opcode and also two bytes address field

enumerator kSPIFI_CommandOpcodeAddrThreeBytes#: Command have opcode and also three bytes address field.

enumerator kSPIFI_CommandOpcodeAddrFourBytes#: Command have opcode and also four bytes address field

enumerator kSPIFI_CommandNoOpcodeAddrThreeBytes#: Command have no opcode and three bytes address field

enumerator kSPIFI_CommandNoOpcodeAddrFourBytes#: Command have no opcode and four bytes address field

SPIFI status flags.

Values:

enumerator kSPIFI_MemoryCommandWriteFinished#: Memory command write finished

enumerator kSPIFI_CommandWriteFinished#: Command write finished

enumerator kSPIFI_InterruptRequest#: CMD flag from 1 to 0, means command execute finished

typedef struct _spifi_dma_handle spifi_dma_handle_t#

typedef void (*spifi_dma_callback_t)(SPIFI_Type *base, spifi_dma_handle_t *handle, status_t status, void *userData)#: SPIFI DMA transfer callback function for finish and error.

typedef enum _spifi_interrupt_enable spifi_interrupt_enable_t#: SPIFI interrupt source.

typedef enum _spifi_spi_mode spifi_spi_mode_t#: SPIFI SPI mode select.

typedef enum _spifi_dual_mode spifi_dual_mode_t#: SPIFI dual mode select.

typedef enum _spifi_data_direction spifi_data_direction_t#: SPIFI data direction.

typedef enum _spifi_command_format spifi_command_format_t#: SPIFI command opcode format.

typedef enum _spifi_command_type spifi_command_type_t#: SPIFI command type.

typedef struct _spifi_command spifi_command_t#: SPIFI command structure.

typedef struct _spifi_config spifi_config_t#: SPIFI region configuration structure.

typedef struct _spifi_transfer spifi_transfer_t#: Transfer structure for SPIFI.

static inline void SPIFI_EnableDMA(SPIFI_Type *base, bool enable)#

Enable or disable DMA request for SPIFI.

Parameters:

base – SPIFI peripheral base address.
enable – True means enable DMA and false means disable DMA.

static inline uint32_t SPIFI_GetDataRegisterAddress(SPIFI_Type *base)#

Gets the SPIFI data register address.

This API is used to provide a transfer address for the SPIFI DMA transfer configuration.

Parameters:

base – SPIFI base pointer

Returns:

data register address

static inline void SPIFI_WriteData(SPIFI_Type *base, uint32_t data)#

Write a word data in address of SPIFI.

Users can write a page or at least a word data into SPIFI address.

Parameters:

base – SPIFI peripheral base address.
data – Data need be write.

static inline void SPIFI_WriteDataByte(SPIFI_Type *base, uint8_t data)#

Write a byte data in address of SPIFI.

Users can write a byte data into SPIFI address.

Parameters:

base – SPIFI peripheral base address.
data – Data need be write.

void SPIFI_WriteDataHalfword(SPIFI_Type *base, uint16_t data)#

Write a halfword data in address of SPIFI.

Users can write a halfword data into SPIFI address.

Parameters:

base – SPIFI peripheral base address.
data – Data need be write.

static inline uint32_t SPIFI_ReadData(SPIFI_Type *base)#

Read data from serial flash.

Users should notice before call this function, the data length field in command register shall larger than 4, otherwise a hardfault will happen.

Parameters:

base – SPIFI peripheral base address.

Returns:

Data input from flash.

static inline uint8_t SPIFI_ReadDataByte(SPIFI_Type *base)#

Read a byte data from serial flash.

Parameters:

base – SPIFI peripheral base address.

Returns:

Data input from flash.

uint16_t SPIFI_ReadDataHalfword(SPIFI_Type *base)#

Read a halfword data from serial flash.

Parameters:

base – SPIFI peripheral base address.

Returns:

Data input from flash.

struct _spifi_dma_handle#

#include <fsl_spifi_dma.h>

SPIFI DMA transfer handle, users should not touch the content of the handle.

Public Members

dma_handle_t *dmaHandle#: DMA handler for SPIFI send

size_t transferSize#: Bytes need to transfer.

uint32_t state#: Internal state for SPIFI DMA transfer

spifi_dma_callback_t callback#: Callback for users while transfer finish or error occurred

void *userData#: User callback parameter

struct _spifi_command#

#include <fsl_spifi.h>

SPIFI command structure.

Public Members

uint16_t dataLen#: How many data bytes are needed in this command.

bool isPollMode#: For command need to read data from serial flash

spifi_data_direction_t direction#: Data direction of this command.

uint8_t intermediateBytes#: How many intermediate bytes needed

spifi_command_format_t format#: Command format

spifi_command_type_t type#: Command type

uint8_t opcode#: Command opcode value

struct _spifi_config#

#include <fsl_spifi.h>

SPIFI region configuration structure.

Public Members

uint16_t timeout#: SPI transfer timeout, the unit is SCK cycles

uint8_t csHighTime#: CS high time cycles

bool disablePrefetch#: True means SPIFI will not attempt a speculative prefetch.

bool disableCachePrefech#: Disable prefetch of cache line

bool isFeedbackClock#: Is data sample uses feedback clock.

spifi_spi_mode_t spiMode#: SPIFI spi mode select

bool isReadFullClockCycle#: If enable read full clock cycle.

spifi_dual_mode_t dualMode#: SPIFI dual mode, dual or quad.

struct _spifi_transfer#

#include <fsl_spifi.h>

Transfer structure for SPIFI.

Public Members

uint8_t *data#: Pointer to data to transmit

size_t dataSize#: Bytes to be transmit

SPIFI DMA Driver#

SPIFI Driver#

TRNG: True Random Number Generator#

FSL_TRNG_DRIVER_VERSION#

TRNG driver version 2.0.23.

Current version: 2.0.23

Change log:

version 2.0.23
- Updated TRNG default values for MCXA577 devices based on silicon characterization.
version 2.0.22
- Added support for KW43 and MCXW70 devices.
version 2.0.21
- Added support for MCXC devices.
version 2.0.20
- Added support for MCXA devices.
version 2.0.19
- Added support for MCXA and MCXL.
version 2.0.18
- TRNG health checks now done in software on RT5xx and RT6xx.
version 2.0.17
- Added support for RT700.
version 2.0.16
- Added support for Dual oscillator mode.
version 2.0.15
- Changed TRNG_USER_CONFIG_DEFAULT_XXX values according to latest reccomended by design team.
version 2.0.14
- add support for RW610 and RW612
version 2.0.13
- After deepsleep it might return error, added clearing bits in TRNG_GetRandomData() and generating new entropy.
- Modified reloading entropy in TRNG_GetRandomData(), for some data length it doesn’t reloading entropy correctly.
version 2.0.12
- For KW34A4_SERIES, KW35A4_SERIES, KW36A4_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv8.
version 2.0.11
- Add clearing pending errors in TRNG_Init().
version 2.0.10
- Fixed doxygen issues.
version 2.0.9
- Fix HIS_CCM metrics issues.
version 2.0.8
- For K32L2A41A_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv4.
version 2.0.7
- Fix MISRA 2004 issue rule 12.5.
version 2.0.6
- For KW35Z4_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv8.
version 2.0.5
- Add possibility to define default TRNG configuration by device specific preprocessor macros for FRQMIN, FRQMAX and OSCDIV.
version 2.0.4
- Fix MISRA-2012 issues.
Version 2.0.3
- update TRNG_Init to restart entropy generation
Version 2.0.2
- fix MISRA issues
Version 2.0.1
- add support for KL8x and KL28Z
- update default OSCDIV for K81 to divide by 2

enum _trng_sample_mode#

TRNG sample mode. Used by trng_config_t.

Values:

enumerator kTRNG_SampleModeVonNeumann#: Use von Neumann data in both Entropy shifter and Statistical Checker.

enumerator kTRNG_SampleModeRaw#: Use raw data into both Entropy shifter and Statistical Checker.

enumerator kTRNG_SampleModeVonNeumannRaw#: Use von Neumann data in Entropy shifter. Use raw data into Statistical Checker.

enum _trng_clock_mode#

TRNG clock mode. Used by trng_config_t.

Values:

enumerator kTRNG_ClockModeRingOscillator#: Ring oscillator is used to operate the TRNG (default).

enumerator kTRNG_ClockModeSystem#: System clock is used to operate the TRNG. This is for test use only, and indeterminate results may occur.

enum _trng_ring_osc_div#

TRNG ring oscillator divide. Used by trng_config_t.

Values:

enumerator kTRNG_RingOscDiv0#: Ring oscillator with no divide

enumerator kTRNG_RingOscDiv2#: Ring oscillator divided-by-2.

enumerator kTRNG_RingOscDiv4#: Ring oscillator divided-by-4.

enumerator kTRNG_RingOscDiv8#: Ring oscillator divided-by-8.

typedef enum _trng_sample_mode trng_sample_mode_t#: TRNG sample mode. Used by trng_config_t.

typedef enum _trng_clock_mode trng_clock_mode_t#: TRNG clock mode. Used by trng_config_t.

typedef enum _trng_ring_osc_div trng_ring_osc_div_t#: TRNG ring oscillator divide. Used by trng_config_t.

typedef struct _trng_statistical_check_limit trng_statistical_check_limit_t#: Data structure for definition of statistical check limits. Used by trng_config_t.

typedef struct _trng_user_config trng_config_t#

Data structure for the TRNG initialization.

This structure initializes the TRNG by calling the TRNG_Init() function. It contains all TRNG configurations.

status_t TRNG_GetDefaultConfig(trng_config_t *userConfig)#

Initializes the user configuration structure to default values.

This function initializes the configuration structure to default values. The default values are platform dependent.

Parameters:

userConfig – User configuration structure.

Returns:

If successful, returns the kStatus_TRNG_Success. Otherwise, it returns an error.

status_t TRNG_Init(TRNG_Type *base, const trng_config_t *userConfig)#

Initializes the TRNG.

This function initializes the TRNG. When called, the TRNG entropy generation starts immediately.

Parameters:

base – TRNG base address
userConfig – Pointer to the initialization configuration structure.

Returns:

If successful, returns the kStatus_TRNG_Success. Otherwise, it returns an error.

void TRNG_Deinit(TRNG_Type *base)#

Shuts down the TRNG.

This function shuts down the TRNG.

Parameters:

base – TRNG base address.

status_t TRNG_GetRandomData(TRNG_Type *base, void *data, size_t dataSize)#

Gets random data.

This function gets random data from the TRNG.

Parameters:

base – TRNG base address.
data – Pointer address used to store random data.
dataSize – Size of the buffer pointed by the data parameter.

Returns:

random data

struct _trng_statistical_check_limit#

#include <fsl_trng.h>

Data structure for definition of statistical check limits. Used by trng_config_t.

Public Members

uint32_t maximum#: Maximum limit.

int32_t minimum#: Minimum limit.

struct _trng_user_config#

#include <fsl_trng.h>

Data structure for the TRNG initialization.

This structure initializes the TRNG by calling the TRNG_Init() function. It contains all TRNG configurations.

Public Members

bool lock#: Disable programmability of TRNG registers.

trng_clock_mode_t clockMode#: Clock mode used to operate TRNG.

trng_ring_osc_div_t ringOscDiv#: Ring oscillator divide used by TRNG.

trng_sample_mode_t sampleMode#: Sample mode of the TRNG ring oscillator.

uint16_t entropyDelay#: Entropy Delay. Defines the length (in system clocks) of each Entropy sample taken.

uint16_t sampleSize#: Sample Size. Defines the total number of Entropy samples that will be taken during Entropy generation.

uint16_t sparseBitLimit#: Sparse Bit Limit which defines the maximum number of consecutive samples that may be discarded before an error is generated. This limit is used only for during von Neumann sampling (enabled by TRNG_HAL_SetSampleMode()). Samples are discarded if two consecutive raw samples are both 0 or both 1. If this discarding occurs for a long period of time, it indicates that there is insufficient Entropy.

uint8_t retryCount#: Retry count. It defines the number of times a statistical check may fails during the TRNG Entropy Generation before generating an error.

uint8_t longRunMaxLimit#: Largest allowable number of consecutive samples of all 1, or all 0, that is allowed during the Entropy generation.

trng_statistical_check_limit_t monobitLimit#: Maximum and minimum limits for statistical check of number of ones/zero detected during entropy generation.

trng_statistical_check_limit_t runBit1Limit#: Maximum and minimum limits for statistical check of number of runs of length 1 detected during entropy generation.

trng_statistical_check_limit_t runBit2Limit#: Maximum and minimum limits for statistical check of number of runs of length 2 detected during entropy generation.

trng_statistical_check_limit_t runBit3Limit#: Maximum and minimum limits for statistical check of number of runs of length 3 detected during entropy generation.

trng_statistical_check_limit_t runBit4Limit#: Maximum and minimum limits for statistical check of number of runs of length 4 detected during entropy generation.

trng_statistical_check_limit_t runBit5Limit#: Maximum and minimum limits for statistical check of number of runs of length 5 detected during entropy generation.

trng_statistical_check_limit_t runBit6PlusLimit#: Maximum and minimum limits for statistical check of number of runs of length 6 or more detected during entropy generation.

trng_statistical_check_limit_t pokerLimit#: Maximum and minimum limits for statistical check of “Poker Test”.

trng_statistical_check_limit_t frequencyCountLimit#: Maximum and minimum limits for statistical check of entropy sample frequency count.

USART: Universal Synchronous/Asynchronous Receiver/Transmitter Driver#

USART DMA Driver#

status_t USART_TransferCreateHandleDMA(USART_Type *base, usart_dma_handle_t *handle, usart_dma_transfer_callback_t callback, void *userData, dma_handle_t *txDmaHandle, dma_handle_t *rxDmaHandle)#

Initializes the USART handle which is used in transactional functions.

Parameters:

base – USART peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
callback – Callback function.
userData – User data.
txDmaHandle – User-requested DMA handle for TX DMA transfer.
rxDmaHandle – User-requested DMA handle for RX DMA transfer.

status_t USART_TransferSendDMA(USART_Type *base, usart_dma_handle_t *handle, usart_transfer_t *xfer)#

Sends data using DMA.

This function sends data using DMA. This is a non-blocking function, which returns right away. When all data is sent, the send callback function is called.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
xfer – USART DMA transfer structure. See usart_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_USART_TxBusy – Previous transfer on going.
kStatus_InvalidArgument – Invalid argument.

status_t USART_TransferReceiveDMA(USART_Type *base, usart_dma_handle_t *handle, usart_transfer_t *xfer)#

Receives data using DMA.

This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

Parameters:

base – USART peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
xfer – USART DMA transfer structure. See usart_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_USART_RxBusy – Previous transfer on going.
kStatus_InvalidArgument – Invalid argument.

void USART_TransferAbortSendDMA(USART_Type *base, usart_dma_handle_t *handle)#

Aborts the sent data using DMA.

This function aborts send data using DMA.

Parameters:

base – USART peripheral base address
handle – Pointer to usart_dma_handle_t structure

void USART_TransferAbortReceiveDMA(USART_Type *base, usart_dma_handle_t *handle)#

Aborts the received data using DMA.

This function aborts the received data using DMA.

Parameters:

base – USART peripheral base address
handle – Pointer to usart_dma_handle_t structure

status_t USART_TransferGetReceiveCountDMA(USART_Type *base, usart_dma_handle_t *handle, uint32_t *count)#

Get the number of bytes that have been received.

This function gets the number of bytes that have been received.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
count – Receive bytes count.

Return values:

kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

status_t USART_TransferGetSendCountDMA(USART_Type *base, usart_dma_handle_t *handle, uint32_t *count)#

Get the number of bytes that have been sent.

This function gets the number of bytes that have been sent.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
count – Sent bytes count.

Return values:

kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

FSL_USART_DMA_DRIVER_VERSION#: USART dma driver version.

typedef struct _usart_dma_handle usart_dma_handle_t#

typedef void (*usart_dma_transfer_callback_t)(USART_Type *base, usart_dma_handle_t *handle, status_t status, void *userData)#: UART transfer callback function.

struct _usart_dma_handle#

#include <fsl_usart_dma.h>

UART DMA handle.

Public Members

USART_Type *base#: UART peripheral base address.

usart_dma_transfer_callback_t callback#: Callback function.

void *userData#: UART callback function parameter.

size_t rxDataSizeAll#: Size of the data to receive.

size_t txDataSizeAll#: Size of the data to send out.

dma_handle_t *txDmaHandle#: The DMA TX channel used.

dma_handle_t *rxDmaHandle#: The DMA RX channel used.

volatile uint8_t txState#: TX transfer state.

volatile uint8_t rxState#: RX transfer state

USART Driver#

status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz)#

Initializes a USART instance with user configuration structure and peripheral clock.

This function configures the USART module with the user-defined settings. The user can configure the configuration structure and also get the default configuration by using the USART_GetDefaultConfig() function. Example below shows how to use this API to configure USART.

usart_config_t usartConfig;
usartConfig.baudRate_Bps = 115200U;
usartConfig.parityMode = kUSART_ParityDisabled;
usartConfig.stopBitCount = kUSART_OneStopBit;
USART_Init(USART1, &usartConfig, 20000000U);

Parameters:

base – USART peripheral base address.
config – Pointer to user-defined configuration structure.
srcClock_Hz – USART clock source frequency in HZ.

Return values:

kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source.
kStatus_InvalidArgument – USART base address is not valid
kStatus_Success – Status USART initialize succeed

void USART_Deinit(USART_Type *base)#

Deinitializes a USART instance.

This function waits for TX complete, disables TX and RX, and disables the USART clock.

Parameters:

base – USART peripheral base address.

void USART_GetDefaultConfig(usart_config_t *config)#

Gets the default configuration structure.

This function initializes the USART configuration structure to a default value. The default values are: usartConfig->baudRate_Bps = 115200U; usartConfig->parityMode = kUSART_ParityDisabled; usartConfig->stopBitCount = kUSART_OneStopBit; usartConfig->bitCountPerChar = kUSART_8BitsPerChar; usartConfig->loopback = false; usartConfig->enableTx = false; usartConfig->enableRx = false;

Parameters:

config – Pointer to configuration structure.

status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz)#

Sets the USART instance baud rate.

This function configures the USART module baud rate. This function is used to update the USART module baud rate after the USART module is initialized by the USART_Init.

USART_SetBaudRate(USART1, 115200U, 20000000U);

Parameters:

base – USART peripheral base address.
baudrate_Bps – USART baudrate to be set.
srcClock_Hz – USART clock source frequency in HZ.

Return values:

kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source.
kStatus_Success – Set baudrate succeed.
kStatus_InvalidArgument – One or more arguments are invalid.

status_t USART_Enable32kMode(USART_Type *base, uint32_t baudRate_Bps, bool enableMode32k, uint32_t srcClock_Hz)#

Enable 32 kHz mode which USART uses clock from the RTC oscillator as the clock source.

Please note that in order to use a 32 kHz clock to operate USART properly, the RTC oscillator and its 32 kHz output must be manully enabled by user, by calling RTC_Init and setting SYSCON_RTCOSCCTRL_EN bit to 1. And in 32kHz clocking mode the USART can only work at 9600 baudrate or at the baudrate that 9600 can evenly divide, eg: 4800, 3200.

Parameters:

base – USART peripheral base address.
baudRate_Bps – USART baudrate to be set..
enableMode32k – true is 32k mode, false is normal mode.
srcClock_Hz – USART clock source frequency in HZ.

Return values:

kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source.
kStatus_Success – Set baudrate succeed.
kStatus_InvalidArgument – One or more arguments are invalid.

void USART_Enable9bitMode(USART_Type *base, bool enable)#

Enable 9-bit data mode for USART.

This function set the 9-bit mode for USART module. The 9th bit is not used for parity thus can be modified by user.

Parameters:

base – USART peripheral base address.
enable – true to enable, false to disable.

static inline void USART_SetMatchAddress(USART_Type *base, uint8_t address)#

Set the USART slave address.

This function configures the address for USART module that works as slave in 9-bit data mode. When the address detection is enabled, the frame it receices with MSB being 1 is considered as an address frame, otherwise it is considered as data frame. Once the address frame matches slave’s own addresses, this slave is addressed. This address frame and its following data frames are stored in the receive buffer, otherwise the frames will be discarded. To un-address a slave, just send an address frame with unmatched address.

Note

Any USART instance joined in the multi-slave system can work as slave. The position of the address mark is the same as the parity bit when parity is enabled for 8 bit and 9 bit data formats.

Parameters:

base – USART peripheral base address.
address – USART slave address.

static inline void USART_EnableMatchAddress(USART_Type *base, bool match)#

Enable the USART match address feature.

Parameters:

base – USART peripheral base address.
match – true to enable match address, false to disable.

static inline uint32_t USART_GetStatusFlags(USART_Type *base)#

Get USART status flags.

This function get all USART status flags, the flags are returned as the logical OR value of the enumerators _usart_flags. To check a specific status, compare the return value with enumerators in _usart_flags. For example, to check whether the TX is empty:

if (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(USART1))
{
    ...
}

Parameters:

base – USART peripheral base address.

Returns:

USART status flags which are ORed by the enumerators in the _usart_flags.

static inline void USART_ClearStatusFlags(USART_Type *base, uint32_t mask)#

Clear USART status flags.

This function clear supported USART status flags. The mask is a logical OR of enumeration members. See kUSART_AllClearFlags. For example:

USART_ClearStatusFlags(USART1, kUSART_TxError | kUSART_RxError)

Parameters:

base – USART peripheral base address.
mask – status flags to be cleared.

static inline void USART_EnableInterrupts(USART_Type *base, uint32_t mask)#

Enables USART interrupts according to the provided mask.

This function enables the USART interrupts according to the provided mask. The mask is a logical OR of enumeration members. See _usart_interrupt_enable. For example, to enable TX empty interrupt and RX full interrupt:

USART_EnableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable);

Parameters:

base – USART peripheral base address.
mask – The interrupts to enable. Logical OR of _usart_interrupt_enable.

static inline void USART_DisableInterrupts(USART_Type *base, uint32_t mask)#

Disables USART interrupts according to a provided mask.

This function disables the USART interrupts according to a provided mask. The mask is a logical OR of enumeration members. See _usart_interrupt_enable. This example shows how to disable the TX empty interrupt and RX full interrupt:

USART_DisableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable);

Parameters:

base – USART peripheral base address.
mask – The interrupts to disable. Logical OR of _usart_interrupt_enable.

static inline uint32_t USART_GetEnabledInterrupts(USART_Type *base)#

Returns enabled USART interrupts.

This function returns the enabled USART interrupts.

Parameters:

base – USART peripheral base address.

static inline void USART_EnableTxDMA(USART_Type *base, bool enable)#: Enable DMA for Tx.

static inline void USART_EnableRxDMA(USART_Type *base, bool enable)#: Enable DMA for Rx.

static inline void USART_EnableCTS(USART_Type *base, bool enable)#

Enable CTS. This function will determine whether CTS is used for flow control.

Parameters:

base – USART peripheral base address.
enable – Enable CTS or not, true for enable and false for disable.

static inline void USART_EnableContinuousSCLK(USART_Type *base, bool enable)#

Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode. Enable this funciton, SCLK will run continuously in synchronous mode, allowing characters to be received on Un_RxD independently from transmission on Un_TXD).

Parameters:

base – USART peripheral base address.
enable – Enable Continuous Clock generation mode or not, true for enable and false for disable.

static inline void USART_EnableAutoClearSCLK(USART_Type *base, bool enable)#

Enable Continuous Clock generation bit auto clear. While enable this cuntion, the Continuous Clock bit is automatically cleared when a complete character has been received. This bit is cleared at the same time.

Parameters:

base – USART peripheral base address.
enable – Enable auto clear or not, true for enable and false for disable.

static inline void USART_SetRxFifoWatermark(USART_Type *base, uint8_t water)#

Sets the rx FIFO watermark.

Parameters:

base – USART peripheral base address.
water – Rx FIFO watermark.

static inline void USART_SetTxFifoWatermark(USART_Type *base, uint8_t water)#

Sets the tx FIFO watermark.

Parameters:

base – USART peripheral base address.
water – Tx FIFO watermark.

static inline void USART_WriteByte(USART_Type *base, uint8_t data)#

Writes to the FIFOWR register.

This function writes data to the txFIFO directly. The upper layer must ensure that txFIFO has space for data to write before calling this function.

Parameters:

base – USART peripheral base address.
data – The byte to write.

static inline uint8_t USART_ReadByte(USART_Type *base)#

Reads the FIFORD register directly.

This function reads data from the rxFIFO directly. The upper layer must ensure that the rxFIFO is not empty before calling this function.

Parameters:

base – USART peripheral base address.

Returns:

The byte read from USART data register.

static inline uint8_t USART_GetRxFifoCount(USART_Type *base)#

Gets the rx FIFO data count.

Parameters:

base – USART peripheral base address.

Returns:

rx FIFO data count.

static inline uint8_t USART_GetTxFifoCount(USART_Type *base)#

Gets the tx FIFO data count.

Parameters:

base – USART peripheral base address.

Returns:

tx FIFO data count.

void USART_SendAddress(USART_Type *base, uint8_t address)#

Transmit an address frame in 9-bit data mode.

Parameters:

base – USART peripheral base address.
address – USART slave address.

status_t USART_WriteBlocking(USART_Type *base, const uint8_t *data, size_t length)#

Writes to the TX register using a blocking method.

This function polls the TX register, waits for the TX register to be empty or for the TX FIFO to have room and writes data to the TX buffer.

Parameters:

base – USART peripheral base address.
data – Start address of the data to write.
length – Size of the data to write.

Return values:

kStatus_USART_Timeout – Transmission timed out and was aborted.
kStatus_InvalidArgument – Invalid argument.
kStatus_Success – Successfully wrote all data.

status_t USART_ReadBlocking(USART_Type *base, uint8_t *data, size_t length)#

Read RX data register using a blocking method.

This function polls the RX register, waits for the RX register to be full or for RX FIFO to have data and read data from the TX register.

Parameters:

base – USART peripheral base address.
data – Start address of the buffer to store the received data.
length – Size of the buffer.

Return values:

kStatus_USART_FramingError – Receiver overrun happened while receiving data.
kStatus_USART_ParityError – Noise error happened while receiving data.
kStatus_USART_NoiseError – Framing error happened while receiving data.
kStatus_USART_RxError – Overflow or underflow rxFIFO happened.
kStatus_USART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully received all data.

status_t USART_TransferCreateHandle(USART_Type *base, usart_handle_t *handle, usart_transfer_callback_t callback, void *userData)#

Initializes the USART handle.

This function initializes the USART handle which can be used for other USART transactional APIs. Usually, for a specified USART instance, call this API once to get the initialized handle.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
callback – The callback function.
userData – The parameter of the callback function.

status_t USART_TransferSendNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer)#

Transmits a buffer of data using the interrupt method.

This function sends data using an interrupt method. This is a non-blocking function, which returns directly without waiting for all data to be written to the TX register. When all data is written to the TX register in the IRQ handler, the USART driver calls the callback function and passes the kStatus_USART_TxIdle as status parameter.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
xfer – USART transfer structure. See usart_transfer_t.

Return values:

kStatus_Success – Successfully start the data transmission.
kStatus_USART_TxBusy – Previous transmission still not finished, data not all written to TX register yet.
kStatus_InvalidArgument – Invalid argument.

void USART_TransferStartRingBuffer(USART_Type *base, usart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)#

Sets up the RX ring buffer.

This function sets up the RX ring buffer to a specific USART handle.

When the RX ring buffer is used, data received are stored into the ring buffer even when the user doesn’t call the USART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, the user can get the received data from the ring buffer directly.

Note

When using the RX ring buffer, one byte is reserved for internal use. In other words, if ringBufferSize is 32, then only 31 bytes are used for saving data.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
ringBuffer – Start address of the ring buffer for background receiving. Pass NULL to disable the ring buffer.
ringBufferSize – size of the ring buffer.

void USART_TransferStopRingBuffer(USART_Type *base, usart_handle_t *handle)#

Aborts the background transfer and uninstalls the ring buffer.

This function aborts the background transfer and uninstalls the ring buffer.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.

size_t USART_TransferGetRxRingBufferLength(usart_handle_t *handle)#

Get the length of received data in RX ring buffer.

Parameters:

handle – USART handle pointer.

Returns:

Length of received data in RX ring buffer.

void USART_TransferAbortSend(USART_Type *base, usart_handle_t *handle)#

Aborts the interrupt-driven data transmit.

This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out how many bytes are still not sent out.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.

status_t USART_TransferGetSendCount(USART_Type *base, usart_handle_t *handle, uint32_t *count)#

Get the number of bytes that have been sent out to bus.

This function gets the number of bytes that have been sent out to bus by interrupt method.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
count – Send bytes count.

Return values:

kStatus_NoTransferInProgress – No send in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

status_t USART_TransferReceiveNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer, size_t *receivedBytes)#

Receives a buffer of data using an interrupt method.

This function receives data using an interrupt method. This is a non-blocking function, which returns without waiting for all data to be received. If the RX ring buffer is used and not empty, the data in the ring buffer is copied and the parameter receivedBytes shows how many bytes are copied from the ring buffer. After copying, if the data in the ring buffer is not enough to read, the receive request is saved by the USART driver. When the new data arrives, the receive request is serviced first. When all data is received, the USART driver notifies the upper layer through a callback function and passes the status parameter kStatus_USART_RxIdle. For example, the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer. The 5 bytes are copied to the xfer->data and this function returns with the parameter receivedBytes set to 5. For the left 5 bytes, newly arrived data is saved from the xfer->data[5]. When 5 bytes are received, the USART driver notifies the upper layer. If the RX ring buffer is not enabled, this function enables the RX and RX interrupt to receive data to the xfer->data. When all data is received, the upper layer is notified.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
xfer – USART transfer structure, see usart_transfer_t.
receivedBytes – Bytes received from the ring buffer directly.

Return values:

kStatus_Success – Successfully queue the transfer into transmit queue.
kStatus_USART_RxBusy – Previous receive request is not finished.
kStatus_InvalidArgument – Invalid argument.

void USART_TransferAbortReceive(USART_Type *base, usart_handle_t *handle)#

Aborts the interrupt-driven data receiving.

This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out how many bytes not received yet.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.

status_t USART_TransferGetReceiveCount(USART_Type *base, usart_handle_t *handle, uint32_t *count)#

Get the number of bytes that have been received.

This function gets the number of bytes that have been received.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
count – Receive bytes count.

Return values:

kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle)#

USART IRQ handle function.

This function handles the USART transmit and receive IRQ request.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.

FSL_USART_DRIVER_VERSION#: USART driver version.

Error codes for the USART driver.

Values:

enumerator kStatus_USART_TxBusy#: Transmitter is busy.

enumerator kStatus_USART_RxBusy#: Receiver is busy.

enumerator kStatus_USART_TxIdle#: USART transmitter is idle.

enumerator kStatus_USART_RxIdle#: USART receiver is idle.

enumerator kStatus_USART_TxError#: Error happens on txFIFO.

enumerator kStatus_USART_RxError#: Error happens on rxFIFO.

enumerator kStatus_USART_RxRingBufferOverrun#: Error happens on rx ring buffer

enumerator kStatus_USART_NoiseError#: USART noise error.

enumerator kStatus_USART_FramingError#: USART framing error.

enumerator kStatus_USART_ParityError#: USART parity error.

enumerator kStatus_USART_BaudrateNotSupport#: Baudrate is not support in current clock source

enumerator kStatus_USART_RxStart#: Start is detected on the receiver input

enum _usart_sync_mode#

USART synchronous mode.

Values:

enumerator kUSART_SyncModeDisabled#: Asynchronous mode.

enumerator kUSART_SyncModeSlave#: Synchronous slave mode.

enumerator kUSART_SyncModeMaster#: Synchronous master mode.

enum _usart_parity_mode#

USART parity mode.

Values:

enumerator kUSART_ParityDisabled#: Parity disabled

enumerator kUSART_ParityEven#: Parity enabled, type even, bit setting: PE|PT = 10

enumerator kUSART_ParityOdd#: Parity enabled, type odd, bit setting: PE|PT = 11

enum _usart_stop_bit_count#

USART stop bit count.

Values:

enumerator kUSART_OneStopBit#: One stop bit

enumerator kUSART_TwoStopBit#: Two stop bits

enum _usart_data_len#

USART data size.

Values:

enumerator kUSART_7BitsPerChar#: Seven bit mode

enumerator kUSART_8BitsPerChar#: Eight bit mode

enum _usart_clock_polarity#

USART clock polarity configuration, used in sync mode.

Values:

enumerator kUSART_RxSampleOnFallingEdge#: Un_RXD is sampled on the falling edge of SCLK.

enumerator kUSART_RxSampleOnRisingEdge#: Un_RXD is sampled on the rising edge of SCLK.

enum _usart_txfifo_watermark#

txFIFO watermark values

Values:

enumerator kUSART_TxFifo0#: USART tx watermark is empty

enumerator kUSART_TxFifo1#: USART tx watermark at 1 item

enumerator kUSART_TxFifo2#: USART tx watermark at 2 items

enumerator kUSART_TxFifo3#: USART tx watermark at 3 items

enumerator kUSART_TxFifo4#: USART tx watermark at 4 items

enumerator kUSART_TxFifo5#: USART tx watermark at 5 items

enumerator kUSART_TxFifo6#: USART tx watermark at 6 items

enumerator kUSART_TxFifo7#: USART tx watermark at 7 items

enum _usart_rxfifo_watermark#

rxFIFO watermark values

Values:

enumerator kUSART_RxFifo1#: USART rx watermark at 1 item

enumerator kUSART_RxFifo2#: USART rx watermark at 2 items

enumerator kUSART_RxFifo3#: USART rx watermark at 3 items

enumerator kUSART_RxFifo4#: USART rx watermark at 4 items

enumerator kUSART_RxFifo5#: USART rx watermark at 5 items

enumerator kUSART_RxFifo6#: USART rx watermark at 6 items

enumerator kUSART_RxFifo7#: USART rx watermark at 7 items

enumerator kUSART_RxFifo8#: USART rx watermark at 8 items

enum _usart_interrupt_enable#

USART interrupt configuration structure, default settings all disabled.

Values:

enumerator kUSART_TxErrorInterruptEnable#

enumerator kUSART_RxErrorInterruptEnable#

enumerator kUSART_TxLevelInterruptEnable#

enumerator kUSART_RxLevelInterruptEnable#

enumerator kUSART_TxIdleInterruptEnable#: Transmitter idle.

enumerator kUSART_CtsChangeInterruptEnable#: Change in the state of the CTS input.

enumerator kUSART_RxBreakChangeInterruptEnable#: Break condition asserted or deasserted.

enumerator kUSART_RxStartInterruptEnable#: Rx start bit detected.

enumerator kUSART_FramingErrorInterruptEnable#: Framing error detected.

enumerator kUSART_ParityErrorInterruptEnable#: Parity error detected.

enumerator kUSART_NoiseErrorInterruptEnable#: Noise error detected.

enumerator kUSART_AutoBaudErrorInterruptEnable#: Auto baudrate error detected.

enumerator kUSART_AllInterruptEnables#

enum _usart_flags#

USART status flags.

This provides constants for the USART status flags for use in the USART functions.

Values:

enumerator kUSART_TxError#: TXERR bit, sets if TX buffer is error

enumerator kUSART_RxError#: RXERR bit, sets if RX buffer is error

enumerator kUSART_TxFifoEmptyFlag#: TXEMPTY bit, sets if TX buffer is empty

enumerator kUSART_TxFifoNotFullFlag#: TXNOTFULL bit, sets if TX buffer is not full

enumerator kUSART_RxFifoNotEmptyFlag#: RXNOEMPTY bit, sets if RX buffer is not empty

enumerator kUSART_RxFifoFullFlag#: RXFULL bit, sets if RX buffer is full

enumerator kUSART_RxIdleFlag#: Receiver idle.

enumerator kUSART_TxIdleFlag#: Transmitter idle.

enumerator kUSART_CtsAssertFlag#: CTS signal high.

enumerator kUSART_CtsChangeFlag#: CTS signal changed interrupt status.

enumerator kUSART_BreakDetectFlag#: Break detected. Self cleared when rx pin goes high again.

enumerator kUSART_BreakDetectChangeFlag#: Break detect change interrupt flag. A change in the state of receiver break detection.

enumerator kUSART_RxStartFlag#: Rx start bit detected interrupt flag.

enumerator kUSART_FramingErrorFlag#: Framing error interrupt flag.

enumerator kUSART_ParityErrorFlag#: parity error interrupt flag.

enumerator kUSART_NoiseErrorFlag#: Noise error interrupt flag.

enumerator kUSART_AutobaudErrorFlag#: Auto baudrate error interrupt flag, caused by the baudrate counter timeout before the end of start bit.

enumerator kUSART_AllClearFlags#

typedef enum _usart_sync_mode usart_sync_mode_t#: USART synchronous mode.

typedef enum _usart_parity_mode usart_parity_mode_t#: USART parity mode.

typedef enum _usart_stop_bit_count usart_stop_bit_count_t#: USART stop bit count.

typedef enum _usart_data_len usart_data_len_t#: USART data size.

typedef enum _usart_clock_polarity usart_clock_polarity_t#: USART clock polarity configuration, used in sync mode.

typedef enum _usart_txfifo_watermark usart_txfifo_watermark_t#: txFIFO watermark values

typedef enum _usart_rxfifo_watermark usart_rxfifo_watermark_t#: rxFIFO watermark values

typedef struct _usart_config usart_config_t#: USART configuration structure.

typedef struct _usart_transfer usart_transfer_t#: USART transfer structure.

typedef struct _usart_handle usart_handle_t#

typedef void (*usart_transfer_callback_t)(USART_Type *base, usart_handle_t *handle, status_t status, void *userData)#: USART transfer callback function.

typedef void (*flexcomm_usart_irq_handler_t)(USART_Type *base, usart_handle_t *handle)#: Typedef for usart interrupt handler.

uint32_t USART_GetInstance(USART_Type *base)#: Returns instance number for USART peripheral base address.

USART_FIFOTRIG_TXLVL_GET(base)#

USART_FIFOTRIG_RXLVL_GET(base)#

UART_RETRY_TIMES#

Retry times for waiting flag.

Defining to zero means to keep waiting for the flag until it is assert/deassert in blocking transfer, otherwise the program will wait until the UART_RETRY_TIMES counts down to 0, if the flag still remains unchanged then program will return kStatus_USART_Timeout. It is not advised to use this macro in formal application to prevent any hardware error because the actual wait period is affected by the compiler and optimization.

struct _usart_config#

#include <fsl_usart.h>

USART configuration structure.

Public Members

uint32_t baudRate_Bps#: USART baud rate

usart_parity_mode_t parityMode#: Parity mode, disabled (default), even, odd

usart_stop_bit_count_t stopBitCount#: Number of stop bits, 1 stop bit (default) or 2 stop bits

usart_data_len_t bitCountPerChar#: Data length - 7 bit, 8 bit

bool loopback#: Enable peripheral loopback

bool enableRx#: Enable RX

bool enableTx#: Enable TX

bool enableContinuousSCLK#: USART continuous Clock generation enable in synchronous master mode.

bool enableMode32k#: USART uses 32 kHz clock from the RTC oscillator as the clock source.

bool enableHardwareFlowControl#: Enable hardware control RTS/CTS

bool enable485ControlOutput#: Configure RTS signal to provide an output enable signal to control an RS-485 transceiver.

bool enableActiveHighRts#: Output enable polarity.

bool extendRtsOutput#: Output Enable Turnaround time enable for RS-485 operation.

usart_txfifo_watermark_t txWatermark#: txFIFO watermark

usart_rxfifo_watermark_t rxWatermark#: rxFIFO watermark

usart_sync_mode_t syncMode#: Transfer mode select - asynchronous, synchronous master, synchronous slave.

usart_clock_polarity_t clockPolarity#: Selects the clock polarity and sampling edge in synchronous mode.

struct _usart_transfer#

#include <fsl_usart.h>

USART transfer structure.

Public Members

size_t dataSize#: The byte count to be transfer.

struct _usart_handle#

#include <fsl_usart.h>

USART handle structure.

Public Members

const uint8_t *volatile txData#: Address of remaining data to send.

volatile size_t txDataSize#: Size of the remaining data to send.

size_t txDataSizeAll#: Size of the data to send out.

uint8_t *volatile rxData#: Address of remaining data to receive.

volatile size_t rxDataSize#: Size of the remaining data to receive.

size_t rxDataSizeAll#: Size of the data to receive.

uint8_t *rxRingBuffer#: Start address of the receiver ring buffer.

size_t rxRingBufferSize#: Size of the ring buffer.

volatile uint16_t rxRingBufferHead#: Index for the driver to store received data into ring buffer.

volatile uint16_t rxRingBufferTail#: Index for the user to get data from the ring buffer.

usart_transfer_callback_t callback#: Callback function.

void *userData#: USART callback function parameter.

volatile uint8_t txState#: TX transfer state.

volatile uint8_t rxState#: RX transfer state

uint8_t txWatermark#: txFIFO watermark

uint8_t rxWatermark#: rxFIFO watermark

union __unnamed13__#

Public Members

uint8_t *data#: The buffer of data to be transfer.

uint8_t *rxData#: The buffer to receive data.

const uint8_t *txData#: The buffer of data to be sent.

UTICK: MictoTick Timer Driver#

void UTICK_Init(UTICK_Type *base)#: Initializes an UTICK by turning its bus clock on.

void UTICK_Deinit(UTICK_Type *base)#

Deinitializes a UTICK instance.

This function shuts down Utick bus clock

Parameters:

base – UTICK peripheral base address.

uint32_t UTICK_GetStatusFlags(UTICK_Type *base)#

Get Status Flags.

This returns the status flag

Parameters:

base – UTICK peripheral base address.

Returns:

status register value

void UTICK_ClearStatusFlags(UTICK_Type *base)#

Clear Status Interrupt Flags.

This clears intr status flag

Parameters:

base – UTICK peripheral base address.

Returns:

none

void UTICK_SetTick(UTICK_Type *base, utick_mode_t mode, uint32_t count, utick_callback_t cb)#

Starts UTICK.

This function starts a repeat/onetime countdown with an optional callback

Parameters:

base – UTICK peripheral base address.
mode – UTICK timer mode (ie kUTICK_onetime or kUTICK_repeat)
count – UTICK timer mode (ie kUTICK_onetime or kUTICK_repeat)
cb – UTICK callback (can be left as NULL if none, otherwise should be a void func(void))

Returns:

none

void UTICK_HandleIRQ(UTICK_Type *base, utick_callback_t cb)#

UTICK Interrupt Service Handler.

This function handles the interrupt and refers to the callback array in the driver to callback user (as per request in UTICK_SetTick()). if no user callback is scheduled, the interrupt will simply be cleared.

Parameters:

base – UTICK peripheral base address.
cb – callback scheduled for this instance of UTICK

Returns:

none

FSL_UTICK_DRIVER_VERSION#: UTICK driver version 2.0.6.

enum _utick_mode#

UTICK timer operational mode.

Values:

enumerator kUTICK_Onetime#: Trigger once

enumerator kUTICK_Repeat#: Trigger repeatedly

typedef enum _utick_mode utick_mode_t#: UTICK timer operational mode.

typedef void (*utick_callback_t)(void)#: UTICK callback function.

WWDT: Windowed Watchdog Timer Driver#

void WWDT_GetDefaultConfig(wwdt_config_t *config)#

Initializes WWDT configure structure.

This function initializes the WWDT configure structure to default value. The default value are:

config->enableWwdt = true;
config->enableWatchdogReset = false;
config->enableWatchdogProtect = false;
config->enableLockOscillator = false;
config->windowValue = 0xFFFFFFU;
config->timeoutValue = 0xFFFFFFU;
config->warningValue = 0;

See also

wwdt_config_t

Parameters:

config – Pointer to WWDT config structure.

void WWDT_Init(WWDT_Type *base, const wwdt_config_t *config)#

Initializes the WWDT.

This function initializes the WWDT. When called, the WWDT runs according to the configuration.

Example:

wwdt_config_t config;
WWDT_GetDefaultConfig(&config);
config.timeoutValue = 0x7ffU;
WWDT_Init(wwdt_base,&config);

Parameters:

base – WWDT peripheral base address
config – The configuration of WWDT

void WWDT_Deinit(WWDT_Type *base)#

Shuts down the WWDT.

This function shuts down the WWDT.

Parameters:

base – WWDT peripheral base address

static inline void WWDT_Enable(WWDT_Type *base)#

Enables the WWDT module.

This function write value into WWDT_MOD register to enable the WWDT, it is a write-once bit; once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently.

Parameters:

base – WWDT peripheral base address

static inline void WWDT_Disable(WWDT_Type *base)#

Disables the WWDT module.

Deprecated:: Do not use this function. It will be deleted in next release version, for once the bit field of WDEN written with a 1, it can not be re-written with a 0.

This function write value into WWDT_MOD register to disable the WWDT.

Parameters:

base – WWDT peripheral base address

static inline uint32_t WWDT_GetStatusFlags(WWDT_Type *base)#

Gets all WWDT status flags.

This function gets all status flags.

Example for getting Timeout Flag:

uint32_t status;
status = WWDT_GetStatusFlags(wwdt_base) & kWWDT_TimeoutFlag;

Parameters:

base – WWDT peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration _wwdt_status_flags_t

void WWDT_ClearStatusFlags(WWDT_Type *base, uint32_t mask)#

Clear WWDT flag.

This function clears WWDT status flag.

Example for clearing warning flag:

WWDT_ClearStatusFlags(wwdt_base, kWWDT_WarningFlag);

Parameters:

base – WWDT peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration _wwdt_status_flags_t

static inline void WWDT_SetWarningValue(WWDT_Type *base, uint32_t warningValue)#

Set the WWDT warning value.

The WDWARNINT register determines the watchdog timer counter value that will generate a watchdog interrupt. When the watchdog timer counter is no longer greater than the value defined by WARNINT, an interrupt will be generated after the subsequent WDCLK.

Parameters:

base – WWDT peripheral base address
warningValue – WWDT warning value.

static inline void WWDT_SetTimeoutValue(WWDT_Type *base, uint32_t timeoutCount)#

Set the WWDT timeout value.

This function sets the timeout value. Every time a feed sequence occurs the value in the TC register is loaded into the Watchdog timer. Writing a value below 0xFF will cause 0xFF to be loaded into the TC register. Thus the minimum time-out interval is TWDCLK*256*4. If enableWatchdogProtect flag is true in wwdt_config_t config structure, any attempt to change the timeout value before the watchdog counter is below the warning and window values will cause a watchdog reset and set the WDTOF flag.

Parameters:

base – WWDT peripheral base address
timeoutCount – WWDT timeout value, count of WWDT clock tick.

static inline void WWDT_SetWindowValue(WWDT_Type *base, uint32_t windowValue)#

Sets the WWDT window value.

The WINDOW register determines the highest TV value allowed when a watchdog feed is performed. If a feed sequence occurs when timer value is greater than the value in WINDOW, a watchdog event will occur. To disable windowing, set windowValue to 0xFFFFFF (maximum possible timer value) so windowing is not in effect.

Parameters:

base – WWDT peripheral base address
windowValue – WWDT window value.

void WWDT_Refresh(WWDT_Type *base)#

Refreshes the WWDT timer.

This function feeds the WWDT. This function should be called before WWDT timer is in timeout. Otherwise, a reset is asserted.

Parameters:

base – WWDT peripheral base address

FSL_WWDT_DRIVER_VERSION#: Defines WWDT driver version.

WWDT_FIRST_WORD_OF_REFRESH#: First word of refresh sequence

WWDT_SECOND_WORD_OF_REFRESH#: Second word of refresh sequence

enum _wwdt_status_flags_t#

WWDT status flags.

This structure contains the WWDT status flags for use in the WWDT functions.

Values:

enumerator kWWDT_TimeoutFlag#: Time-out flag, set when the timer times out

enumerator kWWDT_WarningFlag#: Warning interrupt flag, set when timer is below the value WDWARNINT

typedef struct _wwdt_config wwdt_config_t#: Describes WWDT configuration structure.

struct _wwdt_config#

#include <fsl_wwdt.h>

Describes WWDT configuration structure.

Public Members

bool enableWwdt#: Enables or disables WWDT

bool enableWatchdogReset#: true: Watchdog timeout will cause a chip reset false: Watchdog timeout will not cause a chip reset

bool enableWatchdogProtect#: true: Enable watchdog protect i.e timeout value can only be changed after counter is below warning & window values false: Disable watchdog protect; timeout value can be changed at any time

uint32_t windowValue#: Window value, set this to 0xFFFFFF if windowing is not in effect

uint32_t timeoutValue#: Timeout value

uint32_t warningValue#: Watchdog time counter value that will generate a warning interrupt. Set this to 0 for no warning

uint32_t clockFreq_Hz#: Watchdog clock source frequency.

MCXW236B

Contents

MCXW236B#

ANACTRL: Analog Control Driver#

CASPER: The Cryptographic Accelerator and Signal Processing Engine with RAM sharing#

casper_driver#

casper_driver_pkha#

CDOG#

CRC: Cyclic Redundancy Check Driver#

CTIMER: Standard counter/timers#

DMA: Direct Memory Access Controller Driver#

FLEXCOMM: FLEXCOMM Driver#

FLEXCOMM Driver#

GINT: Group GPIO Input Interrupt Driver#

Hashcrypt: The Cryptographic Accelerator#

Hashcrypt Background HASH#

Hashcrypt common functions#

Hashcrypt AES#

Hashcrypt HASH#

I2C: Inter-Integrated Circuit Driver#

I2C DMA Driver#

I2C Driver#

I2C Master Driver#

I2C Slave Driver#

INPUTMUX: Input Multiplexing Driver#

Common Driver#

GPIO: General Purpose I/O#

IOCON: I/O pin configuration#

Mailbox#

MRT: Multi-Rate Timer#

OSTIMER: OS Event Timer Driver#

PINT: Pin Interrupt and Pattern Match Driver#

PLU: Programmable Logic Unit#

PUF: Physical Unclonable Function#

RTC: Real Time Clock#

SCTimer: SCTimer/PWM (SCT)#

SPI: Serial Peripheral Interface Driver#

SPI DMA Driver#

SPI Driver#

SPIFI: SPIFI flash interface driver#

SPIFI DMA Driver#

SPIFI Driver#

TRNG: True Random Number Generator#

USART: Universal Synchronous/Asynchronous Receiver/Transmitter Driver#

USART DMA Driver#

USART Driver#

UTICK: MictoTick Timer Driver#

WWDT: Windowed Watchdog Timer Driver#